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arm: mach-k3: j722s: Fix eMMC boot functionality broken by Ethernet boot

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While adding CPSW device support to enable Ethernet boot for J722S,
dev-data and clk-data for eMMC was removed by mistake, which leads to eMMC
boot failure. Update the dev-data and clk-data to fix that.

Fixes: a02009f3a816 ("arm: mach-k3: j722s: Update SoC autogenerated data to enable Ethernet boot")
Reported-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
Tested-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
This commit is contained in:
Chintan Vankar 2025-12-04 17:51:27 +05:30 committed by Tom Rini
parent bb1c2b4632
commit c7c2c3c010
2 changed files with 38 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
arch/arm/mach-k3/r5/j722s/clk-data.c
View File

@ -68,6 +68,11 @@ static const char * const main_cp_gemac_cpts_clk_sel_out0_parents[] = {
"sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk", "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk",
}; };
static const char * const main_emmcsd0_refclk_sel_out0_parents[] = {
"postdiv4_16ff_main_0_hsdivout5_clk",
"hsdiv4_16fft_main_2_hsdivout2_clk",
};
static const char * const main_emmcsd1_refclk_sel_out0_parents[] = { static const char * const main_emmcsd1_refclk_sel_out0_parents[] = {
"postdiv4_16ff_main_0_hsdivout5_clk", "postdiv4_16ff_main_0_hsdivout5_clk",
"hsdiv4_16fft_main_2_hsdivout2_clk", "hsdiv4_16fft_main_2_hsdivout2_clk",
@ -106,6 +111,8 @@ static const char * const main_timerclkn_sel_out0_parents[] = {
NULL, NULL,
NULL, NULL,
NULL, NULL,
NULL,
NULL,
}; };
static const char * const wkup_clkout_sel_out0_parents[] = { static const char * const wkup_clkout_sel_out0_parents[] = {
@ -205,6 +212,7 @@ static const struct clk_data clk_list[] = {
CLK_MUX_PLLCTRL("sam62_pll_ctrl_wrap_mcu_0_sysclkout_clk", sam62_pll_ctrl_wrap_mcu_0_sysclkout_clk_parents, 2, 0x4020000, 0), CLK_MUX_PLLCTRL("sam62_pll_ctrl_wrap_mcu_0_sysclkout_clk", sam62_pll_ctrl_wrap_mcu_0_sysclkout_clk_parents, 2, 0x4020000, 0),
CLK_DIV("sam62_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk", "sam62_pll_ctrl_wrap_mcu_0_sysclkout_clk", 0x4020118, 0, 5, 0, 0), CLK_DIV("sam62_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk", "sam62_pll_ctrl_wrap_mcu_0_sysclkout_clk", 0x4020118, 0, 5, 0, 0),
CLK_MUX("clkout0_ctrl_out0", clkout0_ctrl_out0_parents, 2, 0x108010, 0, 1, 0), CLK_MUX("clkout0_ctrl_out0", clkout0_ctrl_out0_parents, 2, 0x108010, 0, 1, 0),
CLK_MUX("main_emmcsd0_refclk_sel_out0", main_emmcsd0_refclk_sel_out0_parents, 2, 0x108160, 0, 1, 0),
CLK_MUX("main_cp_gemac_cpts_clk_sel_out0", main_cp_gemac_cpts_clk_sel_out0_parents, 8, 0x108140, 0, 3, 0), CLK_MUX("main_cp_gemac_cpts_clk_sel_out0", main_cp_gemac_cpts_clk_sel_out0_parents, 8, 0x108140, 0, 3, 0),
CLK_MUX("main_emmcsd1_refclk_sel_out0", main_emmcsd1_refclk_sel_out0_parents, 2, 0x108168, 0, 1, 0), CLK_MUX("main_emmcsd1_refclk_sel_out0", main_emmcsd1_refclk_sel_out0_parents, 2, 0x108168, 0, 1, 0),
CLK_MUX("main_gtcclk_sel_out0", main_gtcclk_sel_out0_parents, 8, 0x43008030, 0, 3, 0), CLK_MUX("main_gtcclk_sel_out0", main_gtcclk_sel_out0_parents, 8, 0x43008030, 0, 3, 0),
@ -262,6 +270,10 @@ static const struct dev_clk soc_dev_clk_data[] = {
DEV_CLK(36, 10, "board_0_cp_gemac_cpts0_rft_clk_out"), DEV_CLK(36, 10, "board_0_cp_gemac_cpts0_rft_clk_out"),
DEV_CLK(36, 11, "hsdiv4_16fft_main_1_hsdivout3_clk"), DEV_CLK(36, 11, "hsdiv4_16fft_main_1_hsdivout3_clk"),
DEV_CLK(36, 12, "postdiv4_16ff_main_2_hsdivout6_clk"), DEV_CLK(36, 12, "postdiv4_16ff_main_2_hsdivout6_clk"),
DEV_CLK(57, 1, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
DEV_CLK(57, 2, "main_emmcsd0_refclk_sel_out0"),
DEV_CLK(57, 3, "postdiv4_16ff_main_0_hsdivout5_clk"),
DEV_CLK(57, 4, "hsdiv4_16fft_main_2_hsdivout2_clk"),
DEV_CLK(36, 13, "cpsw_3guss_am67_main_0_cpts_genf0"), DEV_CLK(36, 13, "cpsw_3guss_am67_main_0_cpts_genf0"),
DEV_CLK(36, 14, "cpsw_3guss_am67_main_0_cpts_genf1"), DEV_CLK(36, 14, "cpsw_3guss_am67_main_0_cpts_genf1"),
DEV_CLK(58, 0, "main_emmcsd1_io_clklb_sel_out0"), DEV_CLK(58, 0, "main_emmcsd1_io_clklb_sel_out0"),

50
arch/arm/mach-k3/r5/j722s/dev-data.c
View File

@ -23,18 +23,19 @@ static struct ti_pd soc_pd_list[] = {
static struct ti_lpsc soc_lpsc_list[] = { static struct ti_lpsc soc_lpsc_list[] = {
[0] = PSC_LPSC(0, &soc_psc_list[0], &soc_pd_list[0], NULL), [0] = PSC_LPSC(0, &soc_psc_list[0], &soc_pd_list[0], NULL),
[1] = PSC_LPSC(12, &soc_psc_list[0], &soc_pd_list[0], &soc_lpsc_list[4]), [1] = PSC_LPSC(12, &soc_psc_list[0], &soc_pd_list[0], &soc_lpsc_list[5]),
[2] = PSC_LPSC(13, &soc_psc_list[0], &soc_pd_list[0], &soc_lpsc_list[4]), [2] = PSC_LPSC(13, &soc_psc_list[0], &soc_pd_list[0], &soc_lpsc_list[5]),
[3] = PSC_LPSC(21, &soc_psc_list[0], &soc_pd_list[0], &soc_lpsc_list[6]), [3] = PSC_LPSC(20, &soc_psc_list[0], &soc_pd_list[0], &soc_lpsc_list[7]),
[4] = PSC_LPSC(23, &soc_psc_list[0], &soc_pd_list[0], &soc_lpsc_list[6]), [4] = PSC_LPSC(21, &soc_psc_list[0], &soc_pd_list[0], &soc_lpsc_list[7]),
[5] = PSC_LPSC(28, &soc_psc_list[0], &soc_pd_list[0], &soc_lpsc_list[6]), [5] = PSC_LPSC(23, &soc_psc_list[0], &soc_pd_list[0], &soc_lpsc_list[7]),
[6] = PSC_LPSC(34, &soc_psc_list[0], &soc_pd_list[0], &soc_lpsc_list[6]), [6] = PSC_LPSC(28, &soc_psc_list[0], &soc_pd_list[0], &soc_lpsc_list[7]),
[7] = PSC_LPSC(42, &soc_psc_list[0], &soc_pd_list[0], &soc_lpsc_list[6]), [7] = PSC_LPSC(34, &soc_psc_list[0], &soc_pd_list[0], &soc_lpsc_list[7]),
[8] = PSC_LPSC(53, &soc_psc_list[0], &soc_pd_list[1], &soc_lpsc_list[6]), [8] = PSC_LPSC(42, &soc_psc_list[0], &soc_pd_list[0], &soc_lpsc_list[7]),
[9] = PSC_LPSC(56, &soc_psc_list[0], &soc_pd_list[2], &soc_lpsc_list[8]), [9] = PSC_LPSC(53, &soc_psc_list[0], &soc_pd_list[1], &soc_lpsc_list[7]),
[10] = PSC_LPSC(72, &soc_psc_list[0], &soc_pd_list[3], &soc_lpsc_list[6]), [10] = PSC_LPSC(56, &soc_psc_list[0], &soc_pd_list[2], &soc_lpsc_list[9]),
[11] = PSC_LPSC(73, &soc_psc_list[0], &soc_pd_list[3], &soc_lpsc_list[10]), [11] = PSC_LPSC(72, &soc_psc_list[0], &soc_pd_list[3], &soc_lpsc_list[7]),
[12] = PSC_LPSC(74, &soc_psc_list[0], &soc_pd_list[3], &soc_lpsc_list[11]), [12] = PSC_LPSC(73, &soc_psc_list[0], &soc_pd_list[3], &soc_lpsc_list[11]),
[13] = PSC_LPSC(74, &soc_psc_list[0], &soc_pd_list[3], &soc_lpsc_list[12]),
}; };
static struct ti_dev soc_dev_list[] = { static struct ti_dev soc_dev_list[] = {
@ -43,18 +44,19 @@ static struct ti_dev soc_dev_list[] = {
PSC_DEV(61, &soc_lpsc_list[0]), PSC_DEV(61, &soc_lpsc_list[0]),
PSC_DEV(178, &soc_lpsc_list[1]), PSC_DEV(178, &soc_lpsc_list[1]),
PSC_DEV(179, &soc_lpsc_list[2]), PSC_DEV(179, &soc_lpsc_list[2]),
PSC_DEV(58, &soc_lpsc_list[3]), PSC_DEV(57, &soc_lpsc_list[3]),
PSC_DEV(161, &soc_lpsc_list[4]), PSC_DEV(58, &soc_lpsc_list[4]),
PSC_DEV(75, &soc_lpsc_list[5]), PSC_DEV(161, &soc_lpsc_list[5]),
PSC_DEV(36, &soc_lpsc_list[6]), PSC_DEV(75, &soc_lpsc_list[6]),
PSC_DEV(102, &soc_lpsc_list[6]), PSC_DEV(36, &soc_lpsc_list[7]),
PSC_DEV(146, &soc_lpsc_list[6]), PSC_DEV(102, &soc_lpsc_list[7]),
PSC_DEV(13, &soc_lpsc_list[7]), PSC_DEV(146, &soc_lpsc_list[7]),
PSC_DEV(166, &soc_lpsc_list[8]), PSC_DEV(13, &soc_lpsc_list[8]),
PSC_DEV(135, &soc_lpsc_list[9]), PSC_DEV(166, &soc_lpsc_list[9]),
PSC_DEV(170, &soc_lpsc_list[10]), PSC_DEV(135, &soc_lpsc_list[10]),
PSC_DEV(177, &soc_lpsc_list[11]), PSC_DEV(170, &soc_lpsc_list[11]),
PSC_DEV(55, &soc_lpsc_list[12]), PSC_DEV(177, &soc_lpsc_list[12]),
PSC_DEV(55, &soc_lpsc_list[13]),
}; };
const struct ti_k3_pd_platdata j722s_pd_platdata = { const struct ti_k3_pd_platdata j722s_pd_platdata = {