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arm: stm32mp: cmd_stm32key: update command for stm32mp25x
Update key table for stm32mp25 platform. Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
This commit is contained in:
Patrice Chotard
parent
d6c679cc77
commit
c3bf98f73d
@ -14,12 +14,23 @@
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/*
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* Closed device: OTP0
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* STM32MP15x: bit 6 of OPT0
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* STM32MP15x: bit 6 of OTP0
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* STM32MP13x: 0b111111 = 0x3F for OTP_SECURED closed device
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* STM32MP25x: bit 0 of OTP18
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*/
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#define STM32_OTP_CLOSE_ID 0
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#define STM32_OTP_STM32MP13X_CLOSE_MASK 0x3F
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#define STM32_OTP_STM32MP15X_CLOSE_MASK BIT(6)
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#define STM32MP1_OTP_CLOSE_ID 0
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#define STM32_OTP_STM32MP13X_CLOSE_MASK GENMASK(5, 0)
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#define STM32_OTP_STM32MP15X_CLOSE_MASK BIT(6)
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#define STM32MP25_OTP_WORD8 8
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#define STM32_OTP_STM32MP25X_BOOTROM_CLOSE_MASK GENMASK(7, 0)
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#define STM32MP25_OTP_CLOSE_ID 18
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#define STM32_OTP_STM32MP25X_CLOSE_MASK GENMASK(3, 0)
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#define STM32_OTP_STM32MP25X_PROVISIONING_DONE_MASK GENMASK(7, 4)
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#define STM32MP25_OTP_HWCONFIG 124
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#define STM32_OTP_STM32MP25X_DISABLE_SCAN_MASK BIT(20)
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#define STM32MP25_OTP_BOOTROM_CONF8 17
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#define STM32_OTP_STM32MP25X_OEM_KEY2_EN BIT(8)
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/* PKH is the first element of the key list */
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#define STM32KEY_PKH 0
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@ -27,8 +38,9 @@
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struct stm32key {
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char *name;
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char *desc;
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u8 start;
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u16 start;
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u8 size;
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int (*post_process)(struct udevice *dev);
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};
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const struct stm32key stm32mp13_list[] = {
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@ -55,6 +67,99 @@ const struct stm32key stm32mp15_list[] = {
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}
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};
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static int post_process_oem_key2(struct udevice *dev);
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const struct stm32key stm32mp25_list[] = {
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[STM32KEY_PKH] = {
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.name = "OEM-KEY1",
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.desc = "Hash of the 8 ECC Public Keys Hashes Table (ECDSA is the authentication algorithm) for FSBLA or M",
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.start = 144,
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.size = 8,
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},
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{
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.name = "OEM-KEY2",
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.desc = "Hash of the 8 ECC Public Keys Hashes Table (ECDSA is the authentication algorithm) for FSBLM",
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.start = 152,
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.size = 8,
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.post_process = post_process_oem_key2,
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},
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{
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.name = "FIP-EDMK",
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.desc = "Encryption/Decryption Master Key for FIP",
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.start = 260,
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.size = 8,
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},
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{
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.name = "EDMK1",
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.desc = "Encryption/Decryption Master Key for FSBLA or M",
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.start = 364,
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.size = 4,
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},
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{
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.name = "EDMK2",
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.desc = "Encryption/Decryption Master Key for FSBLM",
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.start = 360,
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.size = 4,
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}
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};
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struct otp_close {
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u32 word;
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u32 mask_wr;
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u32 mask_rd;
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bool (*close_status_ops)(u32 value, u32 mask);
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};
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static bool compare_mask_exact(u32 value, u32 mask)
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{
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return ((value & mask) == mask);
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}
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static bool compare_any_bits(u32 value, u32 mask)
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{
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return ((value & mask) != 0);
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}
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const struct otp_close stm32mp13_close_state_otp[] = {
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{
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.word = STM32MP1_OTP_CLOSE_ID,
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.mask_wr = STM32_OTP_STM32MP13X_CLOSE_MASK,
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.mask_rd = STM32_OTP_STM32MP13X_CLOSE_MASK,
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.close_status_ops = compare_mask_exact,
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}
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};
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const struct otp_close stm32mp15_close_state_otp[] = {
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{
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.word = STM32MP1_OTP_CLOSE_ID,
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.mask_wr = STM32_OTP_STM32MP15X_CLOSE_MASK,
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.mask_rd = STM32_OTP_STM32MP15X_CLOSE_MASK,
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.close_status_ops = compare_mask_exact,
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}
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};
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const struct otp_close stm32mp25_close_state_otp[] = {
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{
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.word = STM32MP25_OTP_WORD8,
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.mask_wr = STM32_OTP_STM32MP25X_BOOTROM_CLOSE_MASK,
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.mask_rd = 0,
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.close_status_ops = NULL
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},
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{
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.word = STM32MP25_OTP_CLOSE_ID,
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.mask_wr = STM32_OTP_STM32MP25X_CLOSE_MASK |
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STM32_OTP_STM32MP25X_PROVISIONING_DONE_MASK,
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.mask_rd = STM32_OTP_STM32MP25X_CLOSE_MASK,
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.close_status_ops = compare_any_bits
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},
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{
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.word = STM32MP25_OTP_HWCONFIG,
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.mask_wr = STM32_OTP_STM32MP25X_DISABLE_SCAN_MASK,
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.mask_rd = 0,
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.close_status_ops = NULL
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},
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};
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/* index of current selected key in stm32key list, 0 = PKH by default */
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static u8 stm32key_index;
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@ -65,6 +170,9 @@ static u8 get_key_nb(void)
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if (IS_ENABLED(CONFIG_STM32MP15X))
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return ARRAY_SIZE(stm32mp15_list);
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if (IS_ENABLED(CONFIG_STM32MP25X))
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return ARRAY_SIZE(stm32mp25_list);
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}
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static const struct stm32key *get_key(u8 index)
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@ -74,15 +182,33 @@ static const struct stm32key *get_key(u8 index)
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if (IS_ENABLED(CONFIG_STM32MP15X))
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return &stm32mp15_list[index];
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if (IS_ENABLED(CONFIG_STM32MP25X))
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return &stm32mp25_list[index];
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}
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static u32 get_otp_close_mask(void)
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static u8 get_otp_close_state_nb(void)
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{
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if (IS_ENABLED(CONFIG_STM32MP13X))
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return STM32_OTP_STM32MP13X_CLOSE_MASK;
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return ARRAY_SIZE(stm32mp13_close_state_otp);
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if (IS_ENABLED(CONFIG_STM32MP15X))
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return STM32_OTP_STM32MP15X_CLOSE_MASK;
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return ARRAY_SIZE(stm32mp15_close_state_otp);
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if (IS_ENABLED(CONFIG_STM32MP25X))
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return ARRAY_SIZE(stm32mp25_close_state_otp);
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}
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static const struct otp_close *get_otp_close_state(u8 index)
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{
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if (IS_ENABLED(CONFIG_STM32MP13X))
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return &stm32mp13_close_state_otp[index];
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if (IS_ENABLED(CONFIG_STM32MP15X))
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return &stm32mp15_close_state_otp[index];
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if (IS_ENABLED(CONFIG_STM32MP25X))
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return &stm32mp25_close_state_otp[index];
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}
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static int get_misc_dev(struct udevice **dev)
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@ -96,13 +222,13 @@ static int get_misc_dev(struct udevice **dev)
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return ret;
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}
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static void read_key_value(const struct stm32key *key, u32 addr)
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static void read_key_value(const struct stm32key *key, unsigned long addr)
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{
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int i;
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for (i = 0; i < key->size; i++) {
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printf("%s OTP %i: [%08x] %08x\n", key->name, key->start + i,
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addr, __be32_to_cpu(*(u32 *)addr));
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(u32)addr, __be32_to_cpu(*(u32 *)addr));
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addr += 4;
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}
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}
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@ -157,26 +283,42 @@ static int read_key_otp(struct udevice *dev, const struct stm32key *key, bool pr
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static int read_close_status(struct udevice *dev, bool print, bool *closed)
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{
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int word, ret, result;
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u32 val, lock, mask;
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bool status;
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int ret, result, i;
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const struct otp_close *otp_close = NULL;
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u32 otp_close_nb = get_otp_close_state_nb();
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u32 val, lock, mask, word = 0;
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bool status = true;
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bool tested_once = false;
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result = 0;
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word = STM32_OTP_CLOSE_ID;
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ret = misc_read(dev, STM32_BSEC_OTP(word), &val, 4);
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if (ret < 0)
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result = ret;
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if (ret != 4)
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val = 0x0;
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for (i = 0; status && (i < otp_close_nb); i++) {
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otp_close = get_otp_close_state(i);
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ret = misc_read(dev, STM32_BSEC_LOCK(word), &lock, 4);
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if (ret < 0)
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result = ret;
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if (ret != 4)
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lock = BSEC_LOCK_ERROR;
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if (!otp_close->close_status_ops)
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continue;
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mask = otp_close->mask_rd;
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word = otp_close->word;
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ret = misc_read(dev, STM32_BSEC_OTP(word), &val, 4);
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if (ret < 0)
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result = ret;
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if (ret != 4)
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val = 0x0;
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ret = misc_read(dev, STM32_BSEC_LOCK(word), &lock, 4);
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if (ret < 0)
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result = ret;
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if (ret != 4)
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lock = BSEC_LOCK_ERROR;
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status = otp_close->close_status_ops(val, mask);
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tested_once = true;
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}
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if (!tested_once)
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status = false;
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mask = get_otp_close_mask();
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status = (val & mask) == mask;
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if (closed)
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*closed = status;
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if (print)
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@ -185,7 +327,49 @@ static int read_close_status(struct udevice *dev, bool print, bool *closed)
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return result;
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}
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static int fuse_key_value(struct udevice *dev, const struct stm32key *key, u32 addr, bool print)
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static int write_close_status(struct udevice *dev)
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{
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int i;
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u32 val, word, ret;
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const struct otp_close *otp_close = NULL;
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u32 otp_num = get_otp_close_state_nb();
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for (i = 0; i < otp_num; i++) {
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otp_close = get_otp_close_state(i);
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val = otp_close->mask_wr;
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word = otp_close->word;
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ret = misc_write(dev, STM32_BSEC_OTP(word), &val, 4);
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if (ret != 4) {
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log_err("Error: can't update OTP %d\n", word);
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return ret;
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}
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}
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return 0;
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}
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static int post_process_oem_key2(struct udevice *dev)
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{
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int ret;
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u32 val;
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ret = misc_read(dev, STM32_BSEC_OTP(STM32MP25_OTP_BOOTROM_CONF8), &val, 4);
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if (ret != 4) {
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log_err("Error %d failed to read STM32MP25_OTP_BOOTROM_CONF8\n", ret);
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return -EIO;
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}
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val |= STM32_OTP_STM32MP25X_OEM_KEY2_EN;
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ret = misc_write(dev, STM32_BSEC_OTP(STM32MP25_OTP_BOOTROM_CONF8), &val, 4);
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if (ret != 4) {
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log_err("Error %d failed to write OEM_KEY2_ENABLE\n", ret);
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return -EIO;
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}
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return 0;
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}
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static int fuse_key_value(struct udevice *dev, const struct stm32key *key, unsigned long addr,
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bool print)
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{
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u32 word, val;
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int i, ret;
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@ -229,7 +413,7 @@ static int confirm_prog(void)
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static void display_key_info(const struct stm32key *key)
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{
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printf("%s : %s\n", key->name, key->desc);
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printf("\tOTP%d..%d\n", key->start, key->start + key->size);
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printf("\tOTP%d..%d\n", key->start, key->start + key->size - 1);
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}
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static int do_stm32key_list(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
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@ -272,7 +456,7 @@ static int do_stm32key_read(struct cmd_tbl *cmdtp, int flag, int argc, char *con
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{
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const struct stm32key *key;
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struct udevice *dev;
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u32 addr;
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unsigned long addr;
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int ret, i;
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int result;
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@ -310,7 +494,7 @@ static int do_stm32key_read(struct cmd_tbl *cmdtp, int flag, int argc, char *con
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return CMD_RET_USAGE;
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key = get_key(stm32key_index);
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printf("Read %s at 0x%08x\n", key->name, addr);
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printf("Read %s at 0x%08x\n", key->name, (u32)addr);
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read_key_value(key, addr);
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return CMD_RET_SUCCESS;
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@ -320,7 +504,7 @@ static int do_stm32key_fuse(struct cmd_tbl *cmdtp, int flag, int argc, char *con
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{
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const struct stm32key *key = get_key(stm32key_index);
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struct udevice *dev;
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u32 addr;
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unsigned long addr;
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int ret;
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bool yes = false, lock;
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@ -361,6 +545,13 @@ static int do_stm32key_fuse(struct cmd_tbl *cmdtp, int flag, int argc, char *con
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if (fuse_key_value(dev, key, addr, !yes))
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return CMD_RET_FAILURE;
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if (key->post_process) {
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if (key->post_process(dev)) {
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printf("Error: %s for post process\n", key->name);
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return CMD_RET_FAILURE;
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}
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}
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printf("%s updated !\n", key->name);
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return CMD_RET_SUCCESS;
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@ -371,7 +562,6 @@ static int do_stm32key_close(struct cmd_tbl *cmdtp, int flag, int argc, char *co
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const struct stm32key *key;
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bool yes, lock, closed;
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struct udevice *dev;
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u32 val;
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int ret;
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yes = false;
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@ -407,12 +597,8 @@ static int do_stm32key_close(struct cmd_tbl *cmdtp, int flag, int argc, char *co
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if (!yes && !confirm_prog())
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return CMD_RET_FAILURE;
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val = get_otp_close_mask();
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ret = misc_write(dev, STM32_BSEC_OTP(STM32_OTP_CLOSE_ID), &val, 4);
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if (ret != 4) {
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printf("Error: can't update OTP %d\n", STM32_OTP_CLOSE_ID);
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if (write_close_status(dev))
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return CMD_RET_FAILURE;
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}
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printf("Device is closed !\n");
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