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am33xx: Correct and expand comments on CONFIG_SPL_MAX_SIZE
We had been allowing the max size to be larger than actually allowed by the ROM. Expand the commentary here to explain why we set these locations. Signed-off-by: Tom Rini <trini@ti.com>
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@ -18,7 +18,7 @@
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#ifdef CONFIG_AM33XX
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#ifdef CONFIG_AM33XX
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#define NON_SECURE_SRAM_START 0x402F0400
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#define NON_SECURE_SRAM_START 0x402F0400
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#define NON_SECURE_SRAM_END 0x40310000
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#define NON_SECURE_SRAM_END 0x40310000
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#define SRAM_SCRATCH_SPACE_ADDR 0x4030C000
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#define SRAM_SCRATCH_SPACE_ADDR 0x4030B800
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#elif defined(CONFIG_TI81XX)
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#elif defined(CONFIG_TI81XX)
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#define NON_SECURE_SRAM_START 0x40300000
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#define NON_SECURE_SRAM_START 0x40300000
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#define NON_SECURE_SRAM_END 0x40320000
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#define NON_SECURE_SRAM_END 0x40320000
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@ -41,9 +41,15 @@
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#define CONFIG_BOOTP_SUBNETMASK
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#define CONFIG_BOOTP_SUBNETMASK
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#define CONFIG_NET_RETRY_COUNT 10
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#define CONFIG_NET_RETRY_COUNT 10
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/* SPL defines. */
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/*
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* SPL related defines. The Public RAM memory map the ROM defines the
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* area between 0x402F0400 and 0x4030B800 as a download area and
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* 0x4030B800 to 0x4030CE00 as a public stack area. The ROM also
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* supports X-MODEM loading via UART, and we leverage this and then use
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* Y-MODEM to load u-boot.img, when booted over UART.
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*/
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#define CONFIG_SPL_TEXT_BASE 0x402F0400
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#define CONFIG_SPL_TEXT_BASE 0x402F0400
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#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE)
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#define CONFIG_SPL_MAX_SIZE (0x4030B800 - CONFIG_SPL_TEXT_BASE)
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#define CONFIG_SPL_YMODEM_SUPPORT
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#define CONFIG_SPL_YMODEM_SUPPORT
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/*
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/*
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