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armv7: Add workaround for USB erratum A-009798

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The default setting for USB High Speed Squelch Threshold results
in a threshold close to or lower than 100mV. This leads to Receive
Compliance test failure for a 100mV threshold.

Shift the threshold from ~100mV towards ~130mV by setting SQRXTUNE
to 0x0 to pass USB High Speed Receiver Sensitivity Compliance test.

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: Reordered Kconfig options]
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Ran Wang 2017-09-04 18:46:53 +08:00 committed by York Sun
parent 83fa71189a
commit c1853f6f73
3 changed files with 17 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
arch/arm/cpu/armv7/ls102xa/Kconfig
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@ -4,6 +4,7 @@ config ARCH_LS1021A
select SYS_FSL_ERRATUM_A008407 select SYS_FSL_ERRATUM_A008407
select SYS_FSL_ERRATUM_A009008 select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009663 select SYS_FSL_ERRATUM_A009663
select SYS_FSL_ERRATUM_A009798
select SYS_FSL_ERRATUM_A009942 select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_A010315 select SYS_FSL_ERRATUM_A010315
select SYS_FSL_HAS_CCI400 select SYS_FSL_HAS_CCI400
@ -64,6 +65,11 @@ config SYS_FSL_ERRATUM_A009008
help help
Workaround for USB PHY erratum A009008 Workaround for USB PHY erratum A009008
config SYS_FSL_ERRATUM_A009798
bool
help
Workaround for USB PHY erratum A009798
config SYS_FSL_ERRATUM_A010315 config SYS_FSL_ERRATUM_A010315
bool "Workaround for PCIe erratum A010315" bool "Workaround for PCIe erratum A010315"

10
arch/arm/cpu/armv7/ls102xa/soc.c
View File

@ -71,6 +71,15 @@ static void erratum_a009008(void)
#endif /* CONFIG_SYS_FSL_ERRATUM_A009008 */ #endif /* CONFIG_SYS_FSL_ERRATUM_A009008 */
} }
static void erratum_a009798(void)
{
#ifdef CONFIG_SYS_FSL_ERRATUM_A009798
u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
clrbits_be32(scfg + SCFG_USB3PRM1CR / 4,
SCFG_USB_SQRXTUNE_MASK << 23);
#endif /* CONFIG_SYS_FSL_ERRATUM_A009798 */
}
void s_init(void) void s_init(void)
{ {
@ -161,6 +170,7 @@ int arch_soc_init(void)
/* Erratum */ /* Erratum */
erratum_a009008(); erratum_a009008();
erratum_a009798();
return 0; return 0;
} }

1
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
View File

@ -177,6 +177,7 @@ struct ccsr_gur {
#define SCFG_BASE 0x01570000 #define SCFG_BASE 0x01570000
#define SCFG_USB3PRM1CR 0x070 #define SCFG_USB3PRM1CR 0x070
#define SCFG_USB_TXVREFTUNE 0x9 #define SCFG_USB_TXVREFTUNE 0x9
#define SCFG_USB_SQRXTUNE_MASK 0x7
/* Supplemental Configuration Unit */ /* Supplemental Configuration Unit */
struct ccsr_scfg { struct ccsr_scfg {