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drivers/fsl-mc: Autoload AOIP image from NOR flash
Load AIOP image from NOR flash into DDR so that the MC firmware the MC fw can start it at boot time Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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c1000c12d3
@ -321,6 +321,23 @@ static unsigned long get_mc_boot_timeout_ms(void)
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return timeout_ms;
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return timeout_ms;
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}
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}
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#ifdef CONFIG_SYS_LS_MC_AIOP_IMG_IN_NOR
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static int load_mc_aiop_img(u64 mc_ram_addr, size_t mc_ram_size)
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{
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void *aiop_img;
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/*
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* Load the MC AIOP image in the MC private DRAM block:
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*/
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aiop_img = (void *)CONFIG_SYS_LS_MC_AIOP_IMG_ADDR;
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mc_copy_image("MC AIOP image",
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(u64)aiop_img, CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH,
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mc_ram_addr + CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
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return 0;
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}
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#endif
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static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr)
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static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr)
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{
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{
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u32 reg_gsr;
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u32 reg_gsr;
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@ -440,6 +457,12 @@ int mc_init(void)
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if (error != 0)
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if (error != 0)
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goto out;
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goto out;
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#ifdef CONFIG_SYS_LS_MC_AIOP_IMG_IN_NOR
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error = load_mc_aiop_img(mc_ram_addr, mc_ram_size);
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if (error != 0)
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goto out;
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#endif
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debug("mc_ccsr_regs %p\n", mc_ccsr_regs);
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debug("mc_ccsr_regs %p\n", mc_ccsr_regs);
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dump_mc_ccsr_regs(mc_ccsr_regs);
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dump_mc_ccsr_regs(mc_ccsr_regs);
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@ -174,6 +174,8 @@ unsigned long long get_qixis_addr(void);
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#define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET 0x00F00000
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#define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET 0x00F00000
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#define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH 0x20000
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#define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH 0x20000
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#define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 0x00F20000
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#define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 0x00F20000
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#define CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH 0x200000
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#define CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 0x07000000
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/*
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/*
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* Carve out a DDR region which will not be used by u-boot/Linux
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* Carve out a DDR region which will not be used by u-boot/Linux
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@ -260,6 +260,8 @@ unsigned long get_board_ddr_clk(void);
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#define CONFIG_SYS_LS_MC_DPC_ADDR 0x580800000ULL
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#define CONFIG_SYS_LS_MC_DPC_ADDR 0x580800000ULL
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#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
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#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
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#define CONFIG_SYS_LS_MC_AIOP_IMG_IN_NOR
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#define CONFIG_SYS_LS_MC_AIOP_IMG_ADDR 0x580900000ULL
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/*
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/*
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* I2C
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* I2C
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@ -233,6 +233,8 @@ unsigned long get_board_sys_clk(void);
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#define CONFIG_SYS_LS_MC_DPC_ADDR 0x580800000ULL
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#define CONFIG_SYS_LS_MC_DPC_ADDR 0x580800000ULL
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#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
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#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
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#define CONFIG_SYS_LS_MC_AIOP_IMG_IN_NOR
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#define CONFIG_SYS_LS_MC_AIOP_IMG_ADDR 0x580900000ULL
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/*
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/*
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* I2C
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* I2C
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