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Merge tag 'u-boot-imx-master-20240420' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

Browse Source 
CI:
https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/20444

- Make i.MX93 boot less verbose.
- Remove unneedd environment variables from Toradex i.MX boards.
- Use gpio-hog on verdin-imx8mm/imx8mp.
- Add PCIe support for i.MX8MM.
- Add TPM support for imx8m*-venice.
This commit is contained in:
Tom Rini 2024-04-20 15:16:17 -06:00
commit c086852891
19 changed files with 121 additions and 54 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi
View File

@ -60,6 +60,11 @@
ctrl-sleep-moci-hog {
bootph-pre-ram;
gpio-hog;
output-high;
gpios = <1 GPIO_ACTIVE_HIGH>;
line-name = "CTRL_SLEEP_MOCI#";
};
};

4
arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi
View File

@ -58,6 +58,10 @@
ctrl-sleep-moci-hog {
bootph-pre-ram;
gpio-hog;
output-high;
gpios = <29 GPIO_ACTIVE_HIGH>;
line-name = "CTRL_SLEEP_MOCI#";
};
};

4
board/freescale/imx93_evk/spl.c
View File

@ -120,8 +120,8 @@ void board_init_f(ulong dummy)
if (ret) {
printf("Fail to init Sentinel API\n");
} else {
printf("SOC: 0x%x\n", gd->arch.soc_rev);
printf("LC: 0x%x\n", gd->arch.lifecycle);
debug("SOC: 0x%x\n", gd->arch.soc_rev);
debug("LC: 0x%x\n", gd->arch.lifecycle);
}
power_init_board();

7
board/gateworks/venice/venice.c
View File

@ -230,6 +230,7 @@ uint mmc_get_env_part(struct mmc *mmc)
int ft_board_setup(void *fdt, struct bd_info *bd)
{
const char *base_model = eeprom_get_baseboard_model();
const char *path;
char pcbrev;
int off;
@ -238,10 +239,10 @@ int ft_board_setup(void *fdt, struct bd_info *bd)
if (!strncmp(base_model, "GW73", 4)) {
pcbrev = get_pcb_rev(base_model);
path = fdt_get_alias(fdt, "ethernet1");
if (pcbrev > 'B' && pcbrev < 'E') {
printf("adjusting dt for %s\n", base_model);
if (pcbrev > 'B' && pcbrev < 'E' && path && !strncmp(path, "/soc@0/pcie@", 12)) {
printf("adjusting %s pcie\n", base_model);
/*
* revC/D/E has PCIe 4-port switch which changes
* ethernet1 PCIe GbE:

4
board/phytec/phycore_imx93/spl.c
View File

@ -126,8 +126,8 @@ void board_init_f(ulong dummy)
if (ret) {
printf("Fail to init ELE API\n");
} else {
printf("SOC: 0x%x\n", gd->arch.soc_rev);
printf("LC: 0x%x\n", gd->arch.lifecycle);
debug("SOC: 0x%x\n", gd->arch.soc_rev);
debug("LC: 0x%x\n", gd->arch.lifecycle);
}
clock_init();

4
board/variscite/imx93_var_som/spl.c
View File

@ -125,8 +125,8 @@ void board_init_f(ulong dummy)
if (ret) {
printf("Fail to init ELE API\n");
} else {
printf("SOC: 0x%x\n", gd->arch.soc_rev);
printf("LC: 0x%x\n", gd->arch.lifecycle);
debug("SOC: 0x%x\n", gd->arch.soc_rev);
debug("LC: 0x%x\n", gd->arch.lifecycle);
}
power_init_board();

21
configs/imx8mm_venice_defconfig
View File

@ -12,6 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-venice-gw71xx-0x"
CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MM_VENICE=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
@ -20,6 +21,7 @@ CONFIG_SPL_STACK=0x920000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x3f8000
CONFIG_SYS_LOAD_ADDR=0x48200000
CONFIG_PCI=y
CONFIG_SYS_MEMTEST_START=0x40000000
CONFIG_SYS_MEMTEST_END=0x80000000
CONFIG_FIT=y
@ -60,14 +62,19 @@ CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP6=y
CONFIG_CMD_TFTPPUT=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
CONFIG_CMD_WGET=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_UUID=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_TPM=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
@ -83,6 +90,8 @@ CONFIG_ETHPRIME="eth0"
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_PROT_TCP_SACK=y
CONFIG_IPV6=y
CONFIG_SPL_DM=y
CONFIG_SPL_CLK_COMPOSITE_CCF=y
CONFIG_CLK_COMPOSITE_CCF=y
@ -114,6 +123,9 @@ CONFIG_PHY_GIGE=y
CONFIG_FEC_MXC=y
CONFIG_KSZ9477=y
CONFIG_MII=y
CONFIG_NVME_PCI=y
CONFIG_PCIE_DW_IMX=y
CONFIG_PHY_IMX8M_PCIE=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y
@ -127,14 +139,20 @@ CONFIG_SPL_DM_PMIC_MP5416=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
# CONFIG_DM_RNG is not set
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
CONFIG_SYSRESET_PSCI=y
CONFIG_SYSRESET_WATCHDOG=y
CONFIG_DM_THERMAL=y
CONFIG_IMX_TMU=y
# CONFIG_TPM_V1 is not set
CONFIG_TPM2_TIS_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_HOST_ETHER=y
@ -152,4 +170,7 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_IMX_WATCHDOG=y
CONFIG_TPM=y
# CONFIG_SPL_SHA512 is not set
# CONFIG_SPL_SHA384 is not set
CONFIG_HEXDUMP=y

15
configs/imx8mn_venice_defconfig
View File

@ -65,12 +65,16 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP6=y
CONFIG_CMD_TFTPPUT=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
CONFIG_CMD_WGET=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_UUID=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_TPM=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
@ -86,6 +90,8 @@ CONFIG_ETHPRIME="eth0"
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_PROT_TCP_SACK=y
CONFIG_IPV6=y
CONFIG_SPL_DM=y
CONFIG_SPL_CLK_IMX8MN=y
CONFIG_CLK_IMX8MN=y
@ -128,14 +134,20 @@ CONFIG_SPL_DM_PMIC_MP5416=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
# CONFIG_DM_RNG is not set
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
CONFIG_SYSRESET_PSCI=y
CONFIG_SYSRESET_WATCHDOG=y
CONFIG_DM_THERMAL=y
CONFIG_IMX_TMU=y
# CONFIG_TPM_V1 is not set
CONFIG_TPM2_TIS_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_HOST_ETHER=y
@ -153,4 +165,7 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_IMX_WATCHDOG=y
CONFIG_TPM=y
# CONFIG_SPL_SHA512 is not set
# CONFIG_SPL_SHA384 is not set
CONFIG_HEXDUMP=y

15
configs/imx8mp_venice_defconfig
View File

@ -67,12 +67,16 @@ CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP6=y
CONFIG_CMD_TFTPPUT=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
CONFIG_CMD_WGET=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_UUID=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_TPM=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
@ -86,6 +90,8 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_PROT_TCP_SACK=y
CONFIG_IPV6=y
CONFIG_SPL_DM=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
@ -135,14 +141,20 @@ CONFIG_SPL_DM_PMIC_MP5416=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
# CONFIG_DM_RNG is not set
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
CONFIG_SYSRESET_PSCI=y
CONFIG_SYSRESET_WATCHDOG=y
CONFIG_DM_THERMAL=y
CONFIG_IMX_TMU=y
# CONFIG_TPM_V1 is not set
CONFIG_TPM2_TIS_SPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
@ -160,4 +172,7 @@ CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_IMX_WATCHDOG=y
CONFIG_TPM=y
# CONFIG_SPL_SHA512 is not set
# CONFIG_SPL_SHA384 is not set
CONFIG_HEXDUMP=y

27
drivers/clk/imx/clk-imx8mm.c
View File

@ -66,6 +66,17 @@ static const char *imx8mm_i2c3_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_
static const char *imx8mm_i2c4_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_pll2_50m", "sys_pll3_out", "audio_pll1_out",
"video_pll1_out", "audio_pll2_out", "sys_pll1_133m", };
#if CONFIG_IS_ENABLED(PCIE_DW_IMX)
static const char *imx8mm_pcie1_ctrl_sels[] = {"clock-osc-24m", "sys_pll2_250m", "sys_pll2_200m", "sys_pll1_266m",
"sys_pll1_800m", "sys_pll2_500m", "sys_pll2_333m", "sys_pll3_out", };
static const char *imx8mm_pcie1_phy_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll2_500m", "clk_ext1", "clk_ext2",
"clk_ext3", "clk_ext4", "sys_pll1_400m", };
static const char *imx8mm_pcie1_aux_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_pll2_50m", "sys_pll3_out",
"sys_pll2_100m", "sys_pll1_80m", "sys_pll1_160m", "sys_pll1_200m", };
#endif
#ifndef CONFIG_SPL_BUILD
static const char *imx8mm_pwm1_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll1_160m", "sys_pll1_40m",
"sys_pll3_out", "clk_ext1", "sys_pll1_80m", "video_pll1_out", };
@ -256,6 +267,17 @@ static int imx8mm_clk_probe(struct udevice *dev)
imx8m_clk_composite("usb_bus", imx8mm_usb_bus_sels, base + 0x8b80));
/* IP */
#if CONFIG_IS_ENABLED(PCIE_DW_IMX)
clk_dm(IMX8MM_CLK_PCIE1_CTRL,
imx8m_clk_composite("pcie1_ctrl", imx8mm_pcie1_ctrl_sels,
base + 0xa300));
clk_dm(IMX8MM_CLK_PCIE1_PHY,
imx8m_clk_composite("pcie1_phy", imx8mm_pcie1_phy_sels,
base + 0xa380));
clk_dm(IMX8MM_CLK_PCIE1_AUX,
imx8m_clk_composite("pcie1_aux", imx8mm_pcie1_aux_sels,
base + 0xa400));
#endif
clk_dm(IMX8MM_CLK_USDHC1,
imx8m_clk_composite("usdhc1", imx8mm_usdhc1_sels,
base + 0xac00));
@ -339,6 +361,11 @@ static int imx8mm_clk_probe(struct udevice *dev)
imx_clk_gate4("pwm4_root_clk", "pwm4", base + 0x42b0, 0));
#endif
#if CONFIG_IS_ENABLED(PCIE_DW_IMX)
clk_dm(IMX8MM_CLK_PCIE1_ROOT,
imx_clk_gate4("pcie1_root_clk", "pcie1_ctrl", base + 0x4250, 0));
#endif
#if CONFIG_IS_ENABLED(DM_SPI)
clk_dm(IMX8MM_CLK_ECSPI1,
imx8m_clk_composite("ecspi1", imx8mm_ecspi1_sels, base + 0xb280));

18
drivers/pci/pcie_dw_imx.c
View File

@ -56,6 +56,18 @@ struct pcie_dw_imx {
struct udevice *vpcie;
};
struct pcie_chip_info {
const char *gpr;
};
static const struct pcie_chip_info imx8mm_chip_info = {
.gpr = "fsl,imx8mm-iomuxc-gpr",
};
static const struct pcie_chip_info imx8mp_chip_info = {
.gpr = "fsl,imx8mp-iomuxc-gpr",
};
static void pcie_dw_configure(struct pcie_dw_imx *priv, u32 cap_speed)
{
dw_pcie_dbi_write_enable(&priv->dw, true);
@ -242,6 +254,7 @@ static int pcie_dw_imx_remove(struct udevice *dev)
static int pcie_dw_imx_of_to_plat(struct udevice *dev)
{
struct pcie_chip_info *info = (void *)dev_get_driver_data(dev);
struct pcie_dw_imx *priv = dev_get_priv(dev);
ofnode gpr;
int ret;
@ -287,7 +300,7 @@ static int pcie_dw_imx_of_to_plat(struct udevice *dev)
goto err_phy;
}
gpr = ofnode_by_compatible(ofnode_null(), "fsl,imx8mp-iomuxc-gpr");
gpr = ofnode_by_compatible(ofnode_null(), info->gpr);
if (ofnode_equal(gpr, ofnode_null())) {
dev_err(dev, "unable to find GPR node\n");
ret = -ENODEV;
@ -322,7 +335,8 @@ static const struct dm_pci_ops pcie_dw_imx_ops = {
};
static const struct udevice_id pcie_dw_imx_ids[] = {
{ .compatible = "fsl,imx8mp-pcie" },
{ .compatible = "fsl,imx8mm-pcie", .data = (ulong)&imx8mm_chip_info, },
{ .compatible = "fsl,imx8mp-pcie", .data = (ulong)&imx8mp_chip_info, },
{ }
};

2
include/configs/apalis-imx8.h
View File

@ -46,8 +46,6 @@
"fdt_board=eval\0" \
"initrd_addr=0x83800000\0" \
"initrd_high=0xffffffffffffffff\0" \
"setup=setenv setupargs console=tty1 console=${console},${baudrate} " \
"consoleblank=0 earlycon\0" \
"update_uboot=askenv confirm Did you load flash.bin resp. u-boot-dtb.imx (y/N)?; " \
"if test \"$confirm\" = \"y\"; then " \
"setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \

9
include/configs/apalis_imx6.h
View File

@ -64,12 +64,9 @@
#define CFG_EXTRA_ENV_SETTINGS \
BOOTENV \
"boot_file=zImage\0" \
"boot_script_dhcp=boot.scr\0" \
"console=ttymxc0\0" \
"defargs=enable_wait_mode=off vmalloc=400M\0" \
"fdt_board=eval\0" \
"fdt_fixup=;\0" \
MEM_LAYOUT_ENV_SETTINGS \
UBOOT_UPDATE \
"setethupdate=if env exists ethaddr; then; else setenv ethaddr " \
@ -80,16 +77,12 @@
"|| setenv drive 2; mmc rescan; load ${interface} ${drive}:1" \
" ${loadaddr} flash_blk.img && " \
"source ${loadaddr}\0" \
"setup=setenv setupargs fec_mac=${ethaddr} " \
"consoleblank=0 no_console_suspend=1 console=tty1 " \
"console=${console},${baudrate}n8\0 " \
"setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \
"setusbupdate=usb start && setenv interface usb; setenv drive 0; " \
"load ${interface} ${drive}:1 ${loadaddr} flash_blk.img && " \
"source ${loadaddr}\0" \
"splashpos=m,m\0" \
"splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"vidargs=mxc_hdmi.only_cea=1 fbmem=32M\0"
"splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0"
/* Miscellaneous configurable options */

10
include/configs/colibri-imx6ull.h
View File

@ -48,8 +48,8 @@
"ubiargs=ubi.mtd=ubi root=ubi0:rootfs rw rootfstype=ubifs " \
"ubi.fm_autoconvert=1\0" \
"ubiboot=run setup; " \
"setenv bootargs ${defargs} ${ubiargs} " \
"${setupargs} ${vidargs} ${tdxargs}; echo Booting from NAND...; " \
"setenv bootargs ${ubiargs} " \
"${setupargs} ${tdxargs}; echo Booting from NAND...; " \
"ubi part ubi &&" \
"ubi read ${kernel_addr_r} kernel && " \
"ubi read ${fdt_addr_r} dtb && " \
@ -86,11 +86,7 @@
UBOOT_UPDATE \
"boot_script_dhcp=boot.scr\0" \
"console=ttymxc0\0" \
"defargs=user_debug=30\0" \
"fdt_board=eval-v3\0" \
"fdt_fixup=;\0" \
"ip_dyn=yes\0" \
"kernel_file=zImage\0" \
"setethupdate=if env exists ethaddr; then; else setenv ethaddr " \
"00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \
"${board}/flash_eth.img && source ${loadaddr}\0" \
@ -99,7 +95,7 @@
"${board}/flash_blk.img && source ${loadaddr}\0" \
"setup=setenv setupargs " \
"console=tty1 console=${console}" \
",${baudrate}n8 ${memargs} ${mtdparts} consoleblank=0\0" \
",${baudrate}n8 ${memargs} ${mtdparts}\0" \
"setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \
"setusbupdate=usb start && setenv interface usb && " \
"fatload ${interface} 0:1 ${loadaddr} " \

2
include/configs/colibri-imx8x.h
View File

@ -40,8 +40,6 @@
"fdt_board=eval-v3\0" \
"initrd_addr=0x83800000\0" \
"initrd_high=0xffffffffffffffff\0" \
"setup=setenv setupargs console=tty1 console=${console},${baudrate} " \
"consoleblank=0 earlycon\0" \
"update_uboot=askenv confirm Did you load flash.bin resp. u-boot-dtb.imx (y/N)?; " \
"if test \"$confirm\" = \"y\"; then " \
"setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \

9
include/configs/colibri_imx6.h
View File

@ -58,12 +58,9 @@
#define CFG_EXTRA_ENV_SETTINGS \
BOOTENV \
"boot_file=zImage\0" \
"boot_script_dhcp=boot.scr\0" \
"console=ttymxc0\0" \
"defargs=enable_wait_mode=off galcore.contiguousSize=50331648\0" \
"fdt_board=eval-v3\0" \
"fdt_fixup=;\0" \
MEM_LAYOUT_ENV_SETTINGS \
UBOOT_UPDATE \
"setethupdate=if env exists ethaddr; then; else setenv ethaddr " \
@ -72,16 +69,12 @@
"setsdupdate=setenv interface mmc; setenv drive 1; mmc rescan; load " \
"${interface} ${drive}:1 ${loadaddr} flash_blk.img && " \
"source ${loadaddr}\0" \
"setup=setenv setupargs fec_mac=${ethaddr} " \
"consoleblank=0 no_console_suspend=1 console=tty1 " \
"console=${console},${baudrate}n8\0 " \
"setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \
"setusbupdate=usb start && setenv interface usb; setenv drive 0; " \
"load ${interface} ${drive}:1 ${loadaddr} flash_blk.img && " \
"source ${loadaddr}\0" \
"splashpos=m,m\0" \
"splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"vidargs=fbmem=8M\0"
"splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0"
/* Miscellaneous configurable options */

11
include/configs/colibri_imx7.h
View File

@ -89,8 +89,8 @@
"ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \
"ubi.fm_autoconvert=1\0" \
"ubiboot=run setup; " \
"setenv bootargs ${defargs} ${ubiargs} " \
"${setupargs} ${vidargs} ${tdxargs}; echo Booting from NAND...; " \
"setenv bootargs ${ubiargs} " \
"${setupargs} ${tdxargs}; echo Booting from NAND...; " \
"ubi part ubi && run m4boot && " \
"ubi read ${kernel_addr_r} kernel && " \
"ubi read ${fdt_addr_r} dtb && " \
@ -123,15 +123,10 @@
MEM_LAYOUT_ENV_SETTINGS \
MODULE_EXTRA_ENV_SETTINGS \
UBOOT_UPDATE \
"boot_file=zImage\0" \
"boot_script_dhcp=boot.scr\0" \
"console=ttymxc0\0" \
"defargs=\0" \
"fdt_board=eval-v3\0" \
"fdt_fixup=;\0" \
"m4boot=;\0" \
"ip_dyn=yes\0" \
"kernel_file=zImage\0" \
"setethupdate=if env exists ethaddr; then; else setenv ethaddr " \
"00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \
"${board}/flash_eth.img && source ${loadaddr}\0" \
@ -140,7 +135,7 @@
"${board}/flash_blk.img && source ${loadaddr}\0" \
"setup=setenv setupargs " \
"console=tty1 console=${console}" \
",${baudrate}n8 ${memargs} ${mtdparts} consoleblank=0\0" \
",${baudrate}n8 ${memargs} ${mtdparts}\0" \
"setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \
"setusbupdate=usb start && setenv interface usb && " \
"fatload ${interface} 0:1 ${loadaddr} " \

3
include/configs/verdin-imx8mm.h
View File

@ -37,14 +37,11 @@
#define CFG_EXTRA_ENV_SETTINGS \
BOOTENV \
MEM_LAYOUT_ENV_SETTINGS \
"boot_file=Image\0" \
"boot_script_dhcp=boot.scr\0" \
"console=ttymxc0\0" \
"fdt_board=dev\0" \
"initrd_addr=0x43800000\0" \
"initrd_high=0xffffffffffffffff\0" \
"setup=setenv setupargs console=tty1 console=${console},${baudrate} " \
"consoleblank=0 earlycon\0" \
"update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
"if test \"$confirm\" = \"y\"; then " \
"setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \

5
include/configs/verdin-imx8mp.h
View File

@ -13,7 +13,6 @@
(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
#ifdef CONFIG_SPL_BUILD
/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
#define CFG_MALLOC_F_ADDR 0x184000
@ -40,15 +39,11 @@
#define CFG_EXTRA_ENV_SETTINGS \
BOOTENV \
MEM_LAYOUT_ENV_SETTINGS \
"boot_file=Image\0" \
"boot_scripts=boot.scr\0" \
"boot_script_dhcp=boot.scr\0" \
"console=ttymxc2\0" \
"fdt_board=dev\0" \
"initrd_addr=0x43800000\0" \
"initrd_high=0xffffffffffffffff\0" \
"setup=setenv setupargs console=tty1 console=${console},${baudrate} " \
"consoleblank=0 earlycon\0" \
"update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
"if test \"$confirm\" = \"y\"; then " \
"setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \