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arm: mach-k3: am62x: Implement get_reset_reason()

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Implement get_reset_reason() for AM62x to enable reporting of
the reset cause in the cpuinfo output.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
This commit is contained in:
Wadim Egorov 2025-05-15 13:15:54 +02:00 committed by Tom Rini
parent a282950deb
commit be93c0892d
2 changed files with 59 additions and 0 deletions
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40
arch/arm/mach-k3/am62x/boot.c
View File

@ -101,3 +101,43 @@ u32 get_boot_device(void)
return bootmedia; return bootmedia;
} }
const char *get_reset_reason(void)
{
u32 reset_reason = readl(CTRLMMR_MCU_RST_SRC);
/* After reading reset source register, software must clear it */
if (reset_reason)
writel(reset_reason, CTRLMMR_MCU_RST_SRC);
if (reset_reason == 0 ||
(reset_reason & (RST_SRC_SW_MAIN_POR_FROM_MAIN |
RST_SRC_SW_MAIN_POR_FROM_MCU |
RST_SRC_DS_MAIN_PORZ)))
return "POR";
if (reset_reason & (RST_SRC_SAFETY_ERR | RST_SRC_MAIN_ESM_ERR))
return "ESM";
if (reset_reason & RST_SRC_DM_WDT_RST)
return "WDOG";
if (reset_reason & (RST_SRC_SW_MAIN_WARM_FROM_MAIN |
RST_SRC_SW_MAIN_WARM_FROM_MCU |
RST_SRC_SW_MCU_WARM_RST))
return "RST";
if (reset_reason & (RST_SRC_SMS_WARM_RST | RST_SRC_SMS_COLD_RST))
return "DMSC";
if (reset_reason & RST_SRC_DEBUG_RST)
return "JTAG";
if (reset_reason & RST_SRC_THERMAL_RST)
return "THERMAL";
if (reset_reason & (RST_SRC_MAIN_RESET_PIN | RST_SRC_MCU_RESET_PIN))
return "PIN";
return "UNKNOWN";
}

19
arch/arm/mach-k3/include/mach/am62_hardware.h
View File

@ -79,6 +79,25 @@
#define CTRLMMR_MCU_RST_CTRL (MCU_CTRL_MMR0_BASE + 0x18170) #define CTRLMMR_MCU_RST_CTRL (MCU_CTRL_MMR0_BASE + 0x18170)
/* Reset Reason Detection */
#define CTRLMMR_MCU_RST_SRC (MCU_CTRL_MMR0_BASE + 0x18178)
#define RST_SRC_SAFETY_ERR BIT(31)
#define RST_SRC_MAIN_ESM_ERR BIT(30)
#define RST_SRC_SW_MAIN_POR_FROM_MAIN BIT(25)
#define RST_SRC_SW_MAIN_POR_FROM_MCU BIT(24)
#define RST_SRC_DS_MAIN_PORZ BIT(23)
#define RST_SRC_DM_WDT_RST BIT(22)
#define RST_SRC_SW_MAIN_WARM_FROM_MAIN BIT(21)
#define RST_SRC_SW_MAIN_WARM_FROM_MCU BIT(20)
#define RST_SRC_SW_MCU_WARM_RST BIT(16)
#define RST_SRC_SMS_WARM_RST BIT(13)
#define RST_SRC_SMS_COLD_RST BIT(12)
#define RST_SRC_DEBUG_RST BIT(8)
#define RST_SRC_THERMAL_RST BIT(4)
#define RST_SRC_MAIN_RESET_PIN BIT(2)
#define RST_SRC_MCU_RESET_PIN BIT(0)
/* Debounce register configuration */ /* Debounce register configuration */
#define CTRLMMR_DBOUNCE_CFG(index) (MCU_CTRL_MMR0_BASE + 0x4080 + (index * 4)) #define CTRLMMR_DBOUNCE_CFG(index) (MCU_CTRL_MMR0_BASE + 0x4080 + (index * 4))