mirrors/u-boot
1
0
Fork 0
mirror of https://source.denx.de/u-boot/u-boot.git synced 2025-12-21 09:21:33 +01:00
Code Issues Actions Packages Projects Releases Wiki Activity

ARM: tegra: Add BSE bindings

Browse Source 
Add device tree nodes for BSEA and BSEV devices on Tegra20 and Tegra30.

Signed-off-by: Ion Agorria <ion@agorria.com>
This commit is contained in:
Ion Agorria 2025-06-04 16:03:29 +03:00 committed by Svyatoslav Ryhel
parent f230bc6cf7
commit bbfdb1ea9a
2 changed files with 58 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

29
arch/arm/dts/tegra20.dtsi
View File

@ -249,6 +249,35 @@
*/ */
}; };
/* Audio Bitstream Engine */
bsea@60011000 {
compatible = "nvidia,tegra20-bsea";
reg = <0x60011000 0x1000>, <0x4000c000 0x4000>;
reg-names = "bsea", "iram-buffer";
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "bsea";
clocks = <&tegra_car TEGRA20_CLK_BSEA>;
resets = <&tegra_car 62>;
reset-names = "bsea";
status = "disabled";
};
/* Video Bitstream Engine */
bsev@6001b000 {
compatible = "nvidia,tegra20-bsev";
reg = <0x6001b000 0x1000>, <0x40008000 0x4000>;
reg-names = "bsev", "iram-buffer";
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "bsev";
clocks = <&tegra_car TEGRA20_CLK_BSEV>,
<&tegra_car TEGRA20_CLK_VDE>;
clock-names = "bsev", "vde";
resets = <&tegra_car 63>,
<&tegra_car 61>;
reset-names = "bsev", "vde";
status = "disabled";
};
apbmisc@70000800 { apbmisc@70000800 {
compatible = "nvidia,tegra20-apbmisc"; compatible = "nvidia,tegra20-apbmisc";
reg = <0x70000800 0x64 /* Chip revision */ reg = <0x70000800 0x64 /* Chip revision */

29
arch/arm/dts/tegra30.dtsi
View File

@ -373,6 +373,35 @@
*/ */
}; };
/* Audio Bitstream Engine */
bsea@60011000 {
compatible = "nvidia,tegra30-bsea";
reg = <0x60011000 0x1000>, <0x4000c000 0x4000>;
reg-names = "bsea", "iram-buffer";
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "bsea";
clocks = <&tegra_car TEGRA30_CLK_BSEA>;
resets = <&tegra_car 62>;
reset-names = "bsea";
status = "disabled";
};
/* Video Bitstream Engine */
bsev@6001b000 {
compatible = "nvidia,tegra30-bsev";
reg = <0x6001b000 0x1000>, <0x40008000 0x4000>;
reg-names = "bsev", "iram-buffer";
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "bsev";
clocks = <&tegra_car TEGRA30_CLK_BSEV>,
<&tegra_car TEGRA30_CLK_VDE>;
clock-names = "bsev", "vde";
resets = <&tegra_car 63>,
<&tegra_car 61>;
reset-names = "bsev", "vde";
status = "disabled";
};
apbmisc@70000800 { apbmisc@70000800 {
compatible = "nvidia,tegra30-apbmisc", "nvidia,tegra20-apbmisc"; compatible = "nvidia,tegra30-apbmisc", "nvidia,tegra20-apbmisc";
reg = <0x70000800 0x64 /* Chip revision */ reg = <0x70000800 0x64 /* Chip revision */