rockchip: veyron: Add logging for power init

Add better logging for power init so that CONFIG_LOG_ERROR_RETURN can
be enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
This commit is contained in:
Simon Glass 2024-06-27 09:29:45 +01:00 committed by Tom Rini
parent c2484b43bf
commit bbc46241a1

View File

@ -29,44 +29,38 @@ static int veyron_init(void)
int ret; int ret;
ret = regulator_get_by_platname("vdd_arm", &dev); ret = regulator_get_by_platname("vdd_arm", &dev);
if (ret) { if (ret)
debug("Cannot set regulator name\n"); return log_msg_ret("vdd", ret);
return ret;
}
/* Slowly raise to max CPU voltage to prevent overshoot */ /* Slowly raise to max CPU voltage to prevent overshoot */
ret = regulator_set_value(dev, 1200000); ret = regulator_set_value(dev, 1200000);
if (ret) if (ret)
return ret; return log_msg_ret("s12", ret);
udelay(175); /* Must wait for voltage to stabilize, 2mV/us */ udelay(175); /* Must wait for voltage to stabilize, 2mV/us */
ret = regulator_set_value(dev, 1400000); ret = regulator_set_value(dev, 1400000);
if (ret) if (ret)
return ret; return log_msg_ret("s14", ret);
udelay(100); /* Must wait for voltage to stabilize, 2mV/us */ udelay(100); /* Must wait for voltage to stabilize, 2mV/us */
ret = rockchip_get_clk(&clk.dev); ret = rockchip_get_clk(&clk.dev);
if (ret) if (ret)
return ret; return log_msg_ret("clk", ret);
clk.id = PLL_APLL; clk.id = PLL_APLL;
ret = clk_set_rate(&clk, 1800000000); ret = clk_set_rate(&clk, 1800000000);
if (IS_ERR_VALUE(ret)) if (IS_ERR_VALUE(ret))
return ret; return log_msg_ret("s18", ret);
ret = regulator_get_by_platname("vcc33_sd", &dev); ret = regulator_get_by_platname("vcc33_sd", &dev);
if (ret) { if (ret)
debug("Cannot get regulator name\n"); return log_msg_ret("vcc", ret);
return ret;
}
ret = regulator_set_value(dev, 3300000); ret = regulator_set_value(dev, 3300000);
if (ret) if (ret)
return ret; return log_msg_ret("s33", ret);
ret = regulators_enable_boot_on(false); ret = regulators_enable_boot_on(false);
if (ret) { if (ret)
debug("%s: Cannot enable boot on regulators\n", __func__); return log_msg_ret("boo", ret);
return ret;
}
return 0; return 0;
} }
@ -81,7 +75,7 @@ int board_early_init_r(void)
if (!fdt_node_check_compatible(gd->fdt_blob, 0, "google,veyron")) { if (!fdt_node_check_compatible(gd->fdt_blob, 0, "google,veyron")) {
ret = veyron_init(); ret = veyron_init();
if (ret) if (ret)
return ret; return log_msg_ret("vey", ret);
} }
#endif #endif
/* /*