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rockchip: rk3288: grf: Unify speed/flowctrl fields for clarity

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Update GMAC speed and flow control fields in GRF_SOC_CON1 to use
RK3288_GMAC_* prefix, ensuring a consistent naming convention. It also
shifts each mask/bit definition to match the actual hardware bits, which
makes future usage easier.

Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Christoph Fritz 2025-04-16 13:44:13 +02:00 committed by Kever Yang
parent 656b70b5ff
commit b8ce3eb8bf
1 changed files with 8 additions and 8 deletions
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16
arch/arm/include/asm/arch-rockchip/grf_rk3288.h
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@ -934,21 +934,21 @@ enum {
RK3288_RMII_CLK_SEL_2_5M = (0 << RK3288_RMII_CLK_SEL_SHIFT), RK3288_RMII_CLK_SEL_2_5M = (0 << RK3288_RMII_CLK_SEL_SHIFT),
RK3288_RMII_CLK_SEL_25M = (1 << RK3288_RMII_CLK_SEL_SHIFT), RK3288_RMII_CLK_SEL_25M = (1 << RK3288_RMII_CLK_SEL_SHIFT),
GMAC_SPEED_SHIFT = 0xa, RK3288_GMAC_SPEED_SHIFT = 0xa,
GMAC_SPEED_MASK = 1, RK3288_GMAC_SPEED_MASK = (1 << RK3288_GMAC_SPEED_SHIFT),
GMAC_SPEED_10M = 0, RK3288_GMAC_SPEED_10M = (0 << RK3288_GMAC_SPEED_SHIFT),
GMAC_SPEED_100M, RK3288_GMAC_SPEED_100M = (1 << RK3288_GMAC_SPEED_SHIFT),
GMAC_FLOWCTRL_SHIFT = 0x9, RK3288_GMAC_FLOWCTRL_SHIFT = 0x9,
GMAC_FLOWCTRL_MASK = 1, RK3288_GMAC_FLOWCTRL_MASK = (1 << RK3288_GMAC_FLOWCTRL_SHIFT),
RK3288_GMAC_PHY_INTF_SEL_SHIFT = 6, RK3288_GMAC_PHY_INTF_SEL_SHIFT = 6,
RK3288_GMAC_PHY_INTF_SEL_MASK = (7 << RK3288_GMAC_PHY_INTF_SEL_SHIFT), RK3288_GMAC_PHY_INTF_SEL_MASK = (7 << RK3288_GMAC_PHY_INTF_SEL_SHIFT),
RK3288_GMAC_PHY_INTF_SEL_RGMII = (1 << RK3288_GMAC_PHY_INTF_SEL_SHIFT), RK3288_GMAC_PHY_INTF_SEL_RGMII = (1 << RK3288_GMAC_PHY_INTF_SEL_SHIFT),
RK3288_GMAC_PHY_INTF_SEL_RMII = (4 << RK3288_GMAC_PHY_INTF_SEL_SHIFT), RK3288_GMAC_PHY_INTF_SEL_RMII = (4 << RK3288_GMAC_PHY_INTF_SEL_SHIFT),
HOST_REMAP_SHIFT = 0x5, RK3288_HOST_REMAP_SHIFT = 0x5,
HOST_REMAP_MASK = 1 RK3288_HOST_REMAP_MASK = (1 << RK3288_HOST_REMAP_SHIFT),
}; };
/* GRF_SOC_CON2 */ /* GRF_SOC_CON2 */