From c336d7431c03f134c270596369095caac1a31172 Mon Sep 17 00:00:00 2001 From: Ley Foon Tan Date: Wed, 22 Apr 2020 10:06:45 +0800 Subject: [PATCH 1/2] configs: socfpga: arria10: Enable USB support Enable configs to support USB in Arria 10. CONFIG_CMD_USB=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_DWC2=y Signed-off-by: Ley Foon Tan --- configs/socfpga_arria10_defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index ca34457ddd1..35ae18fac00 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0" @@ -49,4 +50,7 @@ CONFIG_SPI=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y CONFIG_DESIGNWARE_APB_TIMER=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_DWC2=y # CONFIG_SPL_WDT is not set From b9d1671829b17f78c47f2d0d42a7f59767cdd84b Mon Sep 17 00:00:00 2001 From: Ley Foon Tan Date: Mon, 20 Apr 2020 16:17:27 +0800 Subject: [PATCH 2/2] arm: socfpga: stratix10: Fix incorrect CLKMGR_S10_PERPLL_BYPASS offset Offset value for CLKMGR_S10_PERPLL_BYPASS should be 0xb0, fix it. Reported-by: Chee Hong Ang Signed-off-by: Ley Foon Tan --- arch/arm/mach-socfpga/include/mach/clock_manager_s10.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h b/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h index e710aa2f94f..9d2b3bababe 100644 --- a/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h +++ b/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h @@ -85,7 +85,7 @@ void cm_basic_init(const struct cm_config * const cfg); #define CLKMGR_S10_MAINPLL_VCOCALIB 0x8c /* Periphpll group */ #define CLKMGR_S10_PERPLL_EN 0xa4 -#define CLKMGR_S10_PERPLL_BYPASS 0xac +#define CLKMGR_S10_PERPLL_BYPASS 0xb0 #define CLKMGR_S10_PERPLL_CNTR2CLK 0xbc #define CLKMGR_S10_PERPLL_CNTR3CLK 0xc0 #define CLKMGR_S10_PERPLL_CNTR4CLK 0xc4