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mmc: fsl_esdhc_imx: set sysctl register for clock initialization

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[ fsl_esdhc commit 263ddfc3454ead3a988adef39b962479adce2b28 ]

The initial clock setting should be through sysctl register only,
while the mmc_set_clock() will call mmc_set_ios() introduce other
configurations like bus width, mode, and so on.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This commit is contained in:
Sean Anderson 2021-11-23 15:03:47 -05:00 committed by Jaehoon Chung
parent 00e0cd7fda
commit b2acee4bb0
1 changed files with 1 additions and 1 deletions
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2
drivers/mmc/fsl_esdhc_imx.c
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@ -1020,7 +1020,7 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
esdhc_setbits32(&regs->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN);
/* Set the initial clock speed */
mmc_set_clock(mmc, 400000, MMC_CLK_ENABLE);
set_sysctl(priv, mmc, 400000);
/* Disable the BRR and BWR bits in IRQSTAT */
esdhc_clrbits32(&regs->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR);