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rockchip: rk3399-roc-pc: default to SPI bus 1 for SPI-flash

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SPI flash on this board is located on bus 1, default to using bus 1 for
SPI flash on both rk3399-roc-pc and -mezzanine, and stop aliasing it to
bus 0.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob")
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
This commit is contained in:
Hugh Cole-Baker 2020-11-22 13:03:45 +00:00 committed by Kever Yang
parent 83433fdab4
commit acc57ecf05
3 changed files with 2 additions and 4 deletions
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4
arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
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@ -7,10 +7,6 @@
#include "rk3399-sdram-lpddr4-100.dtsi" #include "rk3399-sdram-lpddr4-100.dtsi"
/ { / {
aliases {
spi0 = &spi1;
};
chosen { chosen {
u-boot,spl-boot-order = "same-as-spl", &spi_flash, &sdhci, &sdmmc; u-boot,spl-boot-order = "same-as-spl", &spi_flash, &sdhci, &sdmmc;
}; };

1
configs/roc-pc-mezzanine-rk3399_defconfig
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@ -42,6 +42,7 @@ CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ROCKCHIP=y CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_SF_DEFAULT_BUS=1
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DM_ETH=y CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y CONFIG_ETH_DESIGNWARE=y

1
configs/roc-pc-rk3399_defconfig
View File

@ -41,6 +41,7 @@ CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ROCKCHIP=y CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_SF_DEFAULT_BUS=1
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DM_ETH=y CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y CONFIG_ETH_DESIGNWARE=y