Merge tag 'net-20260331' of https://source.denx.de/u-boot/custodians/u-boot-net into next

Pull request net-20260331. net: - airoha_eth & pcs_airoha driver fixes - Rework some symbol dependencies - dwc_eth_xgmac: Move DMA reset and pad calibration after PHY init - rtl8169: add support for RTL8125d - rswitch: Avoid NULL pointer dereference during PHY access - rswitch: Remap CPU to bus addresses using dev_phys_to_bus() - phy: dp83867: reset PHY on init to ensure clean state net-lwip: - nfs: fix buffer overflow when using symlinks - tftp: update image_load_addr after successful transfer [trini: Add missing "if NET" to CMD_DHCP select's CMD_BOOTP] Signed-off-by: Tom Rini <trini@konsulko.com>
2026-05-05 20:56:12 +02:00 · 2026-03-31 10:47:15 -06:00 · 2026-03-31 10:47:15 -06:00 · 98cf83d816
commit 98cf83d816
parent 87ea2b51b6 d1f8719e51
15 changed files with 100 additions and 102 deletions
--- a/4
+++ b/4
@ -804,14 +804,14 @@ config NO_NET

 config NET
 	bool "Legacy U-Boot networking stack"
-	imply NETDEVICES
+	select NETDEVICES
 	help
 	  Include networking support with U-Boot's internal implementation of
 	  the TCP/IP protocol stack.

 config NET_LWIP
 	bool "Use lwIP for networking stack"
-	imply NETDEVICES
+	select NETDEVICES
 	help
 	  Include networking support based on the lwIP (lightweight IP)
 	  TCP/IP stack (https://nongnu.org/lwip). This is a replacement for
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@ -2195,6 +2195,7 @@ endif  # if NET
 config CMD_DHCP
 	bool "dhcp"
 	select PROT_DHCP_LWIP if NET_LWIP
+	select CMD_BOOTP if NET
 	help
 	  Boot image via network using DHCP/TFTP protocol

@ -2229,6 +2230,7 @@ config CMD_MDIO

 config CMD_NFS
 	bool "nfs"
+	select PROT_UDP_LWIP if NET_LWIP
 	help
 	  Boot image via network using NFS protocol.

@ -2313,7 +2315,7 @@ config WGET_BUILTIN_CACERT_PATH
 config CMD_PXE
 	bool "pxe"
 	select PXE_UTILS
-	imply CMD_TFTPBOOT
+	select CMD_TFTPBOOT
 	help
 	  Boot image via network using PXE protocol

--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@ -90,9 +90,10 @@ config DSA_SANDBOX
 	  Ethernet device used as DSA master, to test DSA class code, including
 	  exported DSA API and datapath processing of Ethernet traffic.

-menuconfig NETDEVICES
-	bool "Network device support"
-	depends on NET || NET_LWIP
+menu "Network device support"
+
+config NETDEVICES
+	bool
 	select DM_ETH
 	help
 	  You must select Y to enable any network device support
@ -979,7 +980,11 @@ source "drivers/net/mtk_eth/Kconfig"

 config HIFEMAC_ETH
 	bool "HiSilicon Fast Ethernet Controller"
+	depends on DM && OF_CONTROL
 	select CLK
+	select DM_CLK
+	select DM_ETH_PHY
+	select DM_MDIO
 	select DM_RESET
 	select PHYLIB
 	help
@ -996,6 +1001,7 @@ config HIFEMAC_MDIO

 config HIGMACV300_ETH
 	bool "HiSilicon Gigabit Ethernet Controller"
+	depends on DM && OF_CONTROL
 	select DM_RESET
 	select PHYLIB
 	help
@ -1103,3 +1109,5 @@ source "drivers/net/pfe_eth/Kconfig"
 source "drivers/net/fsl-mc/Kconfig"

 endif # NETDEVICES
+
+endmenu
--- a/drivers/net/airoha/Kconfig
+++ b/drivers/net/airoha/Kconfig
@ -6,6 +6,7 @@ config PCS_AIROHA

 config PCS_AIROHA_AN7581
 	bool "Airoha AN7581 PCS driver"
+	depends on ARCH_AIROHA
 	select PCS_AIROHA
 	help
 	  This module provides helper to phylink for managing the Airoha
--- a/drivers/net/airoha/pcs-airoha-common.c
+++ b/drivers/net/airoha/pcs-airoha-common.c
@ -10,7 +10,7 @@
 #include <net.h>
 #include <regmap.h>
 #include <reset.h>
-#include <syscon.h>
+#include <asm/arch/scu-regmap.h>

 #include "pcs-airoha.h"

@ -755,7 +755,7 @@ static int airoha_pcs_probe(struct udevice *dev)
 		return PTR_ERR(priv->xfi_ana);

 	/* SCU is used to toggle XFI or HSGMII in global SoC registers */
-	priv->scu = syscon_regmap_lookup_by_phandle(dev, "airoha,scu");
+	priv->scu = airoha_get_scu_regmap();
 	if (IS_ERR(priv->scu))
 		return PTR_ERR(priv->scu);

--- a/drivers/net/airoha_eth.c
+++ b/drivers/net/airoha_eth.c
@ -12,7 +12,6 @@
 #include <dm/device-internal.h>
 #include <dm/devres.h>
 #include <dm/lists.h>
-#include <eth_phy.h>
 #include <mapmem.h>
 #include <miiphy.h>
 #include <net.h>
@ -909,6 +908,11 @@ static int airoha_eth_probe(struct udevice *dev)
 	if (ret)
 		return ret;

+	if (eth->switch_mdio_dev) {
+		if (!device_probe(eth->switch_mdio_dev))
+			debug("Warning: failed to probe airoha switch mdio\n");
+	}
+
 	ofnode_for_each_subnode(node, dev_ofnode(dev)) {
 		if (!ofnode_device_is_compatible(node, "airoha,eth-mac"))
 			continue;
@ -935,8 +939,6 @@ static int airoha_eth_port_probe(struct udevice *dev)
 {
 	struct airoha_eth *eth = (void *)dev_get_driver_data(dev);
 	struct airoha_gdm_port *port = dev_get_priv(dev);
-	struct mdio_perdev_priv *pdata;
-	struct mii_dev *mdio_bus;
 	int ret;

 	port->qdma = &eth->qdma[0];
@ -945,7 +947,6 @@ static int airoha_eth_port_probe(struct udevice *dev)
 	if (ret)
 		return ret;

-	mdio_bus = NULL;
 	if (port->id > 1) {
 #if defined(CONFIG_PCS_AIROHA)
 		ret = airoha_pcs_init(dev);
@ -953,24 +954,11 @@ static int airoha_eth_port_probe(struct udevice *dev)
 			return ret;

 		port->phydev = dm_eth_phy_connect(dev);
-		if (port->phydev)
-			mdio_bus = port->phydev->bus;
 #else
 		return -EINVAL;
 #endif
-	} else {
-		if (eth->switch_mdio_dev &&
-		    !device_probe(eth->switch_mdio_dev)) {
-			pdata = dev_get_uclass_priv(eth->switch_mdio_dev);
-			mdio_bus = pdata->mii_bus;
-		}
 	}

-#ifdef CONFIG_DM_ETH_PHY
-	if (!IS_ERR_OR_NULL(mdio_bus))
-		eth_phy_set_mdio_bus(dev, mdio_bus);
-#endif
-
 	return 0;
 }

--- a/drivers/net/bnxt/Kconfig
+++ b/drivers/net/bnxt/Kconfig
@ -1,6 +1,6 @@
 config BNXT_ETH
 	bool "BNXT PCI support"
-	select PCI_INIT_R
+	depends on PCI
 	help
 	  This driver implements support for bnxt pci controller
 	  driver of ethernet class.
--- a/drivers/net/dwc_eth_xgmac.c
+++ b/drivers/net/dwc_eth_xgmac.c
@ -497,20 +497,6 @@ static int xgmac_start(struct udevice *dev)

 	xgmac->reg_access_ok = true;

-	ret = wait_for_bit_le32(&xgmac->dma_regs->mode,
-				XGMAC_DMA_MODE_SWR, false,
-				xgmac->config->swr_wait, false);
-	if (ret) {
-		pr_err("%s XGMAC_DMA_MODE_SWR stuck: %d\n", dev->name, ret);
-		goto err_stop_resets;
-	}
-
-	ret = xgmac->config->ops->xgmac_calibrate_pads(dev);
-	if (ret < 0) {
-		pr_err("%s xgmac_calibrate_pads() failed: %d\n", dev->name, ret);
-		goto err_stop_resets;
-	}
-
 	/*
 	 * if PHY was already connected and configured,
 	 * don't need to reconnect/reconfigure again
@ -559,6 +545,20 @@ static int xgmac_start(struct udevice *dev)
 		goto err_shutdown_phy;
 	}

+	ret = wait_for_bit_le32(&xgmac->dma_regs->mode,
+				XGMAC_DMA_MODE_SWR, false,
+				xgmac->config->swr_wait, false);
+	if (ret) {
+		pr_err("%s XGMAC_DMA_MODE_SWR stuck: %d\n", dev->name, ret);
+		goto err_stop_resets;
+	}
+
+	ret = xgmac->config->ops->xgmac_calibrate_pads(dev);
+	if (ret < 0) {
+		pr_err("%s xgmac_calibrate_pads() failed: %d\n", dev->name, ret);
+		goto err_stop_resets;
+	}
+
 	/* Configure MTL */

 	/* Enable Store and Forward mode for TX */
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@ -257,14 +257,14 @@ static int dp83867_config(struct phy_device *phydev)

 	dp83867 = (struct dp83867_private *)phydev->priv;

-	ret = dp83867_of_init(phydev);
+	/* Reset PHY to clear any stale state after warm reboot */
+	ret = phy_reset(phydev);
 	if (ret)
 		return ret;

-	/* Restart the PHY.  */
-	val = phy_read(phydev, MDIO_DEVAD_NONE, DP83867_CTRL);
-	phy_write(phydev, MDIO_DEVAD_NONE, DP83867_CTRL,
-		  val | DP83867_SW_RESTART);
+	ret = dp83867_of_init(phydev);
+	if (ret)
+		return ret;

 	/* Mode 1 or 2 workaround */
 	if (dp83867->rxctrl_strap_quirk) {
--- a/drivers/net/phy/micrel_ksz90x1.c
+++ b/drivers/net/phy/micrel_ksz90x1.c
@ -407,6 +407,9 @@ static int ksz9031_config(struct phy_device *phydev)
 	if (ret)
 		return ret;

+	/* soft reset */
+	phy_reset(phydev);
+
 	ksz90x1_workaround_asymmetric_pause(phydev);

 	/* add an option to disable the gigabit feature of this PHY */
--- a/drivers/net/rswitch.c
+++ b/drivers/net/rswitch.c
@ -9,6 +9,7 @@

 #include <asm/io.h>
 #include <clk.h>
+#include <cpu_func.h>
 #include <dm.h>
 #include <dm/device-internal.h>
 #include <dm/device_compat.h>
@ -23,6 +24,7 @@
 #include <log.h>
 #include <malloc.h>
 #include <miiphy.h>
+#include <phys2bus.h>

 #define RSWITCH_SLEEP_US	1000
 #define RSWITCH_TIMEOUT_US	1000000
@ -482,7 +484,7 @@ static int rswitch_mii_read_c45(struct mii_dev *miidev, int phyad, int devad, in
 	/* Access PHY register */
 	if (devad != MDIO_DEVAD_NONE)	/* Definitelly C45 */
 		val = rswitch_mii_access_c45(etha_mii, true, phyad, devad, regad, 0);
-	else if (etha->phydev->is_c45)	/* C22 access to C45 PHY */
+	else if (etha->phydev && etha->phydev->is_c45)	/* C22 access to C45 PHY */
 		val = rswitch_mii_access_c45(etha_mii, true, phyad, 1, regad, 0);
 	else
 		val = rswitch_mii_access_c22(etha_mii, true, phyad, regad, 0);
@ -516,7 +518,7 @@ int rswitch_mii_write_c45(struct mii_dev *miidev, int phyad, int devad, int rega
 	/* Access PHY register */
 	if (devad != MDIO_DEVAD_NONE)	/* Definitelly C45 */
 		rswitch_mii_access_c45(etha_mii, false, phyad, devad, regad, data);
-	else if (etha->phydev->is_c45)	/* C22 access to C45 PHY */
+	else if (etha->phydev && etha->phydev->is_c45)	/* C22 access to C45 PHY */
 		rswitch_mii_access_c45(etha_mii, false, phyad, 1, regad, data);
 	else
 		rswitch_mii_access_c22(etha_mii, false, phyad, regad, data);
@ -587,9 +589,11 @@ static void rswitch_bat_desc_init(struct rswitch_port_priv *priv)
 	rswitch_flush_dcache((uintptr_t)priv->bat_desc, desc_size);
 }

-static void rswitch_tx_desc_init(struct rswitch_port_priv *priv)
+static void rswitch_tx_desc_init(struct udevice *dev)
 {
+	struct rswitch_port_priv *priv = dev_get_priv(dev);
 	const u32 desc_size = RSWITCH_NUM_TX_DESC * sizeof(struct rswitch_desc);
+	dma_addr_t tx_desc_ba;
 	u64 tx_desc_addr;
 	int i;

@ -603,21 +607,25 @@ static void rswitch_tx_desc_init(struct rswitch_port_priv *priv)
 	/* Mark the end of the descriptors */
 	priv->tx_desc[RSWITCH_NUM_TX_DESC - 1].die_dt = DT_LINKFIX;
 	tx_desc_addr = (uintptr_t)priv->tx_desc;
-	priv->tx_desc[RSWITCH_NUM_TX_DESC - 1].dptrl = lower_32_bits(tx_desc_addr);
-	priv->tx_desc[RSWITCH_NUM_TX_DESC - 1].dptrh = upper_32_bits(tx_desc_addr);
+	tx_desc_ba = dev_phys_to_bus(dev, (phys_addr_t)tx_desc_addr);
+
+	priv->tx_desc[RSWITCH_NUM_TX_DESC - 1].dptrl = lower_32_bits(tx_desc_ba);
+	priv->tx_desc[RSWITCH_NUM_TX_DESC - 1].dptrh = upper_32_bits(tx_desc_ba);
 	rswitch_flush_dcache(tx_desc_addr, desc_size);

 	/* Point the controller to the TX descriptor list */
 	priv->bat_desc[RSWITCH_TX_CHAIN_INDEX].die_dt = DT_LINKFIX;
-	priv->bat_desc[RSWITCH_TX_CHAIN_INDEX].dptrl = lower_32_bits(tx_desc_addr);
-	priv->bat_desc[RSWITCH_TX_CHAIN_INDEX].dptrh = upper_32_bits(tx_desc_addr);
+	priv->bat_desc[RSWITCH_TX_CHAIN_INDEX].dptrl = lower_32_bits(tx_desc_ba);
+	priv->bat_desc[RSWITCH_TX_CHAIN_INDEX].dptrh = upper_32_bits(tx_desc_ba);
 	rswitch_flush_dcache((uintptr_t)&priv->bat_desc[RSWITCH_TX_CHAIN_INDEX],
 			     sizeof(struct rswitch_desc));
 }

-static void rswitch_rx_desc_init(struct rswitch_port_priv *priv)
+static void rswitch_rx_desc_init(struct udevice *dev)
 {
+	struct rswitch_port_priv *priv = dev_get_priv(dev);
 	const u32 desc_size = RSWITCH_NUM_RX_DESC * sizeof(struct rswitch_rxdesc);
+	dma_addr_t packet_ba, next_rx_desc_ba, rx_desc_ba;
 	int i;
 	u64 packet_addr;
 	u64 next_rx_desc_addr;
@ -631,26 +639,29 @@ static void rswitch_rx_desc_init(struct rswitch_port_priv *priv)
 		priv->rx_desc[i].data.die_dt = DT_FEMPTY;
 		priv->rx_desc[i].data.info_ds = PKTSIZE_ALIGN;
 		packet_addr = (uintptr_t)priv->rx_desc[i].packet;
-		priv->rx_desc[i].data.dptrl = lower_32_bits(packet_addr);
-		priv->rx_desc[i].data.dptrh = upper_32_bits(packet_addr);
+		packet_ba = dev_phys_to_bus(dev, (phys_addr_t)packet_addr);
+		priv->rx_desc[i].data.dptrl = lower_32_bits(packet_ba);
+		priv->rx_desc[i].data.dptrh = upper_32_bits(packet_ba);

 		priv->rx_desc[i].link.die_dt = DT_LINKFIX;
 		next_rx_desc_addr = (uintptr_t)&priv->rx_desc[i + 1];
-		priv->rx_desc[i].link.dptrl = lower_32_bits(next_rx_desc_addr);
-		priv->rx_desc[i].link.dptrh = upper_32_bits(next_rx_desc_addr);
+		next_rx_desc_ba = dev_phys_to_bus(dev, (phys_addr_t)next_rx_desc_addr);
+		priv->rx_desc[i].link.dptrl = lower_32_bits(next_rx_desc_ba);
+		priv->rx_desc[i].link.dptrh = upper_32_bits(next_rx_desc_ba);
 	}

 	/* Mark the end of the descriptors */
 	priv->rx_desc[RSWITCH_NUM_RX_DESC - 1].link.die_dt = DT_LINKFIX;
 	rx_desc_addr = (uintptr_t)priv->rx_desc;
-	priv->rx_desc[RSWITCH_NUM_RX_DESC - 1].link.dptrl = lower_32_bits(rx_desc_addr);
-	priv->rx_desc[RSWITCH_NUM_RX_DESC - 1].link.dptrh = upper_32_bits(rx_desc_addr);
+	rx_desc_ba = dev_phys_to_bus(dev, (phys_addr_t)rx_desc_addr);
+	priv->rx_desc[RSWITCH_NUM_RX_DESC - 1].link.dptrl = lower_32_bits(rx_desc_ba);
+	priv->rx_desc[RSWITCH_NUM_RX_DESC - 1].link.dptrh = upper_32_bits(rx_desc_ba);
 	rswitch_flush_dcache(rx_desc_addr, desc_size);

 	/* Point the controller to the rx descriptor list */
 	priv->bat_desc[RSWITCH_RX_CHAIN_INDEX].die_dt = DT_LINKFIX;
-	priv->bat_desc[RSWITCH_RX_CHAIN_INDEX].dptrl = lower_32_bits(rx_desc_addr);
-	priv->bat_desc[RSWITCH_RX_CHAIN_INDEX].dptrh = upper_32_bits(rx_desc_addr);
+	priv->bat_desc[RSWITCH_RX_CHAIN_INDEX].dptrl = lower_32_bits(rx_desc_ba);
+	priv->bat_desc[RSWITCH_RX_CHAIN_INDEX].dptrh = upper_32_bits(rx_desc_ba);
 	rswitch_flush_dcache((uintptr_t)&priv->bat_desc[RSWITCH_RX_CHAIN_INDEX],
 			     sizeof(struct rswitch_desc));
 }
@ -741,9 +752,11 @@ static int rswitch_gwca_axi_ram_reset(struct rswitch_gwca *gwca)
 					RSWITCH_SLEEP_US, RSWITCH_TIMEOUT_US);
 }

-static int rswitch_gwca_init(struct rswitch_port_priv *priv)
+static int rswitch_gwca_init(struct udevice *dev)
 {
+	struct rswitch_port_priv *priv = dev_get_priv(dev);
 	struct rswitch_gwca *gwca = &priv->gwca;
+	dma_addr_t bat_desc_ba;
 	int ret;

 	ret = rswitch_gwca_change_mode(priv, GWMC_OPC_DISABLE);
@ -765,9 +778,11 @@ static int rswitch_gwca_init(struct rswitch_port_priv *priv)
 	/* Setting flow */
 	writel(GWVCC_VEM_SC_TAG, gwca->addr + GWVCC);
 	writel(0, gwca->addr + GWTTFC);
-	writel(upper_32_bits((uintptr_t)priv->bat_desc) & GWDCBAC0_DCBAUP,
+
+	bat_desc_ba = dev_phys_to_bus(dev, (phys_addr_t)(priv->bat_desc));
+	writel(upper_32_bits(bat_desc_ba) & GWDCBAC0_DCBAUP,
 	       gwca->addr + GWDCBAC0 + priv->drv_data->gwdcbac_offset);
-	writel(lower_32_bits((uintptr_t)priv->bat_desc),
+	writel(lower_32_bits(bat_desc_ba),
 	       gwca->addr + GWDCBAC1 + priv->drv_data->gwdcbac_offset);
 	writel(GWDCC_DQT | GWDCC_BALR, gwca->addr + GWDCC(RSWITCH_TX_CHAIN_INDEX));
 	writel(GWDCC_BALR, gwca->addr + GWDCC(RSWITCH_RX_CHAIN_INDEX));
@ -844,8 +859,9 @@ static int rswitch_etha_init(struct rswitch_port_priv *priv)
 	return 0;
 }

-static int rswitch_init(struct rswitch_port_priv *priv)
+static int rswitch_start(struct udevice *dev)
 {
+	struct rswitch_port_priv *priv = dev_get_priv(dev);
 	struct rswitch_etha *etha = &priv->etha;
 	int ret;

@ -875,8 +891,8 @@ static int rswitch_init(struct rswitch_port_priv *priv)
 		return ret;

 	rswitch_bat_desc_init(priv);
-	rswitch_tx_desc_init(priv);
-	rswitch_rx_desc_init(priv);
+	rswitch_tx_desc_init(dev);
+	rswitch_rx_desc_init(dev);

 	rswitch_clock_enable(priv);

@ -886,7 +902,7 @@ static int rswitch_init(struct rswitch_port_priv *priv)

 	rswitch_mfwd_init(priv);

-	ret = rswitch_gwca_init(priv);
+	ret = rswitch_gwca_init(dev);
 	if (ret)
 		return ret;

@ -897,23 +913,12 @@ static int rswitch_init(struct rswitch_port_priv *priv)
 	return 0;
 }

-static int rswitch_start(struct udevice *dev)
-{
-	struct rswitch_port_priv *priv = dev_get_priv(dev);
-	int ret;
-
-	ret = rswitch_init(priv);
-	if (ret)
-		return ret;
-
-	return 0;
-}
-
 #define RSWITCH_TX_TIMEOUT_MS	1000
 static int rswitch_send(struct udevice *dev, void *packet, int len)
 {
 	struct rswitch_port_priv *priv = dev_get_priv(dev);
 	struct rswitch_desc *desc = &priv->tx_desc[priv->tx_desc_index];
+	dma_addr_t bpacket = dev_phys_to_bus(dev, (phys_addr_t)packet);
 	struct rswitch_gwca *gwca = &priv->gwca;
 	u32 gwtrc_index, start;

@ -923,8 +928,8 @@ static int rswitch_send(struct udevice *dev, void *packet, int len)
 	memset(desc, 0x0, sizeof(*desc));
 	desc->die_dt = DT_FSINGLE;
 	desc->info_ds = len;
-	desc->dptrl = lower_32_bits((uintptr_t)packet);
-	desc->dptrh = upper_32_bits((uintptr_t)packet);
+	desc->dptrl = lower_32_bits(bpacket);
+	desc->dptrh = upper_32_bits(bpacket);
 	rswitch_flush_dcache((uintptr_t)desc, sizeof(*desc));

 	/* Start transmission */
@ -954,6 +959,7 @@ static int rswitch_recv(struct udevice *dev, int flags, uchar **packetp)
 {
 	struct rswitch_port_priv *priv = dev_get_priv(dev);
 	struct rswitch_rxdesc *desc = &priv->rx_desc[priv->rx_desc_index];
+	dma_addr_t dpacket;
 	u8 *packet;
 	int len;

@ -963,7 +969,9 @@ static int rswitch_recv(struct udevice *dev, int flags, uchar **packetp)
 		return -EAGAIN;

 	len = desc->data.info_ds & RX_DS;
-	packet = (u8 *)(((uintptr_t)(desc->data.dptrh) << 32) | (uintptr_t)desc->data.dptrl);
+	dpacket = ((u64)(desc->data.dptrh) << 32) | (u64)(desc->data.dptrl);
+	packet = (u8 *)(uintptr_t)dev_bus_to_phys(dev, dpacket);
+
 	rswitch_invalidate_dcache((uintptr_t)packet, len);

 	*packetp = packet;
--- a/drivers/net/rtl8169.c
+++ b/drivers/net/rtl8169.c
@ -270,6 +270,7 @@ static struct {
 	{"RTL-8100e",		0x32, 0xff7e1880,},
 	{"RTL-8168h/8111h",	0x54, 0xff7e1880,},
 	{"RTL-8125B",		0x64, 0xff7e1880,},
+	{"RTL-8125d",		0x6a, 0xff7e5880,},
 };

 enum _DescStatusBit {
--- a/net/bootp.c
+++ b/net/bootp.c
@ -87,23 +87,6 @@ static u8 dhcp_option_overload;
 #define OVERLOAD_SNAME 2
 static void dhcp_handler(uchar *pkt, unsigned dest, struct in_addr sip,
 			unsigned src, unsigned len);
-
-/* For Debug */
-#if 0
-static char *dhcpmsg2str(int type)
-{
-	switch (type) {
-	case 1:	 return "DHCPDISCOVER"; break;
-	case 2:	 return "DHCPOFFER";	break;
-	case 3:	 return "DHCPREQUEST";	break;
-	case 4:	 return "DHCPDECLINE";	break;
-	case 5:	 return "DHCPACK";	break;
-	case 6:	 return "DHCPNACK";	break;
-	case 7:	 return "DHCPRELEASE";	break;
-	default: return "UNKNOWN/INVALID MSG TYPE"; break;
-	}
-}
-#endif
 #endif

 static void bootp_add_id(ulong id)
--- a/net/lwip/nfs.c
+++ b/net/lwip/nfs.c
@ -114,8 +114,10 @@ static int nfs_loop(struct udevice *udev, ulong addr, char *fname,
 	if (!netif)
 		return -1;

-	nfs_filename = nfs_basename(fname);
-	nfs_path     = nfs_dirname(fname);
+	strlcpy(nfs_path_buff, fname, sizeof(nfs_path_buff));
+
+	nfs_filename = nfs_basename(nfs_path_buff);
+	nfs_path     = nfs_dirname(nfs_path_buff);

 	printf("Using %s device\n", udev->name);

--- a/net/lwip/tftp.c
+++ b/net/lwip/tftp.c
@ -368,6 +368,8 @@ int do_tftpb(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])

 	if (tftp_loop(eth_get_dev(), laddr, fname, srvip, port) < 0)
 		ret = CMD_RET_FAILURE;
+	else
+		image_load_addr = laddr;
 out:
 	if (arg != net_boot_file_name)
 		free(arg);