Merge branch '2022-03-28-critical-fixes'

- A zstd, two Apple M1 and an MXS NAND critical bugfix
- Clean up another file that wasn't being removed and update some
  external documentation links.

Makefile

@@ -2186,7 +2186,8 @@ CLEAN_DIRS  += $(MODVERDIR) \
 	       $(foreach d, spl tpl, $(patsubst %,$d/%, \
 			$(filter-out include, $(shell ls -1 $d 2>/dev/null))))
 
-CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h tools/version.h \
+CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h \
+	       drivers/video/u_boot_logo.S tools/version.h \
 	       u-boot* MLO* SPL System.map fit-dtb.blob* \
 	       u-boot-ivt.img.log u-boot-dtb.imx.log SPL.log u-boot.imx.log \
 	       lpc32xx-* bl31.c bl31.elf bl31_*.bin image.map tispl.bin* \

arch/arm/mach-apple/board.c

@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <efi_loader.h>
+#include <lmb.h>
 
 #include <asm/armv8/mmu.h>
 #include <asm/global_data.h>
@@ -266,32 +267,27 @@ u64 get_page_table_size(void)
 	return SZ_256K;
 }
 
+#define KERNEL_COMP_SIZE	SZ_128M
+
 int board_late_init(void)
 {
-	unsigned long base;
+	struct lmb lmb;
-	unsigned long top;
 	u32 status = 0;
 
-	/* Reserve 4M each for scriptaddr and pxefile_addr_r at the top of RAM
+	lmb_init_and_reserve(&lmb, gd->bd, (void *)gd->fdt_blob);
-	 * at least 1M below the stack.
-	 */
-	top = gd->start_addr_sp - CONFIG_STACK_SIZE - SZ_8M - SZ_1M;
-	top = ALIGN_DOWN(top, SZ_8M);
-
-	status |= env_set_hex("scriptaddr", top + SZ_4M);
-	status |= env_set_hex("pxefile_addr_r", top);
 
 	/* somewhat based on the Linux Kernel boot requirements:
 	 * align by 2M and maximal FDT size 2M
 	 */
-	base = ALIGN(gd->ram_base, SZ_2M);
+	status |= env_set_hex("loadaddr", lmb_alloc(&lmb, SZ_1G, SZ_2M));
-
+	status |= env_set_hex("fdt_addr_r", lmb_alloc(&lmb, SZ_2M, SZ_2M));
-	status |= env_set_hex("fdt_addr_r", base);
+	status |= env_set_hex("kernel_addr_r", lmb_alloc(&lmb, SZ_128M, SZ_2M));
-	status |= env_set_hex("kernel_addr_r", base + SZ_2M);
+	status |= env_set_hex("ramdisk_addr_r", lmb_alloc(&lmb, SZ_1G, SZ_2M));
-	status |= env_set_hex("ramdisk_addr_r", base + SZ_128M);
+	status |= env_set_hex("kernel_comp_addr_r",
-	status |= env_set_hex("loadaddr", base + SZ_2G);
+			      lmb_alloc(&lmb, KERNEL_COMP_SIZE, SZ_2M));
-	status |= env_set_hex("kernel_comp_addr_r", base + SZ_2G - SZ_128M);
+	status |= env_set_hex("kernel_comp_size", KERNEL_COMP_SIZE);
-	status |= env_set_hex("kernel_comp_size", SZ_128M);
+	status |= env_set_hex("scriptaddr", lmb_alloc(&lmb, SZ_4M, SZ_2M));
+	status |= env_set_hex("pxefile_addr_r", lmb_alloc(&lmb, SZ_4M, SZ_2M));
 
 	if (status)
 		log_warning("late_init: Failed to set run time variables\n");

arch/arm/mach-apple/rtkit.c

@@ -170,7 +170,7 @@ wait_epmap:
 
 	pwrstate = APPLE_RTKIT_PWR_STATE_SLEEP;
 	while (pwrstate != APPLE_RTKIT_PWR_STATE_ON) {
-		ret = mbox_recv(chan, &msg, 100000);
+		ret = mbox_recv(chan, &msg, 1000000);
 		if (ret < 0)
 			return ret;
 

boot/image.c

@@ -500,7 +500,7 @@ int image_decomp(int comp, ulong load, ulong image_start, int type,
 			struct abuf in, out;
 
 			abuf_init_set(&in, image_buf, image_len);
-			abuf_init_set(&in, load_buf, unc_len);
+			abuf_init_set(&out, load_buf, unc_len);
 			ret = zstd_decompress(&in, &out);
 			if (ret >= 0) {
 				image_len = ret;

doc/README.mpc85xx-sd-spi-boot

@@ -14,7 +14,7 @@ Where to get boot_format:
 ========================
 
 you can browse it online at:
-http://git.freescale.com/git/cgit.cgi/ppc/sdk/boot-format.git/
+https://source.codeaurora.org/external/qoriq/qoriq-yocto-sdk/boot-format
 
 Building
 ========

drivers/misc/mxc_ocotp.c

@@ -6,7 +6,7 @@
  * Based on Dirk Behme's
  * https://github.com/dirkbehme/u-boot-imx6/blob/28b17e9/drivers/misc/imx_otp.c,
  * which is based on Freescale's
- * http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/drivers/misc/imx_otp.c?h=imx_v2009.08_1.1.0&id=9aa74e6,
+ * https://source.codeaurora.org/external/imx/uboot-imx/tree/drivers/misc/imx_otp.c?id=9aa74e6,
  * which is:
  * Copyright (C) 2011 Freescale Semiconductor, Inc.
  */

drivers/mtd/nand/raw/mxs_nand.c

@@ -195,6 +195,7 @@ static inline int mxs_nand_legacy_calc_ecc_layout(struct bch_geometry *geo,
 	struct nand_chip *chip = mtd_to_nand(mtd);
 	struct mxs_nand_info *nand_info = nand_get_controller_data(chip);
 	unsigned int block_mark_bit_offset;
+	int corr, ds_corr;
 
 	/* The default for the length of Galois Field. */
 	geo->gf_len = 13;
@@ -225,6 +226,17 @@ static inline int mxs_nand_legacy_calc_ecc_layout(struct bch_geometry *geo,
 	geo->ecc_strength = min(round_down(geo->ecc_strength, 2),
 				nand_info->max_ecc_strength_supported);
 
+	/* check ecc strength, same as nand_ecc_is_strong_enough() did*/
+	if (chip->ecc_step_ds) {
+		corr = mtd->writesize * geo->ecc_strength /
+		       geo->ecc_chunkn_size;
+		ds_corr = mtd->writesize * chip->ecc_strength_ds /
+		       chip->ecc_step_ds;
+		if (corr < ds_corr ||
+		    geo->ecc_strength < chip->ecc_strength_ds)
+			return -EINVAL;
+	}
+
 	block_mark_bit_offset = mtd->writesize * 8 -
 		(geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1)
 				+ MXS_NAND_METADATA_SIZE * 8);
@@ -1111,6 +1123,7 @@ static int mxs_nand_set_geometry(struct mtd_info *mtd, struct bch_geometry *geo)
 	struct nand_chip *chip = mtd_to_nand(mtd);
 	struct nand_chip *nand = mtd_to_nand(mtd);
 	struct mxs_nand_info *nand_info = nand_get_controller_data(nand);
+	int err;
 
 	if (chip->ecc_strength_ds > nand_info->max_ecc_strength_supported) {
 		printf("unsupported NAND chip, minimum ecc required %d\n"
@@ -1118,19 +1131,57 @@ static int mxs_nand_set_geometry(struct mtd_info *mtd, struct bch_geometry *geo)
 		return -EINVAL;
 	}
 
-	if ((!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0) &&
+	/* use the legacy bch setting by default */
-	     mtd->oobsize < 1024) || nand_info->legacy_bch_geometry) {
+	if ((!nand_info->use_minimum_ecc && mtd->oobsize < 1024) ||
-		dev_warn(mtd->dev, "use legacy bch geometry\n");
+	    !(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0)) {
-		return mxs_nand_legacy_calc_ecc_layout(geo, mtd);
+		dev_dbg(mtd->dev, "use legacy bch geometry\n");
+		err = mxs_nand_legacy_calc_ecc_layout(geo, mtd);
+		if (!err)
+			return 0;
 	}
 
-	if (mtd->oobsize > 1024 || chip->ecc_step_ds < mtd->oobsize)
+	/* for large oob nand */
-		return mxs_nand_calc_ecc_for_large_oob(geo, mtd);
+	if (mtd->oobsize > 1024) {
+		dev_dbg(mtd->dev, "use large oob bch geometry\n");
+		err = mxs_nand_calc_ecc_for_large_oob(geo, mtd);
+		if (!err)
+			return 0;
+	}
 
-	return mxs_nand_calc_ecc_layout_by_info(geo, mtd,
+	/* otherwise use the minimum ecc nand chips required */
-				chip->ecc_strength_ds, chip->ecc_step_ds);
+	dev_dbg(mtd->dev, "use minimum ecc bch geometry\n");
+	err = mxs_nand_calc_ecc_layout_by_info(geo, mtd, chip->ecc_strength_ds,
+					       chip->ecc_step_ds);
 
-	return 0;
+	if (err)
+		dev_err(mtd->dev, "none of the bch geometry setting works\n");
+
+	return err;
+}
+
+void mxs_nand_dump_geo(struct mtd_info *mtd)
+{
+	struct nand_chip *nand = mtd_to_nand(mtd);
+	struct mxs_nand_info *nand_info = nand_get_controller_data(nand);
+	struct bch_geometry *geo = &nand_info->bch_geometry;
+
+	dev_dbg(mtd->dev, "BCH Geometry :\n"
+		"GF Length\t\t: %u\n"
+		"ECC Strength\t\t: %u\n"
+		"ECC for Meta\t\t: %u\n"
+		"ECC Chunk0 Size\t\t: %u\n"
+		"ECC Chunkn Size\t\t: %u\n"
+		"ECC Chunk Count\t\t: %u\n"
+		"Block Mark Byte Offset\t: %u\n"
+		"Block Mark Bit Offset\t: %u\n",
+		geo->gf_len,
+		geo->ecc_strength,
+		geo->ecc_for_meta,
+		geo->ecc_chunk0_size,
+		geo->ecc_chunkn_size,
+		geo->ecc_chunk_count,
+		geo->block_mark_byte_offset,
+		geo->block_mark_bit_offset);
 }
 
 /*
@@ -1159,6 +1210,8 @@ int mxs_nand_setup_ecc(struct mtd_info *mtd)
 	if (ret)
 		return ret;
 
+	mxs_nand_dump_geo(mtd);
+
 	/* Configure BCH and set NFC geometry */
 	mxs_reset_block(&bch_regs->hw_bch_ctrl_reg);
 

drivers/mtd/nand/raw/mxs_nand_dt.c

@@ -92,8 +92,6 @@ static int mxs_nand_dt_probe(struct udevice *dev)
 
 	info->use_minimum_ecc = dev_read_bool(dev, "fsl,use-minimum-ecc");
 
-	info->legacy_bch_geometry = dev_read_bool(dev, "fsl,legacy-bch-geometry");
-
 	if (IS_ENABLED(CONFIG_CLK) && IS_ENABLED(CONFIG_IMX8)) {
 		/* Assigned clock already set clock */
 		struct clk gpmi_clk;

include/mxs_nand.h

@@ -44,8 +44,6 @@ struct mxs_nand_info {
 	struct udevice *dev;
 	unsigned int	max_ecc_strength_supported;
 	bool		use_minimum_ecc;
-	/* legacy bch geometry flag */
-	bool		legacy_bch_geometry;
 	int		cur_chip;
 
 	uint32_t	cmd_queue_len;