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clk: rockchip: rk3328: Add SCLK_USB3OTG_REF support

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The SCLK_USB3OTG_REF clocks is used as reference clock for USB3 block.

Add simple support to get rate of SCLK_USB3OTG_REF clocks to fix
reference clock period configuration.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Jonas Karlman 2024-05-01 19:23:50 +00:00 committed by Kever Yang
parent 7c35f6d481
commit 94e2844c8c
1 changed files with 4 additions and 0 deletions
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4
drivers/clk/rockchip/clk_rk3328.c
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@ -706,6 +706,9 @@ static ulong rk3328_clk_get_rate(struct clk *clk)
case PCLK_HDMIPHY:
rate = rk3328_hdmiphy_get_clk(priv->cru);
break;
case SCLK_USB3OTG_REF:
rate = OSC_HZ;
break;
default:
return -ENOENT;
}
@ -780,6 +783,7 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
case PCLK_DDR:
case ACLK_GMAC:
case PCLK_GMAC:
case SCLK_USB3OTG_REF:
case SCLK_USB3OTG_SUSPEND:
case USB480M:
return 0;