malta: Switch to using CONFIG_SYS_SDRAM_SIZE

This is the only platform defining and using CONFIG_SYS_MEM_SIZE, switch
to using CONFIG_SYS_SDRAM_SIZE for consistency.

Cc: Paul Burton <paul.burton@mips.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2022-07-23 13:04:57 -04:00
parent 9a56ab96aa
commit 90df583c64
3 changed files with 4 additions and 4 deletions

View File

@ -118,7 +118,7 @@ _msc01:
/* setup basic address decode */ /* setup basic address decode */
PTR_LI t0, CKSEG1ADDR(MALTA_MSC01_BIU_BASE) PTR_LI t0, CKSEG1ADDR(MALTA_MSC01_BIU_BASE)
li t1, 0x0 li t1, 0x0
li t2, -CONFIG_SYS_MEM_SIZE li t2, -CONFIG_SYS_SDRAM_SIZE
sw t1, MSC01_BIU_MCBAS1L_OFS(t0) sw t1, MSC01_BIU_MCBAS1L_OFS(t0)
sw t2, MSC01_BIU_MCMSK1L_OFS(t0) sw t2, MSC01_BIU_MCMSK1L_OFS(t0)
sw t1, MSC01_BIU_MCBAS2L_OFS(t0) sw t1, MSC01_BIU_MCBAS2L_OFS(t0)
@ -168,7 +168,7 @@ _msc01:
sw t3, MSC01_PCI_SC2PIOMAPL_OFS(t0) sw t3, MSC01_PCI_SC2PIOMAPL_OFS(t0)
/* setup PCI_BAR0 memory window */ /* setup PCI_BAR0 memory window */
li t1, -CONFIG_SYS_MEM_SIZE li t1, -CONFIG_SYS_SDRAM_SIZE
sw t1, MSC01_PCI_BAR0_OFS(t0) sw t1, MSC01_PCI_BAR0_OFS(t0)
/* setup PCI to SysCon/CPU translation */ /* setup PCI to SysCon/CPU translation */

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@ -94,7 +94,7 @@ static enum sys_con malta_sys_con(void)
int dram_init(void) int dram_init(void)
{ {
gd->ram_size = CONFIG_SYS_MEM_SIZE; gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
return 0; return 0;
} }

View File

@ -30,7 +30,7 @@
#else #else
# define CONFIG_SYS_SDRAM_BASE 0x80000000 # define CONFIG_SYS_SDRAM_BASE 0x80000000
#endif #endif
#define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024) #define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 MiB */
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000