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	Merge branch 'master' of git://git.denx.de/u-boot
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						8f171a56b5
					
				| @ -37,7 +37,7 @@ | ||||
| 
 | ||||
| #define	MXS_I2C_MAX_TIMEOUT	1000000 | ||||
| 
 | ||||
| void mxs_i2c_reset(void) | ||||
| static void mxs_i2c_reset(void) | ||||
| { | ||||
| 	struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE; | ||||
| 	int ret; | ||||
| @ -59,7 +59,7 @@ void mxs_i2c_reset(void) | ||||
| 	i2c_set_bus_speed(speed); | ||||
| } | ||||
| 
 | ||||
| void mxs_i2c_setup_read(uint8_t chip, int len) | ||||
| static void mxs_i2c_setup_read(uint8_t chip, int len) | ||||
| { | ||||
| 	struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE; | ||||
| 
 | ||||
| @ -77,7 +77,7 @@ void mxs_i2c_setup_read(uint8_t chip, int len) | ||||
| 	writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set); | ||||
| } | ||||
| 
 | ||||
| void mxs_i2c_write(uchar chip, uint addr, int alen, | ||||
| static void mxs_i2c_write(uchar chip, uint addr, int alen, | ||||
| 			uchar *buf, int blen, int stop) | ||||
| { | ||||
| 	struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE; | ||||
| @ -121,7 +121,7 @@ void mxs_i2c_write(uchar chip, uint addr, int alen, | ||||
| 	writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set); | ||||
| } | ||||
| 
 | ||||
| int mxs_i2c_wait_for_ack(void) | ||||
| static int mxs_i2c_wait_for_ack(void) | ||||
| { | ||||
| 	struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE; | ||||
| 	uint32_t tmp; | ||||
|  | ||||
| @ -156,8 +156,6 @@ | ||||
| #define CONFIG_HARD_I2C			1 | ||||
| #define CONFIG_SYS_I2C_SPEED		100000 | ||||
| #define CONFIG_SYS_I2C_SLAVE		1 | ||||
| #define CONFIG_SYS_I2C_BUS		0 | ||||
| #define CONFIG_SYS_I2C_BUS_SELECT	1 | ||||
| #define CONFIG_DRIVER_OMAP34XX_I2C	1 | ||||
| 
 | ||||
| #undef CONFIG_CMD_NET | ||||
|  | ||||
| @ -150,8 +150,6 @@ | ||||
| #define CONFIG_HARD_I2C			1 | ||||
| #define CONFIG_SYS_I2C_SPEED		100000 | ||||
| #define CONFIG_SYS_I2C_SLAVE		1 | ||||
| #define CONFIG_SYS_I2C_BUS		0 | ||||
| #define CONFIG_SYS_I2C_BUS_SELECT	1 | ||||
| #define CONFIG_DRIVER_OMAP34XX_I2C	1 | ||||
| 
 | ||||
| #undef CONFIG_CMD_NET | ||||
|  | ||||
| @ -157,8 +157,6 @@ | ||||
| #define CONFIG_HARD_I2C | ||||
| #define CONFIG_SYS_I2C_SPEED		100000 | ||||
| #define CONFIG_SYS_I2C_SLAVE		1 | ||||
| #define CONFIG_SYS_I2C_BUS		0 | ||||
| #define CONFIG_SYS_I2C_BUS_SELECT	1 | ||||
| #define CONFIG_DRIVER_OMAP34XX_I2C | ||||
| #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50 | ||||
| #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1 | ||||
|  | ||||
| @ -108,8 +108,6 @@ | ||||
| #define CONFIG_HARD_I2C			1 | ||||
| #define CONFIG_SYS_I2C_SPEED		100000 | ||||
| #define CONFIG_SYS_I2C_SLAVE		1 | ||||
| #define CONFIG_SYS_I2C_BUS		0 | ||||
| #define CONFIG_SYS_I2C_BUS_SELECT	1 | ||||
| #define CONFIG_DRIVER_OMAP34XX_I2C	1 | ||||
| 
 | ||||
| /* TWL4030 */ | ||||
|  | ||||
| @ -141,8 +141,6 @@ | ||||
| #define CONFIG_HARD_I2C | ||||
| #define CONFIG_SYS_I2C_SPEED		100000 | ||||
| #define CONFIG_SYS_I2C_SLAVE		1 | ||||
| #define CONFIG_SYS_I2C_BUS		0 | ||||
| #define CONFIG_SYS_I2C_BUS_SELECT	1 | ||||
| #define CONFIG_DRIVER_OMAP34XX_I2C	1 | ||||
| 
 | ||||
| /*
 | ||||
|  | ||||
| @ -129,8 +129,6 @@ | ||||
| #define CONFIG_HARD_I2C			1 | ||||
| #define CONFIG_SYS_I2C_SPEED		100000 | ||||
| #define CONFIG_SYS_I2C_SLAVE		1 | ||||
| #define CONFIG_SYS_I2C_BUS		0 | ||||
| #define CONFIG_SYS_I2C_BUS_SELECT	1 | ||||
| #define CONFIG_DRIVER_OMAP34XX_I2C	1 | ||||
| 
 | ||||
| /*
 | ||||
|  | ||||
| @ -151,7 +151,6 @@ | ||||
| #define CONFIG_HARD_I2C | ||||
| #define CONFIG_SYS_I2C_SPEED		100000 | ||||
| #define CONFIG_SYS_I2C_SLAVE		1 | ||||
| #define CONFIG_SYS_I2C_BUS		0 | ||||
| #define CONFIG_DRIVER_OMAP34XX_I2C | ||||
| 
 | ||||
| /* RTC */ | ||||
|  | ||||
| @ -178,8 +178,6 @@ | ||||
| #define CONFIG_HARD_I2C			1 | ||||
| #define CONFIG_SYS_I2C_SPEED		100000 | ||||
| #define CONFIG_SYS_I2C_SLAVE		1 | ||||
| #define CONFIG_SYS_I2C_BUS		0 | ||||
| #define CONFIG_SYS_I2C_BUS_SELECT	1 | ||||
| #define CONFIG_I2C_MULTI_BUS		1 | ||||
| #define CONFIG_DRIVER_OMAP34XX_I2C	1 | ||||
| #define CONFIG_VIDEO_OMAP3	/* DSS Support			*/ | ||||
|  | ||||
| @ -100,8 +100,6 @@ | ||||
| 
 | ||||
| #define CONFIG_SYS_I2C_SPEED		100000 | ||||
| #define CONFIG_SYS_I2C_SLAVE		1 | ||||
| #define CONFIG_SYS_I2C_BUS		0 | ||||
| #define CONFIG_SYS_I2C_BUS_SELECT	1 | ||||
| 
 | ||||
| /*
 | ||||
|  * PISMO support | ||||
|  | ||||
| @ -138,8 +138,6 @@ | ||||
| 
 | ||||
| #define CONFIG_SYS_I2C_SPEED		100000 | ||||
| #define CONFIG_SYS_I2C_SLAVE		1 | ||||
| #define CONFIG_SYS_I2C_BUS		0 | ||||
| #define CONFIG_SYS_I2C_BUS_SELECT	1 | ||||
| #define CONFIG_I2C_MULTI_BUS | ||||
| 
 | ||||
| /*
 | ||||
|  | ||||
| @ -142,8 +142,6 @@ | ||||
| #define CONFIG_HARD_I2C			1 | ||||
| #define CONFIG_SYS_I2C_SPEED		100000 | ||||
| #define CONFIG_SYS_I2C_SLAVE		0 | ||||
| #define CONFIG_SYS_I2C_BUS		0 /* This isn't used anywhere ?? */ | ||||
| #define CONFIG_SYS_I2C_BUS_SELECT	1 /* This isn't used anywhere ?? */ | ||||
| #define CONFIG_DRIVER_OMAP34XX_I2C	1 | ||||
| #define CONFIG_I2C_MULTI_BUS		1 | ||||
| 
 | ||||
|  | ||||
| @ -126,8 +126,6 @@ | ||||
| #define CONFIG_HARD_I2C			1 | ||||
| #define CONFIG_SYS_I2C_SPEED		100000 | ||||
| #define CONFIG_SYS_I2C_SLAVE		1 | ||||
| #define CONFIG_SYS_I2C_BUS		0 | ||||
| #define CONFIG_SYS_I2C_BUS_SELECT	1 | ||||
| #define CONFIG_DRIVER_OMAP34XX_I2C	1 | ||||
| 
 | ||||
| /*
 | ||||
|  | ||||
| @ -132,8 +132,6 @@ | ||||
| #define CONFIG_HARD_I2C			1 | ||||
| #define CONFIG_SYS_I2C_SPEED		100000 | ||||
| #define CONFIG_SYS_I2C_SLAVE		1 | ||||
| #define CONFIG_SYS_I2C_BUS		0 | ||||
| #define CONFIG_SYS_I2C_BUS_SELECT	1 | ||||
| #define CONFIG_DRIVER_OMAP34XX_I2C	1 | ||||
| 
 | ||||
| /* OMITTED:  single 1 Gbit MT29F1G NAND flash */ | ||||
|  | ||||
| @ -136,8 +136,6 @@ | ||||
| #define CONFIG_HARD_I2C			1 | ||||
| #define CONFIG_SYS_I2C_SPEED		100000 | ||||
| #define CONFIG_SYS_I2C_SLAVE		1 | ||||
| #define CONFIG_SYS_I2C_BUS		0 | ||||
| #define CONFIG_SYS_I2C_BUS_SELECT	1 | ||||
| #define CONFIG_DRIVER_OMAP34XX_I2C	1 | ||||
| 
 | ||||
| /*
 | ||||
|  | ||||
| @ -156,8 +156,6 @@ | ||||
| #define CONFIG_HARD_I2C			1 | ||||
| #define CONFIG_SYS_I2C_SPEED		100000 | ||||
| #define CONFIG_SYS_I2C_SLAVE		1 | ||||
| #define CONFIG_SYS_I2C_BUS		0 | ||||
| #define CONFIG_SYS_I2C_BUS_SELECT	1 | ||||
| #define CONFIG_DRIVER_OMAP34XX_I2C	1 | ||||
| 
 | ||||
| /*
 | ||||
|  | ||||
| @ -91,8 +91,6 @@ | ||||
| #define CONFIG_HARD_I2C			1 | ||||
| #define CONFIG_SYS_I2C_SPEED		100000 | ||||
| #define CONFIG_SYS_I2C_SLAVE		1 | ||||
| #define CONFIG_SYS_I2C_BUS		0 | ||||
| #define CONFIG_SYS_I2C_BUS_SELECT	1 | ||||
| #define CONFIG_DRIVER_OMAP34XX_I2C	1 | ||||
| #define CONFIG_I2C_MULTI_BUS		1 | ||||
| 
 | ||||
|  | ||||
| @ -131,8 +131,6 @@ | ||||
| #define CONFIG_HARD_I2C | ||||
| #define CONFIG_SYS_I2C_SPEED		400000 | ||||
| #define CONFIG_SYS_I2C_SLAVE		1 | ||||
| #define CONFIG_SYS_I2C_BUS		0 | ||||
| #define CONFIG_SYS_I2C_BUS_SELECT	1 | ||||
| #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50		/* base address */ | ||||
| #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1		/* bytes of address */ | ||||
| #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	0x07 | ||||
|  | ||||
| @ -98,8 +98,6 @@ | ||||
| #define CONFIG_HARD_I2C | ||||
| #define CONFIG_SYS_I2C_SPEED		100000 | ||||
| #define CONFIG_SYS_I2C_SLAVE		1 | ||||
| #define CONFIG_SYS_I2C_BUS		0 | ||||
| #define CONFIG_SYS_I2C_BUS_SELECT	1 | ||||
| #define CONFIG_DRIVER_OMAP34XX_I2C	1 | ||||
| 
 | ||||
| /* TWL4030 */ | ||||
|  | ||||
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