mirrors/u-boot
1
0
Fork 0
mirror of https://source.denx.de/u-boot/u-boot.git synced 2026-05-05 12:46:14 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity

arm64: versal: Add missing prototypes

Browse Source 
Add missing prototypes to fix the below sparse warnings
1. warning: no previous prototype for 'set_r5_halt_mode'
[-Wmissing-prototypes]
2. warning: no previous prototype for 'set_r5_tcm_mode'
[-Wmissing-prototypes]
3. warning: no previous prototype for 'release_r5_reset'
[-Wmissing-prototypes]
4.warning: no previous prototype for 'enable_clock_r5'
[-Wmissing-prototypes]

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230609090531.31794-3-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
This commit is contained in:
Algapally Santosh Sagar 2023-06-09 03:05:31 -06:00 committed by Michal Simek
parent b177bb1269
commit 89240bc0c4
1 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
arch/arm/mach-versal/mp.c
View File

@ -23,7 +23,7 @@
#define VERSAL_CRL_RST_CPU_R5_RESET_PGE_MASK 0x10
#define VERSAL_CRLAPB_CPU_R5_CTRL_CLKACT_MASK 0x1000000
void set_r5_halt_mode(u8 halt, u8 mode)
static void set_r5_halt_mode(u8 halt, u8 mode)
{
u32 tmp;
@ -44,7 +44,7 @@ void set_r5_halt_mode(u8 halt, u8 mode)
}
}
void set_r5_tcm_mode(u8 mode)
static void set_r5_tcm_mode(u8 mode)
{
u32 tmp;
@ -62,7 +62,7 @@ void set_r5_tcm_mode(u8 mode)
writel(tmp, &rpu_base->rpu_glbl_ctrl);
}
void release_r5_reset(u8 mode)
static void release_r5_reset(u8 mode)
{
u32 tmp;
@ -77,7 +77,7 @@ void release_r5_reset(u8 mode)
writel(tmp, &crlapb_base->rst_cpu_r5);
}
void enable_clock_r5(void)
static void enable_clock_r5(void)
{
u32 tmp;