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Convert CONFIG_EHCI_DESC_BIG_ENDIAN et al to Kconfig
This converts the following to Kconfig: CONFIG_EHCI_DESC_BIG_ENDIAN CONFIG_EHCI_MMIO_BIG_ENDIAN Signed-off-by: Tom Rini <trini@konsulko.com>
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@ -116,11 +116,19 @@ config USB_XHCI_BRCM
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endif # USB_XHCI_HCD
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endif # USB_XHCI_HCD
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config EHCI_DESC_BIG_ENDIAN
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bool
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config EHCI_MMIO_BIG_ENDIAN
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bool
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config USB_EHCI_HCD
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config USB_EHCI_HCD
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bool "EHCI HCD (USB 2.0) support"
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bool "EHCI HCD (USB 2.0) support"
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default y if ARCH_MX5 || ARCH_MX6
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default y if ARCH_MX5 || ARCH_MX6
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depends on DM && OF_CONTROL
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depends on DM && OF_CONTROL
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select USB_HOST
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select USB_HOST
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select EHCI_DESC_BIG_ENDIAN if SYS_BIG_ENDIAN
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select EHCI_MMIO_BIG_ENDIAN if SYS_BIG_ENDIAN
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---help---
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---help---
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The Enhanced Host Controller Interface (EHCI) is standard for USB 2.0
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The Enhanced Host Controller Interface (EHCI) is standard for USB 2.0
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"high speed" (480 Mbit/sec, 60 Mbyte/sec) host controller hardware.
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"high speed" (480 Mbit/sec, 60 Mbyte/sec) host controller hardware.
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@ -166,6 +174,7 @@ config USB_EHCI_MX5
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config USB_EHCI_MX6
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config USB_EHCI_MX6
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bool "Support for i.MX6/i.MX7ULP on-chip EHCI USB controller"
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bool "Support for i.MX6/i.MX7ULP on-chip EHCI USB controller"
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depends on ARCH_MX6 || ARCH_MX7ULP || ARCH_IMXRT
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depends on ARCH_MX6 || ARCH_MX7ULP || ARCH_IMXRT
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select EHCI_HCD_INIT_AFTER_RESET
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default y
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default y
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---help---
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---help---
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Enables support for the on-chip EHCI controller on i.MX6 SoCs.
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Enables support for the on-chip EHCI controller on i.MX6 SoCs.
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@ -173,6 +182,7 @@ config USB_EHCI_MX6
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config USB_EHCI_MX7
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config USB_EHCI_MX7
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bool "Support for i.MX7 on-chip EHCI USB controller"
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bool "Support for i.MX7 on-chip EHCI USB controller"
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depends on ARCH_MX7 || IMX8M
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depends on ARCH_MX7 || IMX8M
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select EHCI_HCD_INIT_AFTER_RESET if ARCH_MX7
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select PHY if IMX8M
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select PHY if IMX8M
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select NOP_PHY if IMX8M
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select NOP_PHY if IMX8M
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default y
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default y
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@ -15,8 +15,6 @@
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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/* USB */
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/* USB */
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#define CONFIG_EHCI_DESC_BIG_ENDIAN
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#define CONFIG_EHCI_MMIO_BIG_ENDIAN
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#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
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#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#if defined(CONFIG_USB_OHCI_HCD)
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#if defined(CONFIG_USB_OHCI_HCD)
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@ -15,8 +15,6 @@
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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/* USB */
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/* USB */
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#define CONFIG_EHCI_DESC_BIG_ENDIAN
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#define CONFIG_EHCI_MMIO_BIG_ENDIAN
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#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
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#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#if defined(CONFIG_USB_OHCI_HCD)
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#if defined(CONFIG_USB_OHCI_HCD)
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@ -15,8 +15,6 @@
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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/* USB */
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/* USB */
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#define CONFIG_EHCI_DESC_BIG_ENDIAN
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#define CONFIG_EHCI_MMIO_BIG_ENDIAN
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#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
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#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#if defined(CONFIG_USB_OHCI_HCD)
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#if defined(CONFIG_USB_OHCI_HCD)
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@ -15,8 +15,6 @@
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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/* USB */
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/* USB */
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#define CONFIG_EHCI_DESC_BIG_ENDIAN
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#define CONFIG_EHCI_MMIO_BIG_ENDIAN
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#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
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#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#if defined(CONFIG_USB_OHCI_HCD)
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#if defined(CONFIG_USB_OHCI_HCD)
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@ -15,8 +15,6 @@
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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/* USB */
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/* USB */
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#define CONFIG_EHCI_DESC_BIG_ENDIAN
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#define CONFIG_EHCI_MMIO_BIG_ENDIAN
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#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
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#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#if defined(CONFIG_USB_OHCI_HCD)
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#if defined(CONFIG_USB_OHCI_HCD)
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@ -15,8 +15,6 @@
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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/* USB */
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/* USB */
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#define CONFIG_EHCI_DESC_BIG_ENDIAN
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#define CONFIG_EHCI_MMIO_BIG_ENDIAN
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#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
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#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#if defined(CONFIG_USB_OHCI_HCD)
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#if defined(CONFIG_USB_OHCI_HCD)
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@ -24,10 +24,6 @@
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*/
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*/
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/* Miscellaneous configurable options */
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/* Miscellaneous configurable options */
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/* USB, USB storage, USB ethernet */
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#define CONFIG_EHCI_MMIO_BIG_ENDIAN
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#define CONFIG_EHCI_DESC_BIG_ENDIAN
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/*
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/*
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* Diagnostics
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* Diagnostics
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*/
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*/
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