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sunxi: dts: Update RGMII phy-mode properties
Commit f11513d99787 ("net: phy: realtek: Add tx/rx delay config for
8211e") made the Realtek PHY driver honour the phy-mode DT property,
to set up the proper delay scheme for the RX and TX lines. A similar
change in the kernel revealed that those properties were mostly wrong.
The kernel DTs got updated over the last few months, but we were missing
out on the U-Boot version.
Just sync in the phy-mode properties from the mainline kernel,
v5.17-rc7, to avoid the breaking DT sync that late in the cycle.
This fixes Ethernet operation on the affected boards.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
This commit is contained in:
parent
e943753dc2
commit
85da558762
@ -79,7 +79,7 @@
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&emac {
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii_pins>;
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phy-mode = "rgmii-id";
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phy-mode = "rgmii-txid";
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phy-handle = <&ext_rgmii_phy>;
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phy-supply = <®_dc1sw>;
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status = "okay";
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@ -75,7 +75,7 @@
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pinctrl-0 = <&emac_rgmii_pins>;
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phy-supply = <®_gmac_3v3>;
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phy-handle = <&ext_rgmii_phy>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-id";
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status = "okay";
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};
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@ -69,7 +69,7 @@
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pinctrl-0 = <&emac_rgmii_pins>;
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phy-supply = <®_gmac_3v3>;
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phy-handle = <&ext_rgmii_phy>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-id";
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status = "okay";
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};
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@ -162,7 +162,7 @@
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pinctrl-names = "default";
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pinctrl-0 = <&gmac_pins_rgmii_a>, <&gmac_phy_reset_pin_hummingbird>;
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phy = <&phy1>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-id";
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snps,reset-gpio = <&pio 0 21 GPIO_ACTIVE_HIGH>;
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snps,reset-active-low;
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snps,reset-delays-us = <0 10000 30000>;
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@ -130,7 +130,7 @@
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pinctrl-names = "default";
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pinctrl-0 = <&gmac_rgmii_pins>;
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phy = <&phy1>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-id";
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phy-supply = <®_gmac_3v3>;
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status = "okay";
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@ -132,7 +132,7 @@
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pinctrl-names = "default";
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pinctrl-0 = <&gmac_rgmii_pins>;
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phy = <&phy1>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-id";
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phy-supply = <®_gmac_3v3>;
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status = "okay";
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@ -110,7 +110,7 @@
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pinctrl-names = "default";
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pinctrl-0 = <&gmac_rgmii_pins>;
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phy = <&phy1>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-id";
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phy-supply = <®_gmac_3v3>;
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status = "okay";
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@ -151,7 +151,7 @@
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pinctrl-names = "default";
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pinctrl-0 = <&gmac_rgmii_pins>;
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phy = <&phy1>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-id";
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status = "okay";
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phy1: ethernet-phy@1 {
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@ -112,7 +112,7 @@
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pinctrl-names = "default";
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pinctrl-0 = <&gmac_rgmii_pins>;
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phy = <&phy1>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-id";
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status = "okay";
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phy1: ethernet-phy@1 {
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@ -115,7 +115,7 @@
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pinctrl-names = "default";
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pinctrl-0 = <&gmac_rgmii_pins>;
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phy = <&phy1>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-id";
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status = "okay";
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phy1: ethernet-phy@1 {
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@ -123,7 +123,7 @@
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pinctrl-0 = <&emac_rgmii_pins>;
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phy-supply = <®_sw>;
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phy-handle = <&rgmii_phy>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-id";
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allwinner,rx-delay-ps = <700>;
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allwinner,tx-delay-ps = <700>;
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status = "okay";
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@ -160,7 +160,7 @@
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pinctrl-0 = <&emac_rgmii_pins>;
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phy-supply = <®_dldo4>;
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phy-handle = <&rgmii_phy>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-id";
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status = "okay";
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};
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@ -85,7 +85,7 @@
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pinctrl-0 = <&emac_rgmii_pins>;
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phy-supply = <®_gmac_3v3>;
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phy-handle = <&ext_rgmii_phy>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-id";
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status = "okay";
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};
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@ -126,7 +126,7 @@
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pinctrl-0 = <&emac_rgmii_pins>;
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phy-supply = <®_gmac_3v3>;
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phy-handle = <&ext_rgmii_phy>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-id";
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status = "okay";
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};
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