configs: keystone2: Remove unused SPL_MALLOC_F_SIZE and KEYSTONE_SPL_STACK_SIZE

These are leftover definitions. While here cleanup some leftover comments.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Andrew Davis 2023-11-17 16:38:27 -06:00 committed by Tom Rini
parent 4072572b0f
commit 83ad745cb9

View File

@ -9,23 +9,10 @@
#ifndef __CONFIG_KS2_EVM_H #ifndef __CONFIG_KS2_EVM_H
#define __CONFIG_KS2_EVM_H #define __CONFIG_KS2_EVM_H
/* U-Boot Build Configuration */
/* SoC Configuration */
/* Memory Configuration */ /* Memory Configuration */
#define CFG_SYS_LPAE_SDRAM_BASE 0x800000000 #define CFG_SYS_LPAE_SDRAM_BASE 0x800000000
#define CFG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */ #define CFG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */
#ifdef CONFIG_SYS_MALLOC_F_LEN
#define SPL_MALLOC_F_SIZE CONFIG_SYS_MALLOC_F_LEN
#else
#define SPL_MALLOC_F_SIZE 0
#endif
/* SPL SPI Loader Configuration */
#define KEYSTONE_SPL_STACK_SIZE (8 * 1024)
/* SRAM scratch space entries */ /* SRAM scratch space entries */
#define SRAM_SCRATCH_SPACE_ADDR 0xc0c23fc #define SRAM_SCRATCH_SPACE_ADDR 0xc0c23fc
@ -53,8 +40,6 @@
#define CFG_KSNET_SERDES_SGMII2_BASE KS2_SGMII_SERDES2_BASE #define CFG_KSNET_SERDES_SGMII2_BASE KS2_SGMII_SERDES2_BASE
#define CFG_KSNET_SERDES_LANES_PER_SGMII KS2_LANES_PER_SGMII_SERDES #define CFG_KSNET_SERDES_LANES_PER_SGMII KS2_LANES_PER_SGMII_SERDES
/* EEPROM definitions */
/* NAND Configuration */ /* NAND Configuration */
#define CFG_SYS_NAND_MASK_CLE 0x4000 #define CFG_SYS_NAND_MASK_CLE 0x4000
#define CFG_SYS_NAND_MASK_ALE 0x2000 #define CFG_SYS_NAND_MASK_ALE 0x2000
@ -63,13 +48,6 @@
#define CFG_SYS_NAND_LARGEPAGE #define CFG_SYS_NAND_LARGEPAGE
#define CFG_SYS_NAND_BASE_LIST { 0x30000000, } #define CFG_SYS_NAND_BASE_LIST { 0x30000000, }
/* U-Boot general configuration */
/* EDMA3 */
/* Now for the remaining common defines */ /* Now for the remaining common defines */
#include <configs/ti_armv7_common.h> #include <configs/ti_armv7_common.h>