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rockchip: rk3576: Add SPI Flash boot support
The bootsource ids reported by BootROM of RK3576 for SPI NOR and USB differs slightly compared to prior SoCs: - Booting from sfc0 (ROCK 4D) report the normal bootsource id 0x3. - Booting from sfc1 M1 (NanoPi M5) report a new bootsource id 0x23. - Booting from sfc1 M0 has not been tested (no board using this config). - Booting from USB report a new bootsource id 0x81. Add a RK3576 specific read_brom_bootsource_id() function to help decode the new bootsource id values and the required boot_devices mapping of sfc0 and sfc1 to help support booting from SPI flash on RK3576. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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@ -6,6 +6,11 @@
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#include "rockchip-u-boot.dtsi"
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#include "rockchip-u-boot.dtsi"
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/ {
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/ {
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aliases {
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spi5 = &sfc0;
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spi6 = &sfc1;
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};
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chosen {
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chosen {
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u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
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u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
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};
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};
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@ -16,6 +21,17 @@
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};
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};
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};
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};
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#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
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&binman {
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simple-bin-spi {
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mkimage {
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args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
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offset = <0x8000>;
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};
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};
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};
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#endif
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&cru {
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&cru {
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bootph-all;
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bootph-all;
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};
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};
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@ -45,6 +61,26 @@
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bootph-some-ram;
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bootph-some-ram;
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};
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};
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&fspi0_csn0 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&fspi0_pins {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&fspi1m1_csn0 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&fspi1m1_pins {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&ioc_grf {
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&ioc_grf {
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bootph-all;
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bootph-all;
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};
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};
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@ -116,6 +152,16 @@
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bootph-some-ram;
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bootph-some-ram;
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};
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};
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&sfc0 {
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bootph-some-ram;
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u-boot,spl-sfc-no-dma;
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};
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&sfc1 {
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bootph-some-ram;
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u-boot,spl-sfc-no-dma;
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};
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&sys_grf {
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&sys_grf {
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bootph-all;
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bootph-all;
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};
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};
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@ -36,8 +36,15 @@
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#define USB_GRF_BASE 0x2601E000
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#define USB_GRF_BASE 0x2601E000
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#define USB3OTG0_CON1 0x0030
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#define USB3OTG0_CON1 0x0030
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enum {
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BROM_BOOTSOURCE_FSPI0 = 3,
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BROM_BOOTSOURCE_FSPI1_M1 = 6,
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};
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const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
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const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
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[BROM_BOOTSOURCE_EMMC] = "/soc/mmc@2a330000",
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[BROM_BOOTSOURCE_EMMC] = "/soc/mmc@2a330000",
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[BROM_BOOTSOURCE_FSPI0] = "/soc/spi@2a340000/flash@0",
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[BROM_BOOTSOURCE_FSPI1_M1] = "/soc/spi@2a300000/flash@0",
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[BROM_BOOTSOURCE_SD] = "/soc/mmc@2a310000",
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[BROM_BOOTSOURCE_SD] = "/soc/mmc@2a310000",
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};
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};
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@ -85,6 +92,24 @@ void board_debug_uart_init(void)
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{
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{
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}
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}
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u32 read_brom_bootsource_id(void)
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{
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u32 bootsource_id = readl(BROM_BOOTSOURCE_ID_ADDR);
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/* Re-map the raw value read from reg to a redefined or existing
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* BROM_BOOTSOURCE enum value to avoid having to create a larger
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* boot_devices table.
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*/
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if (bootsource_id == 0x23)
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return BROM_BOOTSOURCE_FSPI1_M1;
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else if (bootsource_id == 0x81)
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return BROM_BOOTSOURCE_USB;
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else if (bootsource_id > BROM_LAST_BOOTSOURCE)
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log_debug("Unknown bootsource %x\n", bootsource_id);
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return bootsource_id;
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}
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#define HP_TIMER_BASE CONFIG_ROCKCHIP_STIMER_BASE
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#define HP_TIMER_BASE CONFIG_ROCKCHIP_STIMER_BASE
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#define HP_CTRL_REG 0x04
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#define HP_CTRL_REG 0x04
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#define TIMER_EN BIT(0)
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#define TIMER_EN BIT(0)
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