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Revert "rockchip: rk3399: Drop unneeded bob and kevin board specific code"
These power rails must be on very early for the U-Boos SPL banner to be show over debug UART. This reverts commit af518a1dfe637cb4dc486d7a832585e4a48bc970. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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@ -7,6 +7,7 @@
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#include <init.h>
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#include <log.h>
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#include <spl.h>
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#include <spl_gpio.h>
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#include <syscon.h>
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#include <asm/armv8/mmu.h>
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#include <asm/arch-rockchip/bootrom.h>
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@ -15,7 +16,6 @@
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#include <asm/arch-rockchip/gpio.h>
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#include <asm/arch-rockchip/grf_rk3399.h>
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#include <asm/arch-rockchip/hardware.h>
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#include <asm/gpio.h>
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#include <linux/bitops.h>
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#include <linux/printk.h>
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#include <power/regulator.h>
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@ -133,6 +133,27 @@ void board_debug_uart_init(void)
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GRF_GPIO3B7_SEL_MASK,
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GRF_UART3_SOUT << GRF_GPIO3B7_SEL_SHIFT);
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#else
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struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE;
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struct rockchip_gpio_regs * const gpio = (void *)GPIO0_BASE;
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if (IS_ENABLED(CONFIG_SPL_BUILD) &&
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(IS_ENABLED(CONFIG_TARGET_CHROMEBOOK_BOB) ||
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IS_ENABLED(CONFIG_TARGET_CHROMEBOOK_KEVIN))) {
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rk_setreg(&grf->io_vsel, 1 << 0);
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/*
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* Let's enable these power rails here, we are already running
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* the SPI-Flash-based code.
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*/
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spl_gpio_output(gpio, GPIO(BANK_B, 2), 1); /* PP1500_EN */
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spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 2),
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GPIO_PULL_NORMAL);
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spl_gpio_output(gpio, GPIO(BANK_B, 4), 1); /* PP3000_EN */
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spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 4),
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GPIO_PULL_NORMAL);
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}
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/* Enable early UART2 channel C on the RK3399 */
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rk_clrsetreg(&grf->gpio4c_iomux,
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GRF_GPIO4C3_SEL_MASK,
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