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spi: cadence_qspi: Disable the DAC mode in indirect read

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Hang has been observed on QEMU, as it starts with indac
read and fills sram, but after dma is triggered, it tries
dac read instead (based on priority) which gets blocked.
Disable the DAC mode in indirect DMA read and enable back
for writes as DAC mode is used.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Tested-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20250430050923.135256-1-venkatesh.abbarapu@amd.com
This commit is contained in:
Venkatesh Yadav Abbarapu 2025-04-30 10:39:23 +05:30 committed by Michal Simek
parent c82aedd185
commit 79a647c6b7
1 changed files with 7 additions and 0 deletions
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7
drivers/spi/cadence_ospi_versal.c
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@ -35,6 +35,10 @@ int cadence_qspi_apb_dma_read(struct cadence_spi_priv *priv,
bytes_to_dma = n_rx - rx_rem;
if (bytes_to_dma) {
if (priv->use_dac_mode)
clrbits_le32(priv->regbase + CQSPI_REG_CONFIG,
CQSPI_REG_CONFIG_DIRECT);
cadence_qspi_apb_enable_linear_mode(false);
reg = readl(priv->regbase + CQSPI_REG_CONFIG);
reg |= CQSPI_REG_CONFIG_ENBL_DMA;
@ -125,6 +129,9 @@ int cadence_qspi_apb_dma_read(struct cadence_spi_priv *priv,
memcpy(rxbuf, rxbuf + 1, n_rx - 1);
}
if (priv->use_dac_mode)
cadence_qspi_apb_dac_mode_enable(priv->regbase);
return 0;
}