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board: cssi: Read and display MCR board address

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MCR boards are plugged in racks. The position in the rack can be read
in a register.

For MCR3000, that's provided by the FPGA so check it is loaded before
reading the address.

For the other boards, the FPGA is loaded by hardware so it can be
read inconditionnaly.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
This commit is contained in:
Christophe Leroy 2024-04-14 16:47:06 +02:00
parent 313ffe2746
commit 741e30e8c2
2 changed files with 11 additions and 2 deletions
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6
board/cssi/common/common.c
View File

@ -164,7 +164,7 @@ int checkboard_common(void)
void misc_init_r_common(void)
{
u8 tmp, far_id;
u8 tmp, far_id, addr;
int count = 3;
switch (in_8(ADDR_FPGA_R_BASE)) {
@ -173,6 +173,10 @@ void misc_init_r_common(void)
if ((in_8(ADDR_FPGA_R_BASE + 0x31) & FPGA_R_ACQ_AL_FAV) == 0)
env_set("bootdelay", "60");
addr = in_8(ADDR_FPGA_R_BASE + 0x43);
printf("Board address: 0x%2.2x (System %d Rack %d Slot %d)\n",
addr, addr >> 7, (addr >> 4) & 7, addr & 15);
env_set("config", CFG_BOARD_MCR3000_2G);
env_set("hostname", CFG_BOARD_MCR3000_2G);
break;

7
board/cssi/mcr3000/mcr3000.c
View File

@ -167,7 +167,12 @@ int misc_init_r(void)
setbits_be32(&immr->im_cpm.cp_pbdir, 0xf);
clrbits_be32(&immr->im_cpm.cp_pbdat, 0x1);
load_fpga();
if (!load_fpga()) {
u8 addr = in_be16((void *)0x1400009c);
printf("Board address: 0x%2.2x (System %d Rack %d Slot %d)\n",
addr, addr >> 7, (addr >> 4) & 7, addr & 15);
}
/* if BTN_ACQ_AL is pressed then bootdelay is changed to 60 second */
if ((in_be16(&iop->iop_pcdat) & 0x0004) == 0)