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Merge git://git.denx.de/u-boot-sunxi

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This commit is contained in:
Tom Rini 2017-11-10 10:04:21 -05:00
commit 66bd5a3ebb
2 changed files with 5 additions and 0 deletions
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2
board/sunxi/board.c
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@ -217,6 +217,8 @@ int board_init(void)
satapwr_pin = sunxi_name_to_gpio(CONFIG_SATAPWR); satapwr_pin = sunxi_name_to_gpio(CONFIG_SATAPWR);
gpio_request(satapwr_pin, "satapwr"); gpio_request(satapwr_pin, "satapwr");
gpio_direction_output(satapwr_pin, 1); gpio_direction_output(satapwr_pin, 1);
/* Give attached sata device time to power-up to avoid link timeouts */
mdelay(500);
#endif #endif
#ifdef CONFIG_MACPWR #ifdef CONFIG_MACPWR
macpwr_pin = sunxi_name_to_gpio(CONFIG_MACPWR); macpwr_pin = sunxi_name_to_gpio(CONFIG_MACPWR);

3
drivers/net/sun8i_emac.c
View File

@ -604,6 +604,8 @@ static void sun8i_emac_board_setup(struct emac_eth_dev *priv)
{ {
struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
#ifdef CONFIG_MACH_SUNXI_H3_H5
/* Only H3/H5 have clock controls for internal EPHY */
if (priv->use_internal_phy) { if (priv->use_internal_phy) {
/* Set clock gating for ephy */ /* Set clock gating for ephy */
setbits_le32(&ccm->bus_gate4, BIT(AHB_GATE_OFFSET_EPHY)); setbits_le32(&ccm->bus_gate4, BIT(AHB_GATE_OFFSET_EPHY));
@ -611,6 +613,7 @@ static void sun8i_emac_board_setup(struct emac_eth_dev *priv)
/* Deassert EPHY */ /* Deassert EPHY */
setbits_le32(&ccm->ahb_reset2_cfg, BIT(AHB_RESET_OFFSET_EPHY)); setbits_le32(&ccm->ahb_reset2_cfg, BIT(AHB_RESET_OFFSET_EPHY));
} }
#endif
/* Set clock gating for emac */ /* Set clock gating for emac */
setbits_le32(&ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_GMAC)); setbits_le32(&ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_GMAC));