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spi: zynqmp_qspi: Change flush cache to invalidate cache

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Before DMA read, ideally cache should be invalidated, so that data from
memory will be updated to cache after DMA is completed. But
flush_dcache_range is being used which is incorrect. Change
flush_dcache_range to invalidate_dcache_range.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230915031759.28889-2-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
This commit is contained in:
Ashok Reddy Soma 2023-09-15 08:47:58 +05:30 committed by Michal Simek
parent 8750d35ee2
commit 638189ddea
1 changed files with 1 additions and 1 deletions
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2
drivers/spi/zynqmp_gqspi.c
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@ -690,7 +690,7 @@ static int zynqmp_qspi_start_dma(struct zynqmp_qspi_priv *priv,
writel(GQSPI_DMA_DST_I_STS_MASK, &dma_regs->dmaier); writel(GQSPI_DMA_DST_I_STS_MASK, &dma_regs->dmaier);
addr = (unsigned long)buf; addr = (unsigned long)buf;
size = roundup(priv->len, GQSPI_DMA_ALIGN); size = roundup(priv->len, GQSPI_DMA_ALIGN);
flush_dcache_range(addr, addr + size); invalidate_dcache_range(addr, addr + size);
while (priv->len) { while (priv->len) {
zynqmp_qspi_calc_exp(priv, &gen_fifo_cmd); zynqmp_qspi_calc_exp(priv, &gen_fifo_cmd);