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Pull request for u-boot-nand-20230417

Browse Source 
The first two patches are by Frieder Schrempf who joins as a reviewer for
 the SPI NAND framework and drivers.
 
 The following 2 patches are by Linus Walleij and are taken by the series
 "Add Broadcom Northstar basic support".
 
 Bin Meng makes static a list for octeontx.
 
 Francesco Dolcini specifies MTD partitions on command line for
 colibri-{imx6ull,imx7}.
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Merge tag 'u-boot-nand-20230417' of https://source.denx.de/u-boot/custodians/u-boot-nand-flash

Pull request for u-boot-nand-20230417

The first two patches are by Frieder Schrempf who joins as a reviewer for
the SPI NAND framework and drivers.

The following 2 patches are by Linus Walleij and are taken by the series
"Add Broadcom Northstar basic support".

Bin Meng makes static a list for octeontx.

Francesco Dolcini specifies MTD partitions on command line for
colibri-{imx6ull,imx7}.
This commit is contained in:
Tom Rini 2023-04-17 10:47:33 -04:00
commit 5db4972a5b
13 changed files with 184 additions and 37 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
MAINTAINERS
View File

@ -1181,13 +1181,6 @@ S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-mmc.git
F: drivers/mmc/
NAND FLASH
M: Dario Binacchi <dario.binacchi@amarulasolutions.com>
M: Michael Trimarchi <michael@amarulasolutions.com>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-nand-flash.git
F: drivers/mtd/nand/raw/
NETWORK
M: Joe Hershberger <joe.hershberger@ni.com>
M: Ramon Fried <rfried.dev@gmail.com>
@ -1306,6 +1299,13 @@ S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-mpc85xx.git
F: arch/powerpc/cpu/mpc85xx/
RAW NAND
M: Dario Binacchi <dario.binacchi@amarulasolutions.com>
M: Michael Trimarchi <michael@amarulasolutions.com>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-nand-flash.git
F: drivers/mtd/nand/raw/
RISC-V
M: Rick Chen <rick@andestech.com>
M: Leo <ycliang@andestech.com>
@ -1398,6 +1398,14 @@ T: git https://source.denx.de/u-boot/custodians/u-boot-spi.git
F: drivers/spi/
F: include/spi*
SPI NAND
M: Dario Binacchi <dario.binacchi@amarulasolutions.com>
M: Michael Trimarchi <michael@amarulasolutions.com>
R: Frieder Schrempf <frieder.schrempf@kontron.de>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-nand-flash.git
F: drivers/mtd/nand/spi/
SPI-NOR
M: Jagan Teki <jagan@amarulasolutions.com>
M: Vignesh R <vigneshr@ti.com>

11
board/toradex/colibri-imx6ull/colibri-imx6ull.c
View File

@ -212,17 +212,6 @@ int checkboard(void)
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
int ft_board_setup(void *blob, struct bd_info *bd)
{
#if defined(CONFIG_FDT_FIXUP_PARTITIONS)
static struct node_info nodes[] = {
{ "fsl,imx6ull-gpmi-nand", MTD_DEV_TYPE_NAND, },
{ "fsl,imx6q-gpmi-nand", MTD_DEV_TYPE_NAND, },
};
/* Update partition nodes using info from mtdparts env var */
puts(" Updating MTD partitions...\n");
fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
#endif
return ft_common_board_setup(blob, bd);
}
#endif

10
board/toradex/colibri_imx7/colibri_imx7.c
View File

@ -303,16 +303,6 @@ int ft_board_setup(void *blob, struct bd_info *bd)
fdt_status_disabled(blob, off);
}
#endif
#if defined(CONFIG_FDT_FIXUP_PARTITIONS)
static const struct node_info nodes[] = {
{ "fsl,imx7d-gpmi-nand", MTD_DEV_TYPE_NAND, }, /* NAND flash */
{ "fsl,imx6q-gpmi-nand", MTD_DEV_TYPE_NAND, },
};
/* Update partition nodes using info from mtdparts env var */
puts(" Updating MTD partitions...\n");
fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
#endif
return ft_common_board_setup(blob, bd);
}

1
configs/colibri-imx6ull_defconfig
View File

@ -104,4 +104,3 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_FDT_FIXUP_PARTITIONS=y

1
configs/colibri_imx7_defconfig
View File

@ -102,4 +102,3 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_FDT_FIXUP_PARTITIONS=y

7
drivers/mtd/nand/raw/Kconfig
View File

@ -156,6 +156,13 @@ config NAND_BRCMNAND_63158
help
Enable support for broadcom nand driver on bcm63158.
config NAND_BRCMNAND_IPROC
bool "Support Broadcom NAND controller on the iproc family"
depends on NAND_BRCMNAND
help
Enable support for broadcom nand driver on the Broadcom
iproc family such as Northstar (BCM5301x, BCM4708...)
config NAND_DAVINCI
bool "Support TI Davinci NAND controller"
select SYS_NAND_SELF_INIT if TARGET_DA850EVM

1
drivers/mtd/nand/raw/brcmnand/Makefile
View File

@ -6,5 +6,6 @@ obj-$(CONFIG_NAND_BRCMNAND_6753) += bcm6753_nand.o
obj-$(CONFIG_NAND_BRCMNAND_68360) += bcm68360_nand.o
obj-$(CONFIG_NAND_BRCMNAND_6838) += bcm6838_nand.o
obj-$(CONFIG_NAND_BRCMNAND_6858) += bcm6858_nand.o
obj-$(CONFIG_NAND_BRCMNAND_IPROC) += iproc_nand.o
obj-$(CONFIG_NAND_BRCMNAND) += brcmnand.o
obj-$(CONFIG_NAND_BRCMNAND) += brcmnand_compat.o

148
drivers/mtd/nand/raw/brcmnand/iproc_nand.c Normal file
View File

@ -0,0 +1,148 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Code borrowed from the Linux driver
* Copyright (C) 2015 Broadcom Corporation
*/
#include <common.h>
#include <asm/io.h>
#include <memalign.h>
#include <nand.h>
#include <linux/bitops.h>
#include <linux/err.h>
#include <linux/errno.h>
#include <linux/io.h>
#include <linux/ioport.h>
#include <dm.h>
#include "brcmnand.h"
struct iproc_nand_soc {
struct brcmnand_soc soc;
void __iomem *idm_base;
void __iomem *ext_base;
};
#define IPROC_NAND_CTLR_READY_OFFSET 0x10
#define IPROC_NAND_CTLR_READY BIT(0)
#define IPROC_NAND_IO_CTRL_OFFSET 0x00
#define IPROC_NAND_APB_LE_MODE BIT(24)
#define IPROC_NAND_INT_CTRL_READ_ENABLE BIT(6)
static bool iproc_nand_intc_ack(struct brcmnand_soc *soc)
{
struct iproc_nand_soc *priv =
container_of(soc, struct iproc_nand_soc, soc);
void __iomem *mmio = priv->ext_base + IPROC_NAND_CTLR_READY_OFFSET;
u32 val = brcmnand_readl(mmio);
if (val & IPROC_NAND_CTLR_READY) {
brcmnand_writel(IPROC_NAND_CTLR_READY, mmio);
return true;
}
return false;
}
static void iproc_nand_intc_set(struct brcmnand_soc *soc, bool en)
{
struct iproc_nand_soc *priv =
container_of(soc, struct iproc_nand_soc, soc);
void __iomem *mmio = priv->idm_base + IPROC_NAND_IO_CTRL_OFFSET;
u32 val = brcmnand_readl(mmio);
if (en)
val |= IPROC_NAND_INT_CTRL_READ_ENABLE;
else
val &= ~IPROC_NAND_INT_CTRL_READ_ENABLE;
brcmnand_writel(val, mmio);
}
static void iproc_nand_apb_access(struct brcmnand_soc *soc, bool prepare,
bool is_param)
{
struct iproc_nand_soc *priv =
container_of(soc, struct iproc_nand_soc, soc);
void __iomem *mmio = priv->idm_base + IPROC_NAND_IO_CTRL_OFFSET;
u32 val;
val = brcmnand_readl(mmio);
/*
* In the case of BE or when dealing with NAND data, always configure
* the APB bus to LE mode before accessing the FIFO and back to BE mode
* after the access is done
*/
if (IS_ENABLED(CONFIG_SYS_BIG_ENDIAN) || !is_param) {
if (prepare)
val |= IPROC_NAND_APB_LE_MODE;
else
val &= ~IPROC_NAND_APB_LE_MODE;
} else { /* when in LE accessing the parameter page, keep APB in BE */
val &= ~IPROC_NAND_APB_LE_MODE;
}
brcmnand_writel(val, mmio);
}
static int iproc_nand_probe(struct udevice *dev)
{
struct udevice *pdev = dev;
struct iproc_nand_soc *priv = dev_get_priv(dev);
struct brcmnand_soc *soc;
struct resource res;
int ret;
soc = &priv->soc;
ret = dev_read_resource_byname(pdev, "iproc-idm", &res);
if (ret)
return ret;
priv->idm_base = devm_ioremap(dev, res.start, resource_size(&res));
if (IS_ERR(priv->idm_base))
return PTR_ERR(priv->idm_base);
ret = dev_read_resource_byname(pdev, "iproc-ext", &res);
if (ret)
return ret;
priv->ext_base = devm_ioremap(dev, res.start, resource_size(&res));
if (IS_ERR(priv->ext_base))
return PTR_ERR(priv->ext_base);
soc->ctlrdy_ack = iproc_nand_intc_ack;
soc->ctlrdy_set_enabled = iproc_nand_intc_set;
soc->prepare_data_bus = iproc_nand_apb_access;
return brcmnand_probe(pdev, soc);
}
static const struct udevice_id iproc_nand_dt_ids[] = {
{
.compatible = "brcm,nand-iproc",
},
{ /* sentinel */ }
};
U_BOOT_DRIVER(iproc_nand) = {
.name = "iproc-nand",
.id = UCLASS_MTD,
.of_match = iproc_nand_dt_ids,
.probe = iproc_nand_probe,
.priv_auto = sizeof(struct iproc_nand_soc),
};
void board_nand_init(void)
{
struct udevice *dev;
int ret;
ret = uclass_get_device_by_driver(UCLASS_MTD,
DM_DRIVER_GET(iproc_nand), &dev);
if (ret && ret != -ENODEV)
pr_err("Failed to initialize %s. (error %d)\n", dev->name,
ret);
}

12
drivers/mtd/nand/raw/nand_base.c
View File

@ -4487,6 +4487,7 @@ EXPORT_SYMBOL(nand_detect);
static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, ofnode node)
{
int ret, ecc_mode = -1, ecc_strength, ecc_step;
int ecc_algo = NAND_ECC_UNKNOWN;
const char *str;
ret = ofnode_read_s32_default(node, "nand-bus-width", -1);
@ -4512,10 +4513,13 @@ static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, ofnode nod
ecc_mode = NAND_ECC_SOFT_BCH;
}
if (ecc_mode == NAND_ECC_SOFT) {
str = ofnode_read_string(node, "nand-ecc-algo");
if (str && !strcmp(str, "bch"))
str = ofnode_read_string(node, "nand-ecc-algo");
if (str && !strcmp(str, "bch")) {
ecc_algo = NAND_ECC_BCH;
if (ecc_mode == NAND_ECC_SOFT)
ecc_mode = NAND_ECC_SOFT_BCH;
} else if (!strcmp(str, "hamming")) {
ecc_algo = NAND_ECC_HAMMING;
}
ecc_strength = ofnode_read_s32_default(node,
@ -4529,6 +4533,8 @@ static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, ofnode nod
return -EINVAL;
}
chip->ecc.algo = ecc_algo;
if (ecc_mode >= 0)
chip->ecc.mode = ecc_mode;

2
drivers/mtd/nand/raw/octeontx_bch.c
View File

@ -27,7 +27,7 @@
#include <asm/arch/clock.h>
#include "octeontx_bch.h"
LIST_HEAD(octeontx_bch_devices);
static LIST_HEAD(octeontx_bch_devices);
static unsigned int num_vfs = BCH_NR_VF;
static void *bch_pf;
static void *bch_vf;

2
drivers/mtd/nand/raw/octeontx_nand.c
View File

@ -354,7 +354,7 @@ struct octeontx_probe_device {
static struct bch_vf *bch_vf;
/** Deferred devices due to BCH not being ready */
LIST_HEAD(octeontx_pci_nand_deferred_devices);
static LIST_HEAD(octeontx_pci_nand_deferred_devices);
/** default parameters used for probing chips */
#define MAX_ONFI_MODE 5

2
include/configs/colibri-imx6ull.h
View File

@ -99,7 +99,7 @@
"${board}/flash_blk.img && source ${loadaddr}\0" \
"setup=setenv setupargs " \
"console=tty1 console=${console}" \
",${baudrate}n8 ${memargs} consoleblank=0\0" \
",${baudrate}n8 ${memargs} ${mtdparts} consoleblank=0\0" \
"setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \
"setusbupdate=usb start && setenv interface usb && " \
"fatload ${interface} 0:1 ${loadaddr} " \

2
include/configs/colibri_imx7.h
View File

@ -141,7 +141,7 @@
"${board}/flash_blk.img && source ${loadaddr}\0" \
"setup=setenv setupargs " \
"console=tty1 console=${console}" \
",${baudrate}n8 ${memargs} consoleblank=0\0" \
",${baudrate}n8 ${memargs} ${mtdparts} consoleblank=0\0" \
"setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \
"setusbupdate=usb start && setenv interface usb && " \
"fatload ${interface} 0:1 ${loadaddr} " \