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mailbox: renesas: Add Renesas MFIS Multifunctional Interface mailbox driver

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Add support for the Renesas MFIS mailbox, which provides an interface
between the different CPU Cores, such as AP System Core domain and the
Realtime Core domain, SCP Core domain and AP System Core domain or
Realtime Core domain and AP System Core domain or Realtime Core domain.

Signed-off-by: Tuyen Dang <tuyen.dang.xa@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Update the driver
[Marek: Rename the driver to renesas-mfis, simplify the driver.
        Always use only one TX channel and no RX channel, drop all
	unnecessary code. Perform 1ms delay in send callback which
	is perfectly fine to do in U-Boot which does RX polling]
This commit is contained in:
Tuyen Dang 2025-10-27 17:39:17 +01:00 committed by Marek Vasut
parent af96395a82
commit 5353fc464f
3 changed files with 70 additions and 0 deletions
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10
drivers/mailbox/Kconfig
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@ -66,6 +66,16 @@ config K3_SEC_PROXY
Select this driver if your platform has support for this hardware
block.
config RCAR_MFIS_MBOX
bool "Renesas MFIS Multifunctional Interface mailbox driver"
depends on DM_MAILBOX && ARCH_RENESAS
help
This enables support for the Renesas MFIS mailbox module, which
provides an interface between the different CPU Cores, such as AP
System Core domain and the Realtime Core domain, SCP Core domain
and AP System Core domain or Realtime Core domain and AP System
Core domain or Realtime Core domain.
config ZYNQMP_IPI
bool "Xilinx ZynqMP IPI controller support"
depends on DM_MAILBOX && (ARCH_ZYNQMP || ARCH_VERSAL || ARCH_VERSAL_NET || ARCH_VERSAL2)

1
drivers/mailbox/Makefile
View File

@ -12,4 +12,5 @@ obj-$(CONFIG_SANDBOX_MBOX) += sandbox-mbox-test.o
obj-$(CONFIG_STM32_IPCC) += stm32-ipcc.o
obj-$(CONFIG_TEGRA_HSP) += tegra-hsp.o
obj-$(CONFIG_K3_SEC_PROXY) += k3-sec-proxy.o
obj-$(CONFIG_RCAR_MFIS_MBOX) += renesas-mfis.o
obj-$(CONFIG_ZYNQMP_IPI) += zynqmp-ipi.o

59
drivers/mailbox/renesas-mfis.c Normal file
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@ -0,0 +1,59 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2020-2025, Renesas Electronics Corporation.
*/
#include <asm/io.h>
#include <dm.h>
#include <linux/delay.h>
#include <mailbox-uclass.h>
#define COM 0x0
#define IIR BIT(0)
struct mfis_priv {
void __iomem *tx_base;
};
static int mfis_send(struct mbox_chan *chan, const void *data)
{
struct mfis_priv *mfis = dev_get_priv(chan->dev);
writel(IIR, mfis->tx_base + COM);
/* Give the remote side some time. */
mdelay(1);
writel(0, mfis->tx_base + COM);
return 0;
}
struct mbox_ops mfis_mbox_ops = {
.send = mfis_send,
};
static int mfis_mbox_probe(struct udevice *dev)
{
struct mfis_priv *mbox = dev_get_priv(dev);
mbox->tx_base = dev_read_addr_index_ptr(dev, 0);
if (!mbox->tx_base)
return -ENODEV;
return 0;
}
static const struct udevice_id mfis_mbox_of_match[] = {
{ .compatible = "renesas,mfis-mbox", },
{},
};
U_BOOT_DRIVER(renesas_mfis) = {
.name = "renesas-mfis",
.id = UCLASS_MAILBOX,
.of_match = mfis_mbox_of_match,
.probe = mfis_mbox_probe,
.priv_auto = sizeof(struct mfis_priv),
.ops = &mfis_mbox_ops,
};