mirrors/u-boot
1
0
Fork 0
mirror of https://source.denx.de/u-boot/u-boot.git synced 2025-11-04 10:21:25 +01:00
Code Issues Actions Packages Projects Releases Wiki Activity

Merge https://source.denx.de/u-boot/custodians/u-boot-x86

Browse Source 
- x86: Bug fixes of previous BayTrail platform CONFIG_TEXT_BASE changes
This commit is contained in:
Tom Rini 2023-03-27 11:05:40 -04:00
commit 523dc2b28f
15 changed files with 27 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/x86/dts/bayleybay.dts
View File

@ -182,7 +182,7 @@
memory-map = <0xff800000 0x00800000>; memory-map = <0xff800000 0x00800000>;
rw-mrc-cache { rw-mrc-cache {
label = "rw-mrc-cache"; label = "rw-mrc-cache";
reg = <0x006e0000 0x00010000>; reg = <0x005e0000 0x00010000>;
}; };
}; };
}; };

2
arch/x86/dts/baytrail_som-db5800-som-6867.dts
View File

@ -206,7 +206,7 @@
memory-map = <0xff800000 0x00800000>; memory-map = <0xff800000 0x00800000>;
rw-mrc-cache { rw-mrc-cache {
label = "rw-mrc-cache"; label = "rw-mrc-cache";
reg = <0x006f0000 0x00010000>; reg = <0x005f0000 0x00010000>;
}; };
}; };
}; };

2
arch/x86/dts/conga-qeval20-qa3-e3845.dts
View File

@ -193,7 +193,7 @@
memory-map = <0xff800000 0x00800000>; memory-map = <0xff800000 0x00800000>;
rw-mrc-cache { rw-mrc-cache {
label = "rw-mrc-cache"; label = "rw-mrc-cache";
reg = <0x006f0000 0x00010000>; reg = <0x005f0000 0x00010000>;
}; };
}; };
}; };

2
arch/x86/dts/dfi-bt700.dtsi
View File

@ -204,7 +204,7 @@
memory-map = <0xff800000 0x00800000>; memory-map = <0xff800000 0x00800000>;
rw-mrc-cache { rw-mrc-cache {
label = "rw-mrc-cache"; label = "rw-mrc-cache";
reg = <0x006f0000 0x00010000>; reg = <0x005f0000 0x00010000>;
}; };
}; };
}; };

2
arch/x86/dts/minnowmax.dts
View File

@ -206,7 +206,7 @@
memory-map = <0xff800000 0x00800000>; memory-map = <0xff800000 0x00800000>;
rw-mrc-cache { rw-mrc-cache {
label = "rw-mrc-cache"; label = "rw-mrc-cache";
reg = <0x006f0000 0x00010000>; reg = <0x005f0000 0x00010000>;
}; };
}; };
}; };

1
configs/bayleybay_defconfig
View File

@ -14,6 +14,7 @@ CONFIG_VGA_BIOS_ADDR=0xfffb0000
CONFIG_GENERATE_PIRQ_TABLE=y CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_MP_TABLE=y
CONFIG_SEABIOS=y CONFIG_SEABIOS=y
CONFIG_SYS_MONITOR_LEN=2097152
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y CONFIG_BOOTSTAGE_REPORT=y

1
configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
View File

@ -18,6 +18,7 @@ CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_MP_TABLE=y
CONFIG_HAVE_ACPI_RESUME=y CONFIG_HAVE_ACPI_RESUME=y
CONFIG_SEABIOS=y CONFIG_SEABIOS=y
CONFIG_SYS_MONITOR_LEN=2097152
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE=y

1
configs/conga-qeval20-qa3-e3845_defconfig
View File

@ -14,6 +14,7 @@ CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_MP_TABLE=y
CONFIG_HAVE_ACPI_RESUME=y CONFIG_HAVE_ACPI_RESUME=y
CONFIG_SEABIOS=y CONFIG_SEABIOS=y
CONFIG_SYS_MONITOR_LEN=2097152
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE=y

1
configs/dfi-bt700-q7x-151_defconfig
View File

@ -13,6 +13,7 @@ CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_MP_TABLE=y
CONFIG_HAVE_ACPI_RESUME=y CONFIG_HAVE_ACPI_RESUME=y
CONFIG_SEABIOS=y CONFIG_SEABIOS=y
CONFIG_SYS_MONITOR_LEN=2097152
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE=y

1
configs/minnowmax_defconfig
View File

@ -18,6 +18,7 @@ CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_MP_TABLE=y
CONFIG_HAVE_ACPI_RESUME=y CONFIG_HAVE_ACPI_RESUME=y
CONFIG_SEABIOS=y CONFIG_SEABIOS=y
CONFIG_SYS_MONITOR_LEN=2097152
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE=y

1
configs/som-db5800-som-6867_defconfig
View File

@ -15,6 +15,7 @@ CONFIG_HAVE_VGA_BIOS=y
CONFIG_GENERATE_PIRQ_TABLE=y CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_MP_TABLE=y
CONFIG_SEABIOS=y CONFIG_SEABIOS=y
CONFIG_SYS_MONITOR_LEN=2097152
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE=y

1
configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig
View File

@ -17,6 +17,7 @@ CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_MP_TABLE=y
CONFIG_HAVE_ACPI_RESUME=y CONFIG_HAVE_ACPI_RESUME=y
CONFIG_SEABIOS=y CONFIG_SEABIOS=y
CONFIG_SYS_MONITOR_LEN=2097152
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE=y

1
configs/theadorable-x86-conga-qa3-e3845_defconfig
View File

@ -16,6 +16,7 @@ CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_MP_TABLE=y
CONFIG_HAVE_ACPI_RESUME=y CONFIG_HAVE_ACPI_RESUME=y
CONFIG_SEABIOS=y CONFIG_SEABIOS=y
CONFIG_SYS_MONITOR_LEN=2097152
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE=y

1
configs/theadorable-x86-dfi-bt700_defconfig
View File

@ -15,6 +15,7 @@ CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_MP_TABLE=y
CONFIG_HAVE_ACPI_RESUME=y CONFIG_HAVE_ACPI_RESUME=y
CONFIG_SEABIOS=y CONFIG_SEABIOS=y
CONFIG_SYS_MONITOR_LEN=2097152
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y CONFIG_FIT_SIGNATURE=y
CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE=y

15
doc/board/intel/minnowmax.rst
View File

@ -54,9 +54,9 @@ Offset Description Controlling config
000000 descriptor.bin Hard-coded to 0 in ifdtool 000000 descriptor.bin Hard-coded to 0 in ifdtool
001000 me.bin Set by the descriptor 001000 me.bin Set by the descriptor
500000 <spare> 500000 <spare>
5f0000 MRC cache CONFIG_ENABLE_MRC_CACHE
600000 u-boot-dtb.bin CONFIG_TEXT_BASE
6ef000 Environment CONFIG_ENV_OFFSET 6ef000 Environment CONFIG_ENV_OFFSET
6f0000 MRC cache CONFIG_ENABLE_MRC_CACHE
700000 u-boot-dtb.bin CONFIG_TEXT_BASE
7b0000 vga.bin CONFIG_VGA_BIOS_ADDR 7b0000 vga.bin CONFIG_VGA_BIOS_ADDR
7c0000 fsp.bin CONFIG_FSP_ADDR 7c0000 fsp.bin CONFIG_FSP_ADDR
7f8000 <spare> (depends on size of fsp.bin) 7f8000 <spare> (depends on size of fsp.bin)
@ -68,3 +68,14 @@ Overall ROM image size is controlled by CONFIG_ROM_SIZE.
Note that the debug version of the FSP is bigger in size. If this version Note that the debug version of the FSP is bigger in size. If this version
is used, CONFIG_FSP_ADDR needs to be configured to 0xfffb0000 instead of is used, CONFIG_FSP_ADDR needs to be configured to 0xfffb0000 instead of
the default value 0xfffc0000. the default value 0xfffc0000.
If you want to change CONFIG_TEXT_BASE from the current value of ffe00000
you need to check a few other things. CONFIG_SYS_MONITOR_BASE should
automatically update to be the same as CONFIG_TEXT_BASE but
CONFIG_SYS_MONITOR_LEN may need to be adjusted too. It must cover the space
from the start of U-Boot to the end of the RAM, since the 16-bit boot needs to
be able to jump to U-Boot. See the end of arch/x86/lib/fsp1/fsp_car.S which
has these values.
Also check the MRC cache address in the devicetree ("rw-mrc-cache"). It must
not overlap with U-Boot.