From 91729f824b877f642e7d7aa09cbe938f4d9cc893 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 31 May 2025 00:03:39 +0200 Subject: [PATCH 01/13] arm64: renesas: Introduce renesas_dram_init_banksize() Introduce weak renesas_dram_init_banksize() function which is meant to be used to adjust DRAM bank sizes after the common Renesas board DRAM bank handling code finished. This is mainly meant for boards which ship with multiple DRAM size options, which can be detected at runtime. This allows such boards to ship with single U-Boot binary on all boards. Signed-off-by: Marek Vasut --- board/renesas/common/rcar64-common.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/board/renesas/common/rcar64-common.c b/board/renesas/common/rcar64-common.c index 69229ea3cb0..bcb03792494 100644 --- a/board/renesas/common/rcar64-common.c +++ b/board/renesas/common/rcar64-common.c @@ -36,6 +36,8 @@ int dram_init(void) return ret; } +__weak void renesas_dram_init_banksize(void) { } + int dram_init_banksize(void) { int bank; @@ -58,6 +60,8 @@ int dram_init_banksize(void) break; } + renesas_dram_init_banksize(); + return 0; } From 55c4a6db549cdad3f185e33f439d130cec7a6bc8 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 31 May 2025 00:03:40 +0200 Subject: [PATCH 02/13] arm64: dts: renesas: r8a779g3: Add Retronix R-Car V4H Sparrow Hawk board support Add Retronix R-Car V4H Sparrow Hawk board based on Renesas R-Car V4H ES3.0 (R8A779G3) SoC. This is a single-board computer with single gigabit ethernet, DSI-to-eDP bridge, DSI and two CSI2 interfaces, audio codec, two CANFD ports, micro SD card slot, USB PD supply, USB 3.0 ports, M.2 Key-M slot for NVMe SSD, debug UART and JTAG. DT is imported from Linux next commit: a719915e76f2 ("arm64: dts: renesas: r8a779g3: Add Retronix R-Car V4H Sparrow Hawk board support") Signed-off-by: Marek Vasut --- .../arm/dts/r8a779g3-sparrow-hawk-u-boot.dtsi | 50 ++ arch/arm/mach-renesas/Kconfig.rcar4 | 7 + board/renesas/sparrowhawk/Kconfig | 15 + board/renesas/sparrowhawk/MAINTAINERS | 7 + board/renesas/sparrowhawk/Makefile | 9 + board/renesas/sparrowhawk/sparrowhawk.c | 143 ++++ configs/r8a779g3_sparrowhawk_defconfig | 69 ++ doc/board/renesas/renesas.rst | 6 + .../arm64/renesas/r8a779g3-sparrow-hawk.dts | 666 ++++++++++++++++++ include/configs/sparrowhawk.h | 14 + 10 files changed, 986 insertions(+) create mode 100644 arch/arm/dts/r8a779g3-sparrow-hawk-u-boot.dtsi create mode 100644 board/renesas/sparrowhawk/Kconfig create mode 100644 board/renesas/sparrowhawk/MAINTAINERS create mode 100644 board/renesas/sparrowhawk/Makefile create mode 100644 board/renesas/sparrowhawk/sparrowhawk.c create mode 100644 configs/r8a779g3_sparrowhawk_defconfig create mode 100644 dts/upstream/src/arm64/renesas/r8a779g3-sparrow-hawk.dts create mode 100644 include/configs/sparrowhawk.h diff --git a/arch/arm/dts/r8a779g3-sparrow-hawk-u-boot.dtsi b/arch/arm/dts/r8a779g3-sparrow-hawk-u-boot.dtsi new file mode 100644 index 00000000000..c9f302799f1 --- /dev/null +++ b/arch/arm/dts/r8a779g3-sparrow-hawk-u-boot.dtsi @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source extras for U-Boot for the R-Car V4H Sparrow Hawk board + * + * Copyright (C) 2025 Marek Vasut + */ + +#include "r8a779g0-u-boot.dtsi" + +/* Page 31 / FAN */ +&gpio1 { + pwm-fan-hog { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "PWM-FAN"; + }; +}; + +/* Page 29 / CSI_IF_CN / CAM_CN0 */ +&i2c1 { + status = "okay"; +}; + +/* Page 29 / CSI_IF_CN / CAM_CN1 */ +&i2c2 { + status = "okay"; +}; + +/* Page 31 / IO_CN */ +&i2c3 { + status = "okay"; +}; + +/* Page 31 / IO_CN */ +&i2c4 { + status = "okay"; +}; + +/* Page 18 / POWER_CORE and Page 19 / POWER_PMIC */ +&i2c5 { + status = "okay"; +}; + +&rpc { + flash@0 { + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; +}; diff --git a/arch/arm/mach-renesas/Kconfig.rcar4 b/arch/arm/mach-renesas/Kconfig.rcar4 index c42bb9765ef..04418f7aa05 100644 --- a/arch/arm/mach-renesas/Kconfig.rcar4 +++ b/arch/arm/mach-renesas/Kconfig.rcar4 @@ -66,6 +66,12 @@ config TARGET_WHITEHAWK help Support for Renesas R-Car Gen4 White Hawk platform +config TARGET_SPARROWHAWK + bool "Sparrow Hawk board" + imply R8A779G0 + help + Support for Renesas R-Car Gen4 Sparrow Hawk platform + config TARGET_GRAYHAWK bool "Gray Hawk board" imply R8A779H0 @@ -78,6 +84,7 @@ source "board/renesas/falcon/Kconfig" source "board/renesas/spider/Kconfig" source "board/renesas/s4sk/Kconfig" source "board/renesas/whitehawk/Kconfig" +source "board/renesas/sparrowhawk/Kconfig" source "board/renesas/grayhawk/Kconfig" endif diff --git a/board/renesas/sparrowhawk/Kconfig b/board/renesas/sparrowhawk/Kconfig new file mode 100644 index 00000000000..6b7aba348df --- /dev/null +++ b/board/renesas/sparrowhawk/Kconfig @@ -0,0 +1,15 @@ +if TARGET_SPARROWHAWK + +config SYS_SOC + default "renesas" + +config SYS_BOARD + default "sparrowhawk" + +config SYS_VENDOR + default "renesas" + +config SYS_CONFIG_NAME + default "sparrowhawk" + +endif diff --git a/board/renesas/sparrowhawk/MAINTAINERS b/board/renesas/sparrowhawk/MAINTAINERS new file mode 100644 index 00000000000..9f759aefab8 --- /dev/null +++ b/board/renesas/sparrowhawk/MAINTAINERS @@ -0,0 +1,7 @@ +SPARROWHAWK BOARD +M: Marek Vasut +S: Maintained +F: arch/arm/dts/r8a779g3* +F: board/renesas/sparrowhawk/ +F: configs/r8a779g3_sparrowhawk_defconfig +F: include/configs/sparrowhawk.h diff --git a/board/renesas/sparrowhawk/Makefile b/board/renesas/sparrowhawk/Makefile new file mode 100644 index 00000000000..90da9e02537 --- /dev/null +++ b/board/renesas/sparrowhawk/Makefile @@ -0,0 +1,9 @@ +# +# board/renesas/sparrowhawk/Makefile +# +# Copyright (C) 2025 Marek Vasut +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += sparrowhawk.o diff --git a/board/renesas/sparrowhawk/sparrowhawk.c b/board/renesas/sparrowhawk/sparrowhawk.c new file mode 100644 index 00000000000..8e72b5424d1 --- /dev/null +++ b/board/renesas/sparrowhawk/sparrowhawk.c @@ -0,0 +1,143 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2025 Marek Vasut + */ + +#include +#include +#include +#include + +#if defined(CONFIG_XPL_BUILD) + +static const struct renesas_dbsc5_board_config +renesas_v4h_sparrowhawk_8g_6400_dbsc5_board_config = { + /* RENESAS V4H Sparrow Hawk (64Gbit 1rank) */ + .bdcfg_phyvalid = 0xF, + .bdcfg_vref_r = 0x0, + .bdcfg_vref_w = 0x0, + .bdcfg_vref_ca = 0x0, + .bdcfg_rfm_chk = true, + .ch = { + [0] = { + .bdcfg_ddr_density = { 0x06, 0xFF }, + .bdcfg_ca_swap = 0x04506132, + .bdcfg_dqs_swap = 0x01, + .bdcfg_dq_swap = { 0x26157084, 0x12306854 }, + .bdcfg_dm_swap = { 0x03, 0x07 }, + .bdcfg_cs_swap = 0x10 + }, + [1] = { + .bdcfg_ddr_density = { 0x06, 0xFF }, + .bdcfg_ca_swap = 0x02431065, + .bdcfg_dqs_swap = 0x10, + .bdcfg_dq_swap = { 0x56782314, 0x70423856 }, + .bdcfg_dm_swap = { 0x00, 0x01 }, + .bdcfg_cs_swap = 0x10 + }, + [2] = { + .bdcfg_ddr_density = { 0x06, 0xFF }, + .bdcfg_ca_swap = 0x02150643, + .bdcfg_dqs_swap = 0x10, + .bdcfg_dq_swap = { 0x58264031, 0x40587236 }, + .bdcfg_dm_swap = { 0x07, 0x01 }, + .bdcfg_cs_swap = 0x10 + }, + [3] = { + .bdcfg_ddr_density = { 0x06, 0xFF }, + .bdcfg_ca_swap = 0x01546230, + .bdcfg_dqs_swap = 0x01, + .bdcfg_dq_swap = { 0x45761328, 0x68023745 }, + .bdcfg_dm_swap = { 0x00, 0x01 }, + .bdcfg_cs_swap = 0x10 + } + } +}; + +static const struct renesas_dbsc5_board_config +renesas_v4h_sparrowhawk_16g_5500_dbsc5_board_config = { + /* RENESAS V4H Sparrow Hawk (64Gbit 2rank) */ + .bdcfg_phyvalid = 0xF, + .bdcfg_vref_r = 0x0, + .bdcfg_vref_w = 0x0, + .bdcfg_vref_ca = 0x0, + .bdcfg_rfm_chk = true, + .ch = { + [0] = { + .bdcfg_ddr_density = { 0x06, 0x06 }, + .bdcfg_ca_swap = 0x04506132, + .bdcfg_dqs_swap = 0x01, + .bdcfg_dq_swap = { 0x26157084, 0x12306854 }, + .bdcfg_dm_swap = { 0x03, 0x07 }, + .bdcfg_cs_swap = 0x10 + }, + [1] = { + .bdcfg_ddr_density = { 0x06, 0x06 }, + .bdcfg_ca_swap = 0x02431065, + .bdcfg_dqs_swap = 0x10, + .bdcfg_dq_swap = { 0x56782314, 0x70423856 }, + .bdcfg_dm_swap = { 0x00, 0x01 }, + .bdcfg_cs_swap = 0x10 + }, + [2] = { + .bdcfg_ddr_density = { 0x06, 0x06 }, + .bdcfg_ca_swap = 0x02150643, + .bdcfg_dqs_swap = 0x10, + .bdcfg_dq_swap = { 0x58264031, 0x40587236 }, + .bdcfg_dm_swap = { 0x07, 0x01 }, + .bdcfg_cs_swap = 0x10 + }, + [3] = { + .bdcfg_ddr_density = { 0x06, 0x06 }, + .bdcfg_ca_swap = 0x01546230, + .bdcfg_dqs_swap = 0x01, + .bdcfg_dq_swap = { 0x45761328, 0x68023745 }, + .bdcfg_dm_swap = { 0x00, 0x01 }, + .bdcfg_cs_swap = 0x10 + } + } +}; + +const struct renesas_dbsc5_board_config * +dbsc5_get_board_data(struct udevice *dev, const u32 modemr0) +{ + /* + * MD[19] is used to discern between 5500 Mbps and 6400 Mbps operation. + * + * Boards with 1 rank of DRAM can operate at 6400 Mbps, those are the + * Sparrow Hawk boards with 8 GiB of DRAM. Boards with 2 ranks of DRAM + * are limited to 5500 Mbps operation, those are the boards with 16 GiB + * of DRAM. + * + * Use MD[19] setting to discern 8 GiB and 16 GiB DRAM Sparrow Hawk + * board variants from each other automatically. + */ + if (modemr0 & BIT(19)) + return &renesas_v4h_sparrowhawk_16g_5500_dbsc5_board_config; + else + return &renesas_v4h_sparrowhawk_8g_6400_dbsc5_board_config; +} + +#endif + +#define RST_MODEMR0 0xe6160000 + +DECLARE_GLOBAL_DATA_PTR; + +void renesas_dram_init_banksize(void) +{ + const u32 modemr0 = readl(RST_MODEMR0); + int bank; + + /* 8 GiB device, do nothing. */ + if (!(modemr0 & BIT(19))) + return; + + /* 16 GiB device, adjust memory map. */ + for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { + if (gd->bd->bi_dram[bank].start == 0x480000000ULL) + gd->bd->bi_dram[bank].size = 0x180000000ULL; + else if (gd->bd->bi_dram[bank].start == 0x600000000ULL) + gd->bd->bi_dram[bank].size = 0x200000000ULL; + } +} diff --git a/configs/r8a779g3_sparrowhawk_defconfig b/configs/r8a779g3_sparrowhawk_defconfig new file mode 100644 index 00000000000..47fc536df81 --- /dev/null +++ b/configs/r8a779g3_sparrowhawk_defconfig @@ -0,0 +1,69 @@ +#include + +CONFIG_ARM=y +CONFIG_ARCH_RENESAS=y +CONFIG_RCAR_GEN4=y +CONFIG_ARM_SMCCC=y +CONFIG_ARMV8_PSCI=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_ENV_OFFSET=0x3f80000 +CONFIG_ENV_OFFSET_REDUND=0x3fc0000 +CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_ENV_SIZE=0x40000 +CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a779g3-sparrow-hawk" +CONFIG_TARGET_SPARROWHAWK=y +CONFIG_SYS_BOOT_GET_CMDLINE=y +CONFIG_SYS_CLK_FREQ=16666666 +CONFIG_SYS_BARGSIZE=2048 +CONFIG_SYS_CBSIZE=2048 +CONFIG_BAUDRATE=921600 +CONFIG_BINMAN=y +CONFIG_BOOTCOMMAND="tftp 0x50000000 fitImage && bootm 0x50000000" +CONFIG_DEFAULT_FDT_FILE="r8a779g3-sparrow-hawk.dtb" +CONFIG_CMD_REMOTEPROC=y +CONFIG_GPIO_HOG=y +CONFIG_REMOTEPROC_RENESAS_APMU=y +CONFIG_BITBANGMII=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_RENESAS_RAVB=y + +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xeb300000 +CONFIG_SPL_DM_SPI=y +CONFIG_SPL_TEXT_BASE=0xeb210000 +CONFIG_SPL_STACK_R_ADDR=0x44000000 +CONFIG_SPL_SYS_MALLOC_F_LEN=0x20000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y +CONFIG_SPL_FIT_PRINT=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x48000000 +# CONFIG_SPL_BOARD_INIT is not set +# CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set +# CONFIG_SPL_SEPARATE_BSS is not set +CONFIG_SPL_DM_SPI_FLASH=y +CONFIG_SPL_DM_RESET=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_SPL_DM=y +CONFIG_SPL_CLK=y +CONFIG_SPL_GPIO=y +CONFIG_SPL_GPIO_HOG=y +CONFIG_SPL_PINCTRL=y +CONFIG_SPL_PINCONF=y +CONFIG_SPL_RAM=y +# CONFIG_SPL_USE_TINY_PRINTF is not set +CONFIG_RAM=y +CONFIG_RAM_RENESAS_DBSC5=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 +CONFIG_SPL_BSS_MAX_SIZE=0x10000 +CONFIG_SF_DEFAULT_SPEED=40000000 +# CONFIG_SPL_PARTITIONS is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +# CONFIG_SPL_PARTITION_UUIDS is not set +# CONFIG_SPL_DM_MMC is not set diff --git a/doc/board/renesas/renesas.rst b/doc/board/renesas/renesas.rst index 0a38ff42eae..fedfeed42e3 100644 --- a/doc/board/renesas/renesas.rst +++ b/doc/board/renesas/renesas.rst @@ -180,6 +180,12 @@ Renesas is a SoC solutions provider for automotive and industrial applications. - arm64 - r8a779g0_whitehawk_defconfig + * - + - Sparrow Hawk + - R8A779G3 (V4H) + - arm64 + - r8a779g3_sparrowhawk_defconfig + * - RZ/G2 Family - Beacon EmbeddedWorks RZ/G2M SoM - R8A774A1 (RZ/G2M) diff --git a/dts/upstream/src/arm64/renesas/r8a779g3-sparrow-hawk.dts b/dts/upstream/src/arm64/renesas/r8a779g3-sparrow-hawk.dts new file mode 100644 index 00000000000..b109095a0d8 --- /dev/null +++ b/dts/upstream/src/arm64/renesas/r8a779g3-sparrow-hawk.dts @@ -0,0 +1,666 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Device Tree Source for the R-Car V4H ES3.0 Sparrow Hawk board + * + * Copyright (C) 2025 Marek Vasut + */ + +/dts-v1/; +#include + +#include "r8a779g3.dtsi" + +/ { + model = "Retronix Sparrow Hawk board based on r8a779g3"; + compatible = "retronix,sparrow-hawk", "renesas,r8a779g3", + "renesas,r8a779g0"; + + aliases { + ethernet0 = &avb0; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + serial0 = &hscif0; + serial1 = &hscif1; + serial2 = &hscif3; + spi0 = &rpc; + }; + + chosen { + bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; + stdout-path = "serial0:921600n8"; + }; + + /* Page 31 / FAN */ + fan: pwm-fan { + pinctrl-0 = <&irq4_pins>; + pinctrl-names = "default"; + compatible = "pwm-fan"; + #cooling-cells = <2>; + interrupts-extended = <&intc_ex 4 IRQ_TYPE_EDGE_FALLING>; + /* + * The fan model connected to this device can be selected + * by user. Set "cooling-levels" DT property to single 255 + * entry to force the fan PWM into constant HIGH, which + * forces the fan to spin at maximum RPM, thus providing + * maximum cooling to this device and protection against + * misconfigured PWM duty cycle to the fan. + * + * User has to configure "pwms" and "pulses-per-revolution" + * DT properties according to fan datasheet first, and then + * extend "cooling-levels = <0 m n ... 255>" property to + * achieve proper fan control compatible with fan model + * installed by user. + */ + cooling-levels = <255>; + pulses-per-revolution = <2>; + pwms = <&pwm0 0 50000>; + }; + + /* + * Page 15 / LPDDR5 + * + * This configuration listed below is for the 8 GiB board variant + * with MT62F1G64D8EK-023 WT:C LPDDR5 part populated on the board. + * + * A variant with 16 GiB MT62F2G64D8EK-023 WT:C part populated on + * the board is automatically handled by the bootloader, which + * adjusts the correct DRAM size into the memory nodes below. + */ + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x78000000>; + }; + + memory@480000000 { + device_type = "memory"; + reg = <0x4 0x80000000 0x0 0x80000000>; + }; + + memory@600000000 { + device_type = "memory"; + reg = <0x6 0x00000000 0x1 0x00000000>; + }; + + /* Page 27 / DSI to Display */ + mini-dp-con { + compatible = "dp-connector"; + label = "CN6"; + type = "full-size"; + + port { + mini_dp_con_in: endpoint { + remote-endpoint = <&sn65dsi86_out>; + }; + }; + }; + + reg_1p2v: regulator-1p2v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + /* Page 27 / DSI to Display */ + sn65dsi86_refclk: clk-x9 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <38400000>; + }; + + /* Page 17 uSD-Slot */ + vcc_sdhi: regulator-vcc-sdhi { + compatible = "regulator-gpio"; + regulator-name = "SDHI VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + gpios = <&gpio8 13 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 0>, <1800000 1>; + }; +}; + +/* Page 22 / Ether_AVB0 */ +&avb0 { + pinctrl-0 = <&avb0_pins>; + pinctrl-names = "default"; + phy-handle = <&avb0_phy>; + tx-internal-delay-ps = <2000>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + avb0_phy: ethernet-phy@0 { /* KSZ9031RNXVB */ + compatible = "ethernet-phy-id0022.1622", + "ethernet-phy-ieee802.3-c22"; + rxc-skew-ps = <1500>; + reg = <0>; + /* AVB0_PHY_INT_V */ + interrupts-extended = <&gpio7 5 IRQ_TYPE_LEVEL_LOW>; + /* GP7_10/AVB0_RESETN_V */ + reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; + reset-deassert-us = <300>; + }; + }; +}; + +/* Page 28 / CANFD_IF */ +&can_clk { + clock-frequency = <40000000>; +}; + +/* Page 28 / CANFD_IF */ +&canfd { + pinctrl-0 = <&canfd3_pins>, <&canfd4_pins>, <&can_clk_pins>; + pinctrl-names = "default"; + + status = "okay"; + + channel3 { + status = "okay"; + }; + + channel4 { + status = "okay"; + }; +}; + +/* Page 27 / DSI to Display */ +&dsi1 { + status = "okay"; + + ports { + port@1 { + dsi1_out: endpoint { + remote-endpoint = <&sn65dsi86_in>; + data-lanes = <1 2 3 4>; + }; + }; + }; +}; + +/* Page 27 / DSI to Display */ +&du { + status = "okay"; +}; + +/* Page 5 / R-Car V4H_INT_I2C */ +&extal_clk { /* X3 */ + clock-frequency = <16666666>; +}; + +/* Page 5 / R-Car V4H_INT_I2C */ +&extalr_clk { /* X2 */ + clock-frequency = <32768>; +}; + +/* Page 26 / 2230 Key M M.2 */ +&gpio4 { + /* 9FGV0441 nOE inputs 0 and 1 */ + pcie-m2-oe-hog { + gpio-hog; + gpios = <21 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "PCIe-CLK-nOE-M2"; + }; + + /* 9FGV0441 nOE inputs 2 and 3 */ + pcie-usb-oe-hog { + gpio-hog; + gpios = <22 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "PCIe-CLK-nOE-USB"; + }; +}; + +/* Page 23 / DEBUG */ +&hscif0 { /* FTDI ADBUS[3:0] */ + pinctrl-0 = <&hscif0_pins>; + pinctrl-names = "default"; + uart-has-rtscts; + bootph-all; + + status = "okay"; +}; + +/* Page 23 / DEBUG */ +&hscif1 { /* FTDI BDBUS[3:0] */ + pinctrl-0 = <&hscif1_pins>; + pinctrl-names = "default"; + uart-has-rtscts; + + status = "okay"; +}; + +/* Page 24 / UART */ +&hscif3 { /* CN7 pins 8 (TX) and 10 (RX) */ + pinctrl-0 = <&hscif3_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +/* Page 24 / I2C SWITCH */ +&i2c0 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + clock-frequency = <400000>; + status = "okay"; + + mux@71 { + compatible = "nxp,pca9544"; /* TCA9544 */ + reg = <0x71>; + #address-cells = <1>; + #size-cells = <0>; + vdd-supply = <®_3p3v>; + + i2c0_mux0: i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + /* Page 27 / DSI to Display */ + bridge@2c { + pinctrl-0 = <&irq0_pins>; + pinctrl-names = "default"; + + compatible = "ti,sn65dsi86"; + reg = <0x2c>; + + clocks = <&sn65dsi86_refclk>; + clock-names = "refclk"; + + interrupts-extended = <&intc_ex 0 IRQ_TYPE_LEVEL_HIGH>; + + enable-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; + + vccio-supply = <®_1p8v>; + vpll-supply = <®_1p8v>; + vcca-supply = <®_1p2v>; + vcc-supply = <®_1p2v>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + sn65dsi86_in: endpoint { + remote-endpoint = <&dsi1_out>; + }; + }; + + port@1 { + reg = <1>; + sn65dsi86_out: endpoint { + remote-endpoint = <&mini_dp_con_in>; + }; + }; + }; + }; + }; + + i2c0_mux1: i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c0_mux2: i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c0_mux3: i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +/* Page 29 / CSI_IF_CN / CAM_CN0 */ +&i2c1 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&i2c1_pins>; + pinctrl-names = "default"; +}; + +/* Page 29 / CSI_IF_CN / CAM_CN1 */ +&i2c2 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&i2c2_pins>; + pinctrl-names = "default"; +}; + +/* Page 31 / IO_CN */ +&i2c3 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&i2c3_pins>; + pinctrl-names = "default"; +}; + +/* Page 31 / IO_CN */ +&i2c4 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&i2c4_pins>; + pinctrl-names = "default"; +}; + +/* Page 18 / POWER_CORE and Page 19 / POWER_PMIC */ +&i2c5 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&i2c5_pins>; + pinctrl-names = "default"; +}; + +/* Page 17 uSD-Slot */ +&mmc0 { + pinctrl-0 = <&sd_pins>; + pinctrl-1 = <&sd_uhs_pins>; + pinctrl-names = "default", "state_uhs"; + bus-width = <4>; + cd-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>; /* SD_CD */ + sd-uhs-sdr50; + sd-uhs-sdr104; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <&vcc_sdhi>; + status = "okay"; +}; + +/* Page 26 / 2230 Key M M.2 */ +&pcie0_clkref { + clock-frequency = <100000000>; +}; + +&pciec0 { + reset-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +/* Page 25 / PCIe to USB */ +&pcie1_clkref { + clock-frequency = <100000000>; +}; + +&pciec1 { + /* uPD720201 is PCIe Gen2 x1 device */ + num-lanes = <1>; + reset-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + + /* Page 22 / Ether_AVB0 */ + avb0_pins: avb0 { + mux { + groups = "avb0_link", "avb0_mdio", "avb0_rgmii", + "avb0_txcrefclk"; + function = "avb0"; + }; + + pins-mdio { + groups = "avb0_mdio"; + drive-strength = <21>; + }; + + pins-mii { + groups = "avb0_rgmii"; + drive-strength = <21>; + }; + + }; + + /* Page 28 / CANFD_IF */ + can_clk_pins: can-clk { + groups = "can_clk"; + function = "can_clk"; + }; + + /* Page 28 / CANFD_IF */ + canfd3_pins: canfd3 { + groups = "canfd3_data"; + function = "canfd3"; + }; + + /* Page 28 / CANFD_IF */ + canfd4_pins: canfd4 { + groups = "canfd4_data"; + function = "canfd4"; + }; + + /* Page 23 / DEBUG */ + hscif0_pins: hscif0 { + groups = "hscif0_data", "hscif0_ctrl"; + function = "hscif0"; + }; + + /* Page 23 / DEBUG */ + hscif1_pins: hscif1 { + groups = "hscif1_data_a", "hscif1_ctrl_a"; + function = "hscif1"; + }; + + /* Page 24 / UART */ + hscif3_pins: hscif3 { + groups = "hscif3_data_a"; + function = "hscif3"; + }; + + /* Page 24 / I2C SWITCH */ + i2c0_pins: i2c0 { + groups = "i2c0"; + function = "i2c0"; + }; + + /* Page 29 / CSI_IF_CN / CAM_CN0 */ + i2c1_pins: i2c1 { + groups = "i2c1"; + function = "i2c1"; + }; + + /* Page 29 / CSI_IF_CN / CAM_CN1 */ + i2c2_pins: i2c2 { + groups = "i2c2"; + function = "i2c2"; + }; + + /* Page 31 / IO_CN */ + i2c3_pins: i2c3 { + groups = "i2c3"; + function = "i2c3"; + }; + + /* Page 31 / IO_CN */ + i2c4_pins: i2c4 { + groups = "i2c4"; + function = "i2c4"; + }; + + /* Page 18 / POWER_CORE */ + i2c5_pins: i2c5 { + groups = "i2c5"; + function = "i2c5"; + }; + + /* Page 27 / DSI to Display */ + irq0_pins: irq0 { + groups = "intc_ex_irq0_a"; + function = "intc_ex"; + }; + + /* Page 31 / FAN */ + irq4_pins: irq4 { + groups = "intc_ex_irq4_b"; + function = "intc_ex"; + }; + + /* Page 31 / FAN */ + pwm0_pins: pwm0 { + groups = "pwm0"; + function = "pwm0"; + }; + + /* Page 31 / CN7 pin 12 */ + pwm1_pins: pwm1 { + groups = "pwm1_b"; + function = "pwm1"; + }; + + /* Page 31 / CN7 pin 32 */ + pwm6_pins: pwm6 { + groups = "pwm6"; + function = "pwm6"; + }; + + /* Page 31 / CN7 pin 33 */ + pwm7_pins: pwm7 { + groups = "pwm7"; + function = "pwm7"; + }; + + /* Page 16 / QSPI_FLASH */ + qspi0_pins: qspi0 { + groups = "qspi0_ctrl", "qspi0_data4"; + function = "qspi0"; + bootph-all; + }; + + /* Page 6 / SCIF_CLK_SOC_V */ + scif_clk_pins: scif-clk { + groups = "scif_clk"; + function = "scif_clk"; + }; + + /* Page 17 uSD-Slot */ + sd_pins: sd { + groups = "mmc_data4", "mmc_ctrl"; + function = "mmc"; + power-source = <3300>; + }; + + /* Page 17 uSD-Slot */ + sd_uhs_pins: sd-uhs { + groups = "mmc_data4", "mmc_ctrl"; + function = "mmc"; + power-source = <1800>; + }; +}; + +/* Page 31 / FAN */ +&pwm0 { + pinctrl-0 = <&pwm0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +/* Page 31 / CN7 pin 12 */ +&pwm1 { + pinctrl-0 = <&pwm1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +/* Page 31 / CN7 pin 32 */ +&pwm6 { + pinctrl-0 = <&pwm6_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +/* Page 31 / CN7 pin 33 */ +&pwm7 { + pinctrl-0 = <&pwm7_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +/* Page 16 / QSPI_FLASH */ +&rpc { + pinctrl-0 = <&qspi0_pins>; + pinctrl-names = "default"; + bootph-all; + + status = "okay"; + + flash@0 { + compatible = "spansion,s25fs512s", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + bootph-all; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot@0 { + reg = <0x0 0x1000000>; + read-only; + }; + + user@1000000 { + reg = <0x1000000 0x2f80000>; + }; + + env1@3f80000 { + reg = <0x3f80000 0x40000>; + }; + + env2@3fc0000 { + reg = <0x3fc0000 0x40000>; + }; + }; + }; +}; + +&rwdt { + timeout-sec = <60>; + status = "okay"; +}; + +/* Page 6 / SCIF_CLK_SOC_V */ +&scif_clk { /* X12 */ + clock-frequency = <24000000>; +}; diff --git a/include/configs/sparrowhawk.h b/include/configs/sparrowhawk.h new file mode 100644 index 00000000000..0524e39229c --- /dev/null +++ b/include/configs/sparrowhawk.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * include/configs/sparrowhawk.h + * This file is Sparrow Hawk board configuration. + * + * Copyright (C) 2025 Marek Vasut + */ + +#ifndef __SPARROWHAWK_H +#define __SPARROWHAWK_H + +#include "rcar-gen4-common.h" + +#endif /* __SPARROWHAWK_H */ From b62e422d6e6878e9bca1d20fe372ffdd7db294fa Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 11 Jun 2025 08:23:52 -0600 Subject: [PATCH 03/13] mmc: Kconfig: Really correct dependencies SDHCI ADMA options When doing the investigation for commit 53bb8fdea12a ("mmc: Kconfig: Correct dependencies SDHCI ADMA options") I missed the implications of MMC_SDHCI_ADMA_HELPERS. The problem is that FSL_ESDHC via the FSL_ESDHC_SUPPORT_ADMA2 option will also enable these helper functions. This in turn means the correct dependency here is MMC_SDHCI_ADMA_HELPERS and not *MMC_SDHCI_ADMA. Reported-by: Heiko Thiery Signed-off-by: Tom Rini --- drivers/mmc/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 38867f30a7e..1c9b6898bff 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -528,7 +528,7 @@ config SPL_MMC_SDHCI_ADMA config MMC_SDHCI_ADMA_FORCE_32BIT bool "Force 32 bit mode for ADMA on 64 bit platforms" - depends on MMC_SDHCI_ADMA || SPL_MMC_SDHCI_ADMA + depends on MMC_SDHCI_ADMA_HELPERS help This forces SDHCI ADMA to be built for 32 bit descriptors, even on a 64 bit platform where they would otherwise be assumed to @@ -538,7 +538,7 @@ config MMC_SDHCI_ADMA_FORCE_32BIT config MMC_SDHCI_ADMA_64BIT bool "Use SHDCI ADMA with 64 bit descriptors" - depends on MMC_SDHCI_ADMA || SPL_MMC_SDHCI_ADMA + depends on MMC_SDHCI_ADMA_HELPERS depends on !MMC_SDHCI_ADMA_FORCE_32BIT default y if DMA_ADDR_T_64BIT help From 02a2cbfee83df3eddf619d01e5153c3239a3984d Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Thu, 12 Jun 2025 10:13:56 +0800 Subject: [PATCH 04/13] imx91: Drop OF_UPSTREAM i.MX91 device tree still not landed in linux kernel, so drop OF_UPSTREAM and move the device tree files to arch/arm/dts Signed-off-by: Peng Fan Reviewed-by: Sumit Garg --- .../arm/dts}/imx91-11x11-evk.dts | 0 .../freescale => arch/arm/dts}/imx91-pinfunc.h | 0 .../arm64/freescale => arch/arm/dts}/imx91.dtsi | 17 ----------------- arch/arm/mach-imx/imx9/Kconfig | 1 - configs/imx91_11x11_evk_defconfig | 2 +- configs/imx91_11x11_evk_inline_ecc_defconfig | 2 +- 6 files changed, 2 insertions(+), 20 deletions(-) rename {dts/upstream/src/arm64/freescale => arch/arm/dts}/imx91-11x11-evk.dts (100%) rename {dts/upstream/src/arm64/freescale => arch/arm/dts}/imx91-pinfunc.h (100%) rename {dts/upstream/src/arm64/freescale => arch/arm/dts}/imx91.dtsi (79%) diff --git a/dts/upstream/src/arm64/freescale/imx91-11x11-evk.dts b/arch/arm/dts/imx91-11x11-evk.dts similarity index 100% rename from dts/upstream/src/arm64/freescale/imx91-11x11-evk.dts rename to arch/arm/dts/imx91-11x11-evk.dts diff --git a/dts/upstream/src/arm64/freescale/imx91-pinfunc.h b/arch/arm/dts/imx91-pinfunc.h similarity index 100% rename from dts/upstream/src/arm64/freescale/imx91-pinfunc.h rename to arch/arm/dts/imx91-pinfunc.h diff --git a/dts/upstream/src/arm64/freescale/imx91.dtsi b/arch/arm/dts/imx91.dtsi similarity index 79% rename from dts/upstream/src/arm64/freescale/imx91.dtsi rename to arch/arm/dts/imx91.dtsi index be923e5076a..9963f0bb5ce 100644 --- a/dts/upstream/src/arm64/freescale/imx91.dtsi +++ b/arch/arm/dts/imx91.dtsi @@ -7,7 +7,6 @@ #include "imx93.dtsi" /delete-node/ &A55_1; -/delete-node/ &cm33; /delete-node/ &mlmix; /delete-node/ &mu1; /delete-node/ &mu2; @@ -41,18 +40,6 @@ assigned-clock-rates = <100000000>, <250000000>; }; -&i3c1 { - clocks = <&clk IMX93_CLK_BUS_AON>, - <&clk IMX93_CLK_I3C1_GATE>, - <&clk IMX93_CLK_DUMMY>; -}; - -&i3c2 { - clocks = <&clk IMX93_CLK_BUS_WAKEUP>, - <&clk IMX93_CLK_I3C2_GATE>, - <&clk IMX93_CLK_DUMMY>; -}; - &iomuxc { compatible = "fsl,imx91-iomuxc"; }; @@ -61,10 +48,6 @@ status = "disabled"; }; -&{/soc@0/ddr-pmu@4e300dc0} { - compatible = "fsl,imx91-ddr-pmu", "fsl,imx93-ddr-pmu"; -}; - &{/thermal-zones/cpu-thermal/cooling-maps/map0} { cooling-device = <&A55_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; diff --git a/arch/arm/mach-imx/imx9/Kconfig b/arch/arm/mach-imx/imx9/Kconfig index e6cafdcd813..280d255c086 100644 --- a/arch/arm/mach-imx/imx9/Kconfig +++ b/arch/arm/mach-imx/imx9/Kconfig @@ -43,7 +43,6 @@ config TARGET_IMX91_11X11_EVK bool "imx91_11x11_evk" select OF_BOARD_FIXUP select IMX91 - imply OF_UPSTREAM imply BOOTSTD_FULL imply BOOTSTD_BOOTCOMMAND diff --git a/configs/imx91_11x11_evk_defconfig b/configs/imx91_11x11_evk_defconfig index 810a8a8c012..a57c1fd01f5 100644 --- a/configs/imx91_11x11_evk_defconfig +++ b/configs/imx91_11x11_evk_defconfig @@ -11,7 +11,7 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x700000 CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg" CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="freescale/imx91-11x11-evk" +CONFIG_DEFAULT_DEVICE_TREE="imx91-11x11-evk" CONFIG_TARGET_IMX91_11X11_EVK=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_SYS_MONITOR_LEN=524288 diff --git a/configs/imx91_11x11_evk_inline_ecc_defconfig b/configs/imx91_11x11_evk_inline_ecc_defconfig index f330ea694f7..0533acaaa6b 100644 --- a/configs/imx91_11x11_evk_inline_ecc_defconfig +++ b/configs/imx91_11x11_evk_inline_ecc_defconfig @@ -11,7 +11,7 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x700000 CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg" CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="freescale/imx91-11x11-evk" +CONFIG_DEFAULT_DEVICE_TREE="imx91-11x11-evk" CONFIG_TARGET_IMX91_11X11_EVK=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_SYS_MONITOR_LEN=524288 From 461f357fa9fa29886c787583d42e7a8d2cd14feb Mon Sep 17 00:00:00 2001 From: Hugo Villeneuve Date: Thu, 12 Jun 2025 09:35:18 -0400 Subject: [PATCH 05/13] board: var-som-mx8mn: Fix alloc space exhausted in SPL After enabling some options to support EEPROM read in SPL (CONFIG_SPL_I2C_EEPROM), the following error appears: alloc space exhausted Increasing SYS_MALLOC_F_LEN from 8kB to 64kB fixes the problem. But instead of manually increasing the value, adopt method used in commit ce3f23404c19 ("board: bsh: imx8mn_bsh_smm_s2/s2pro: enlarge CONFIG_SPL_SYS_MALLOC_F_LEN"): Dropping CONFIG_SPL_SYS_MALLOC_F_LEN option allows it to be set to the default value of CONFIG_SYS_MALLOC_F_LEN, which is set by default to 64kB (0x10000) on i.MX8M platforms. Suggested-by: Fabio Estevam Signed-off-by: Hugo Villeneuve Reviewed-by: Fabio Estevam --- configs/imx8mn_var_som_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/imx8mn_var_som_defconfig b/configs/imx8mn_var_som_defconfig index 5a9f31b1c2a..0596e33fa04 100644 --- a/configs/imx8mn_var_som_defconfig +++ b/configs/imx8mn_var_som_defconfig @@ -17,7 +17,6 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x980000 -CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_TEXT_BASE=0x912000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x950000 From c36ab3256c806dca14ab083d64905d243d2aa751 Mon Sep 17 00:00:00 2001 From: Hiago De Franco Date: Thu, 12 Jun 2025 11:09:23 -0300 Subject: [PATCH 06/13] toradex-smarc-imx8mp: add SPL_STACK size and SPL_HAVE_INIT_STACK When the toradex-smarc-imx8mp_defconfig file was first added, SPL_STACK was set to 0x960000, but SPL_HAVE_INIT_STACK wasn't enabled. This led to SPL_STACK being correctly dropped in commit 25fefa05d732 ("configs: Resync with savedefconfig"), since SPL_HAVE_INIT_STACK was missing, which ended up making the board not boot. Fix this by adding SPL_STACK back and making sure SPL_HAVE_INIT_STACK is enabled. Fixes: dde53eae88d6 ("board: toradex: add Toradex SMARC iMX8MP") Signed-off-by: Hiago De Franco Acked-by: Francesco Dolcini --- configs/toradex-smarc-imx8mp_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/toradex-smarc-imx8mp_defconfig b/configs/toradex-smarc-imx8mp_defconfig index ca7d9b56efb..25e6d9623c1 100644 --- a/configs/toradex-smarc-imx8mp_defconfig +++ b/configs/toradex-smarc-imx8mp_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x960000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000 CONFIG_SPL_TEXT_BASE=0x920000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y @@ -51,6 +52,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_HAVE_INIT_STACK=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x42200000 From ef82e45c2ef5278493576708d6aafd686ba77af9 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 29 May 2025 08:14:51 -0600 Subject: [PATCH 07/13] test/py: Use the correct fixture name in exception handler If a BootFail exception is thrown in a test, it is not handled correctly. Use the correct fixture variable 'ubman_fix' to resolve this. Signed-off-by: Simon Glass Fixes: d9ed4b75add ("test/py: Drop u_boot_ prefix on test files") Reviewed-by: Mattijs Korpershoek --- test/py/conftest.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/py/conftest.py b/test/py/conftest.py index 6c3ac67979a..eec0b5488e4 100644 --- a/test/py/conftest.py +++ b/test/py/conftest.py @@ -514,7 +514,7 @@ def ubman(request): handle_exception(ubconfig, ubman_fix, log, err, 'Lab timeout', True) except BootFail as err: handle_exception(ubconfig, ubman_fix, log, err, 'Boot fail', True, - ubman.get_spawn_output()) + ubman_fix.get_spawn_output()) except Unexpected: handle_exception(ubconfig, ubman_fix, log, err, 'Unexpected test output', False) From 2ab10ed2399b0c1c790733884935c94ad65aa2a8 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 29 May 2025 08:14:52 -0600 Subject: [PATCH 08/13] test/py: Correct handling of exceptions If an Unexpected exception is thrown in a test, an undefined variable error is reported. Fix this. Signed-off-by: Simon Glass Fixes: 85d7dae377a ("test: Detect dead connections") Reviewed-by: Mattijs Korpershoek --- test/py/conftest.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/py/conftest.py b/test/py/conftest.py index eec0b5488e4..8ce680a92a0 100644 --- a/test/py/conftest.py +++ b/test/py/conftest.py @@ -515,7 +515,7 @@ def ubman(request): except BootFail as err: handle_exception(ubconfig, ubman_fix, log, err, 'Boot fail', True, ubman_fix.get_spawn_output()) - except Unexpected: + except Unexpected as err: handle_exception(ubconfig, ubman_fix, log, err, 'Unexpected test output', False) return ubman_fix From 3507e6208f3df1fc1dedb8fce1e8b71c33b3b804 Mon Sep 17 00:00:00 2001 From: Raymond Mao Date: Wed, 4 Jun 2025 08:48:11 -0700 Subject: [PATCH 09/13] sandbox: solve undefined reference to pthread_kill symbol This patch is to solve the sandbox building error: $ make O=build-sandbox -s sandbox_defconfig $ make O=build-sandbox -s -j2 /usr/bin/ld: /tmp/u-boot.27rzOu.ltrans58.ltrans.o: undefined reference to symbol 'pthread_kill@@GLIBC_2.2.5' /usr/bin/ld: /lib/x86_64-linux-gnu/libpthread.so.0: error adding symbols: DSO missing from command line collect2: error: ld returned 1 exit status [...] Fixes: b989f9ed9fe1 ("test: lib: add initjmp() test") Signed-off-by: Raymond Mao Reviewed-by: Jerome Forissier Tested-by: Patrice Chotard --- arch/sandbox/config.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/sandbox/config.mk b/arch/sandbox/config.mk index dd9b7473fa9..9a61e803a57 100644 --- a/arch/sandbox/config.mk +++ b/arch/sandbox/config.mk @@ -3,7 +3,7 @@ PLATFORM_CPPFLAGS += -D__SANDBOX__ -U_FORTIFY_SOURCE PLATFORM_CPPFLAGS += -fPIC -ffunction-sections -fdata-sections -PLATFORM_LIBS += -lrt +PLATFORM_LIBS += -lrt -lpthread SDL_CONFIG ?= sdl2-config # Define this to avoid linking with SDL, which requires SDL libraries From 0cd85170cfbe843c0927305ecabc9f772a76f58c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jan=20=C4=8Cerm=C3=A1k?= Date: Wed, 30 Apr 2025 19:15:35 +0200 Subject: [PATCH 10/13] configs: rpi: set NR_DRAM_BANKS to 8 to accommodate RAM on 16GB models MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Raspberry Pi 5 can now have up to 16 GiB of RAM where the memory spans 8 DRAM banks in total. Increase the config value to 8 to initialize the whole RAM. Without this change, kernel only sees 8 GiB of RAM on the 16 GiB CM5 as reported in [1]. [1] https://github.com/home-assistant/operating-system/issues/3989 Signed-off-by: Jan Čermák Reviewed-by: Matthias Brugger --- configs/rpi_arm64_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig index 9fe5d177943..69e8e72c5d7 100644 --- a/configs/rpi_arm64_defconfig +++ b/configs/rpi_arm64_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_POSITION_INDEPENDENT=y CONFIG_ARCH_BCM283X=y CONFIG_TARGET_RPI_ARM64=y +CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="bcm2711-rpi-4-b" CONFIG_OF_LIBFDT_OVERLAY=y From f8cb3fde935ed003ad1d7cf6a06d59586fe65cd5 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 13 Jun 2025 22:43:40 +0000 Subject: [PATCH 11/13] arm: dts: rockchip: Fix eMMC write on RK3528 Writing to eMMC on RK3528 is affected with the same or a similar issue as on RK3588, where eMMC must init to HS200 at least once to fully work. Trying to write u-boot-rockchip.bin to eMMC fails with: => mmc write $fileaddr 40 5000 MMC write: dev # 0, block # 64, count 20480 ... mmc write failed 0 blocks written: ERROR For U-Boot to enable HS200 mode the mmc-hs200-1_8v prop must be defined in the device tree. Linux does not seem to be affected and is able to detect and use HS200 without this prop. Enable use of HS200 and fix eMMC write on RK3528 by adding the missing mmc-hs200-1_8v prop for affected boards: => mmc write $fileaddr 40 5000 MMC write: dev # 0, block # 64, count 20480 ... 20480 blocks written: OK Fixes: b112a44531cb ("board: rockchip: Add minimal generic RK3528 board") Fixes: ccbddf645310 ("board: rockchip: Add Radxa E20C") Signed-off-by: Jonas Karlman --- arch/arm/dts/rk3528-generic.dts | 1 + arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/arch/arm/dts/rk3528-generic.dts b/arch/arm/dts/rk3528-generic.dts index 792d3e04a4c..3f6f0bed108 100644 --- a/arch/arm/dts/rk3528-generic.dts +++ b/arch/arm/dts/rk3528-generic.dts @@ -18,6 +18,7 @@ &sdhci { bus-width = <8>; cap-mmc-highspeed; + mmc-hs200-1_8v; no-sd; no-sdio; non-removable; diff --git a/arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi b/arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi index 9c2f03a786c..1372d8f1e38 100644 --- a/arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi +++ b/arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi @@ -2,6 +2,10 @@ #include "rk3528-u-boot.dtsi" +&sdhci { + mmc-hs200-1_8v; +}; + &sdmmc { bus-width = <4>; cap-mmc-highspeed; From aa2efc584a4d3fe0fe88cd600f53464b26bcd848 Mon Sep 17 00:00:00 2001 From: Ivan Pang Date: Wed, 11 Jun 2025 05:00:38 +0000 Subject: [PATCH 12/13] dfu: fix dev_part_str for file operations The third_arg for a dfu alt is read as an integer and is overloaded for different supported backends. For ext4 and fat, this third_arg represents the partition and forms the dev part string, which should have its partition in hex. This commit fixes dfu ext4/fat usage for devices with ten or more partitions. Signed-off-by: Ivan Pang Reviewed-by: Mattijs Korpershoek Reviewed-by: Lukasz Majewski Link: https://lore.kernel.org/r/20250611050127.38011-1-ipman@amazon.com Signed-off-by: Mattijs Korpershoek --- drivers/dfu/dfu_mmc.c | 2 +- drivers/dfu/dfu_scsi.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c index c19eb919388..a91671755e1 100644 --- a/drivers/dfu/dfu_mmc.c +++ b/drivers/dfu/dfu_mmc.c @@ -117,7 +117,7 @@ static int mmc_file_op(enum dfu_op op, struct dfu_entity *dfu, return -1; } - snprintf(dev_part_str, sizeof(dev_part_str), "%d:%d", + snprintf(dev_part_str, sizeof(dev_part_str), "%d:%x", dfu->data.mmc.dev, dfu->data.mmc.part); ret = fs_set_blk_dev("mmc", dev_part_str, fstype); diff --git a/drivers/dfu/dfu_scsi.c b/drivers/dfu/dfu_scsi.c index 9f95194784c..7ec34a8f7e3 100644 --- a/drivers/dfu/dfu_scsi.c +++ b/drivers/dfu/dfu_scsi.c @@ -96,7 +96,7 @@ static int scsi_file_op(enum dfu_op op, struct dfu_entity *dfu, u64 offset, void return -1; } - snprintf(dev_part_str, sizeof(dev_part_str), "%d:%d", dfu->data.scsi.dev, + snprintf(dev_part_str, sizeof(dev_part_str), "%d:%x", dfu->data.scsi.dev, dfu->data.scsi.part); ret = fs_set_blk_dev("scsi", dev_part_str, fstype); From e6eca9ea6457e79acb4e2a426f1e078842c17b25 Mon Sep 17 00:00:00 2001 From: Kory Maincent Date: Wed, 11 Jun 2025 19:10:30 +0200 Subject: [PATCH 13/13] usb: gadget: musb: Fix duplicate ops assignment in ti_musb_peripheral Remove duplicate .ops assignment that was overriding the correct ti_musb_gadget_ops with musb_usb_ops (host ops) in the ti_musb_peripheral driver. This was causing U-Boot crashes when trying to call the handle_interrupts operation since the wrong ops structure was being used. Fixes: 7d98dbcc3dc ("usb: musb-new: Add support for DM_USB") Fixes: 281eaf1ed83a ("usb: gadget: musb: Convert interrupt handling to usb_gadget_generic_ops") Signed-off-by: Kory Maincent Reviewed-by: Mattijs Korpershoek Link: https://lore.kernel.org/r/20250611171031.840277-1-kory.maincent@bootlin.com Signed-off-by: Mattijs Korpershoek --- drivers/usb/musb-new/ti-musb.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/usb/musb-new/ti-musb.c b/drivers/usb/musb-new/ti-musb.c index ec1baa9337d..967d0953875 100644 --- a/drivers/usb/musb-new/ti-musb.c +++ b/drivers/usb/musb-new/ti-musb.c @@ -282,7 +282,6 @@ U_BOOT_DRIVER(ti_musb_peripheral) = { .ops = &ti_musb_gadget_ops, .probe = ti_musb_peripheral_probe, .remove = ti_musb_peripheral_remove, - .ops = &musb_usb_ops, .plat_auto = sizeof(struct ti_musb_plat), .priv_auto = sizeof(struct ti_musb_peripheral), .flags = DM_FLAG_PRE_RELOC,