mirror of
https://source.denx.de/u-boot/u-boot.git
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video: imx: ipuv3: prefer kernel types
Conform with U-Boot guidelines and pass checkpatch checks for upcoming changes. Signed-off-by: Brian Ruley <brian.ruley@gehealthcare.com>
This commit is contained in:
Brian Ruley
Fabio Estevam
parent
43830bd27b
commit
450f1cf696
@ -83,10 +83,10 @@ typedef enum {
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#define _MAKE_ALT_CHAN(ch) (ch | (IPU_MAX_CH << 24))
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#define IPU_CHAN_ID(ch) (ch >> 24)
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#define IPU_CHAN_ALT(ch) (ch & 0x02000000)
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#define IPU_CHAN_ALPHA_IN_DMA(ch) ((uint32_t)(ch >> 6) & 0x3F)
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#define IPU_CHAN_GRAPH_IN_DMA(ch) ((uint32_t)(ch >> 12) & 0x3F)
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#define IPU_CHAN_VIDEO_IN_DMA(ch) ((uint32_t)(ch >> 18) & 0x3F)
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#define IPU_CHAN_OUT_DMA(ch) ((uint32_t)(ch & 0x3F))
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#define IPU_CHAN_ALPHA_IN_DMA(ch) ((u32)(ch >> 6) & 0x3F)
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#define IPU_CHAN_GRAPH_IN_DMA(ch) ((u32)(ch >> 12) & 0x3F)
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#define IPU_CHAN_VIDEO_IN_DMA(ch) ((u32)(ch >> 18) & 0x3F)
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#define IPU_CHAN_OUT_DMA(ch) ((u32)(ch & 0x3F))
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#define NO_DMA 0x3F
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#define ALT 1
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@ -148,27 +148,27 @@ enum ipu_dmfc_type {
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*/
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typedef union {
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struct {
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uint32_t di;
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u32 di;
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unsigned char interlaced;
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} mem_dc_sync;
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struct {
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uint32_t temp;
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u32 temp;
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} mem_sdc_fg;
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struct {
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uint32_t di;
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u32 di;
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unsigned char interlaced;
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uint32_t in_pixel_fmt;
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uint32_t out_pixel_fmt;
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u32 in_pixel_fmt;
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u32 out_pixel_fmt;
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unsigned char alpha_chan_en;
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} mem_dp_bg_sync;
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struct {
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uint32_t temp;
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u32 temp;
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} mem_sdc_bg;
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struct {
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uint32_t di;
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u32 di;
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unsigned char interlaced;
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uint32_t in_pixel_fmt;
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uint32_t out_pixel_fmt;
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u32 in_pixel_fmt;
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u32 out_pixel_fmt;
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unsigned char alpha_chan_en;
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} mem_dp_fg_sync;
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} ipu_channel_params_t;
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@ -205,29 +205,28 @@ int32_t ipu_init_channel(ipu_channel_t channel, ipu_channel_params_t *params);
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void ipu_uninit_channel(ipu_channel_t channel);
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int32_t ipu_init_channel_buffer(ipu_channel_t channel, ipu_buffer_t type,
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uint32_t pixel_fmt, uint16_t width,
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uint16_t height, uint32_t stride,
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dma_addr_t phyaddr_0, dma_addr_t phyaddr_1,
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uint32_t u_offset, uint32_t v_offset);
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u32 pixel_fmt, u16 width, u16 height,
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u32 stride, dma_addr_t phyaddr_0,
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dma_addr_t phyaddr_1, u32 u_offset,
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u32 v_offset);
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void ipu_clear_buffer_ready(ipu_channel_t channel, ipu_buffer_t type,
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uint32_t bufNum);
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u32 bufNum);
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int32_t ipu_enable_channel(ipu_channel_t channel);
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int32_t ipu_disable_channel(ipu_channel_t channel);
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int32_t ipu_init_sync_panel(int disp, uint32_t pixel_clk, uint16_t width,
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uint16_t height, uint32_t pixel_fmt,
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uint16_t h_start_width, uint16_t h_sync_width,
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uint16_t h_end_width, uint16_t v_start_width,
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uint16_t v_sync_width, uint16_t v_end_width,
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uint32_t v_to_h_sync, ipu_di_signal_cfg_t sig);
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int32_t ipu_init_sync_panel(int disp, u32 pixel_clk, u16 width, u16 height,
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u32 pixel_fmt, u16 h_start_width, u16 h_sync_width,
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u16 h_end_width, u16 v_start_width,
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u16 v_sync_width, u16 v_end_width, u32 v_to_h_sync,
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ipu_di_signal_cfg_t sig);
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int32_t ipu_disp_set_global_alpha(ipu_channel_t channel, unsigned char enable,
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uint8_t alpha);
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u8 alpha);
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int32_t ipu_disp_set_color_key(ipu_channel_t channel, unsigned char enable,
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uint32_t colorKey);
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u32 colorKey);
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uint32_t bytes_per_pixel(uint32_t fmt);
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u32 bytes_per_pixel(u32 fmt);
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void clk_enable(struct clk *clk);
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void clk_disable(struct clk *clk);
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@ -248,9 +247,8 @@ void ipu_dmfc_set_wait4eot(int dma_chan, int width);
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void ipu_dc_init(int dc_chan, int di, unsigned char interlaced);
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void ipu_dc_uninit(int dc_chan);
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void ipu_dp_dc_enable(ipu_channel_t channel);
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int ipu_dp_init(ipu_channel_t channel, uint32_t in_pixel_fmt,
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uint32_t out_pixel_fmt);
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int ipu_dp_init(ipu_channel_t channel, u32 in_pixel_fmt, u32 out_pixel_fmt);
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void ipu_dp_uninit(ipu_channel_t channel);
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void ipu_dp_dc_disable(ipu_channel_t channel, unsigned char swap);
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ipu_color_space_t format_to_colorspace(uint32_t fmt);
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ipu_color_space_t format_to_colorspace(u32 fmt);
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#endif
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@ -29,8 +29,8 @@ extern struct mxc_ccm_reg *mxc_ccm;
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extern u32 *ipu_cpmem_base;
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struct ipu_ch_param_word {
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uint32_t data[5];
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uint32_t res[3];
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u32 data[5];
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u32 res[3];
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};
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struct ipu_ch_param {
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@ -239,8 +239,8 @@ unsigned char g_ipu_clk_enabled;
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struct clk *g_di_clk[2];
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struct clk *g_pixel_clk[2];
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unsigned char g_dc_di_assignment[10];
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uint32_t g_channel_init_mask;
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uint32_t g_channel_enable_mask;
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u32 g_channel_init_mask;
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u32 g_channel_enable_mask;
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static int ipu_dc_use_count;
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static int ipu_dp_use_count;
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@ -252,28 +252,28 @@ u32 *ipu_dc_tmpl_reg;
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/* Static functions */
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static inline void ipu_ch_param_set_high_priority(uint32_t ch)
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static inline void ipu_ch_param_set_high_priority(u32 ch)
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{
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ipu_ch_param_mod_field(ipu_ch_param_addr(ch), 1, 93, 2, 1);
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};
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static inline uint32_t channel_2_dma(ipu_channel_t ch, ipu_buffer_t type)
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static inline u32 channel_2_dma(ipu_channel_t ch, ipu_buffer_t type)
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{
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return ((uint32_t)ch >> (6 * type)) & 0x3F;
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return ((u32)ch >> (6 * type)) & 0x3F;
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};
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/* Either DP BG or DP FG can be graphic window */
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static inline int ipu_is_dp_graphic_chan(uint32_t dma_chan)
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static inline int ipu_is_dp_graphic_chan(u32 dma_chan)
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{
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return (dma_chan == 23 || dma_chan == 27);
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}
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static inline int ipu_is_dmfc_chan(uint32_t dma_chan)
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static inline int ipu_is_dmfc_chan(u32 dma_chan)
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{
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return ((dma_chan >= 23) && (dma_chan <= 29));
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}
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static inline void ipu_ch_param_set_buffer(uint32_t ch, int bufNum,
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static inline void ipu_ch_param_set_buffer(u32 ch, int bufNum,
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dma_addr_t phyaddr)
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{
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ipu_ch_param_mod_field(ipu_ch_param_addr(ch), 1, 29 * bufNum, 29,
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@ -565,7 +565,7 @@ void ipu_dump_registers(void)
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int32_t ipu_init_channel(ipu_channel_t channel, ipu_channel_params_t *params)
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{
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int ret = 0;
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uint32_t ipu_conf;
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u32 ipu_conf;
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debug("init channel = %d\n", IPU_CHAN_ID(channel));
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@ -650,9 +650,9 @@ err:
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*/
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void ipu_uninit_channel(ipu_channel_t channel)
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{
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uint32_t reg;
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uint32_t in_dma, out_dma = 0;
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uint32_t ipu_conf;
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u32 reg;
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u32 in_dma, out_dma = 0;
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u32 ipu_conf;
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if ((g_channel_init_mask & (1L << IPU_CHAN_ID(channel))) == 0) {
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debug("Channel already uninitialized %d\n",
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@ -791,13 +791,12 @@ static inline void ipu_ch_params_set_packing(struct ipu_ch_param *p,
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ipu_ch_param_set_field(p, 1, 143, 5, alpha_offset);
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}
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static void ipu_ch_param_init(int ch, uint32_t pixel_fmt, uint32_t width,
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uint32_t height, uint32_t stride, uint32_t u,
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uint32_t v, uint32_t uv_stride, dma_addr_t addr0,
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dma_addr_t addr1)
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static void ipu_ch_param_init(int ch, u32 pixel_fmt, u32 width, u32 height,
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u32 stride, u32 u, u32 v, u32 uv_stride,
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dma_addr_t addr0, dma_addr_t addr1)
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{
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uint32_t u_offset = 0;
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uint32_t v_offset = 0;
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u32 u_offset = 0;
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u32 v_offset = 0;
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struct ipu_ch_param params;
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memset(¶ms, 0, sizeof(params));
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@ -985,13 +984,12 @@ static void ipu_ch_param_init(int ch, uint32_t pixel_fmt, uint32_t width,
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* Return: Returns 0 on success or negative error code on fail
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*/
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int32_t ipu_init_channel_buffer(ipu_channel_t channel, ipu_buffer_t type,
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uint32_t pixel_fmt, uint16_t width,
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uint16_t height, uint32_t stride,
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dma_addr_t phyaddr_0, dma_addr_t phyaddr_1,
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uint32_t u, uint32_t v)
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u32 pixel_fmt, u16 width, u16 height,
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u32 stride, dma_addr_t phyaddr_0,
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dma_addr_t phyaddr_1, u32 u, u32 v)
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{
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uint32_t reg;
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uint32_t dma_chan;
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u32 reg;
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u32 dma_chan;
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dma_chan = channel_2_dma(channel, type);
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if (!idma_is_valid(dma_chan))
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@ -1039,9 +1037,9 @@ int32_t ipu_init_channel_buffer(ipu_channel_t channel, ipu_buffer_t type,
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*/
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int32_t ipu_enable_channel(ipu_channel_t channel)
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{
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uint32_t reg;
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uint32_t in_dma;
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uint32_t out_dma;
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u32 reg;
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u32 in_dma;
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u32 out_dma;
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if (g_channel_enable_mask & (1L << IPU_CHAN_ID(channel))) {
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printf("Warning: channel already enabled %d\n",
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@ -1082,9 +1080,9 @@ int32_t ipu_enable_channel(ipu_channel_t channel)
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*
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*/
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void ipu_clear_buffer_ready(ipu_channel_t channel, ipu_buffer_t type,
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uint32_t bufNum)
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u32 bufNum)
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{
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uint32_t dma_ch = channel_2_dma(channel, type);
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u32 dma_ch = channel_2_dma(channel, type);
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if (!idma_is_valid(dma_ch))
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return;
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@ -1114,9 +1112,9 @@ void ipu_clear_buffer_ready(ipu_channel_t channel, ipu_buffer_t type,
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*/
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int32_t ipu_disable_channel(ipu_channel_t channel)
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{
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uint32_t reg;
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uint32_t in_dma;
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uint32_t out_dma;
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u32 reg;
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u32 in_dma;
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u32 out_dma;
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if ((g_channel_enable_mask & (1L << IPU_CHAN_ID(channel))) == 0) {
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debug("Channel already disabled %d\n", IPU_CHAN_ID(channel));
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@ -1163,7 +1161,7 @@ int32_t ipu_disable_channel(ipu_channel_t channel)
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return 0;
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}
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uint32_t bytes_per_pixel(uint32_t fmt)
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u32 bytes_per_pixel(u32 fmt)
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{
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switch (fmt) {
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case IPU_PIX_FMT_GENERIC: /*generic data */
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@ -1196,7 +1194,7 @@ uint32_t bytes_per_pixel(uint32_t fmt)
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return 0;
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}
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ipu_color_space_t format_to_colorspace(uint32_t fmt)
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ipu_color_space_t format_to_colorspace(u32 fmt)
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{
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switch (fmt) {
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case IPU_PIX_FMT_RGB666:
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@ -399,13 +399,12 @@ static void ipu_dp_csc_setup(int dp, struct dp_csc_param_t dp_csc_param,
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}
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}
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int ipu_dp_init(ipu_channel_t channel, uint32_t in_pixel_fmt,
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uint32_t out_pixel_fmt)
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int ipu_dp_init(ipu_channel_t channel, u32 in_pixel_fmt, u32 out_pixel_fmt)
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{
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int in_fmt, out_fmt;
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int dp;
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int partial = 0;
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uint32_t reg;
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u32 reg;
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if (channel == MEM_FG_SYNC) {
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dp = DP_SYNC;
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@ -454,8 +453,7 @@ int ipu_dp_init(ipu_channel_t channel, uint32_t in_pixel_fmt,
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((fg_csc_type == YUV2RGB) && (bg_csc_type == YUV2RGB)))) {
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int red, green, blue;
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int y, u, v;
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uint32_t color_key = __raw_readl(DP_GRAPH_WIND_CTRL()) &
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0xFFFFFFL;
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u32 color_key = __raw_readl(DP_GRAPH_WIND_CTRL()) & 0xFFFFFFL;
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debug("_ipu_dp_init color key 0x%x need change to yuv fmt!\n",
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color_key);
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@ -584,8 +582,8 @@ void ipu_dc_uninit(int dc_chan)
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void ipu_dp_dc_enable(ipu_channel_t channel)
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{
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int di;
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uint32_t reg;
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uint32_t dc_chan;
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u32 reg;
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u32 dc_chan;
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if (channel == MEM_DC_SYNC)
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dc_chan = 1;
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@ -625,9 +623,9 @@ static unsigned char dc_swap;
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void ipu_dp_dc_disable(ipu_channel_t channel, unsigned char swap)
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{
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uint32_t reg;
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uint32_t csc;
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uint32_t dc_chan = 0;
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u32 reg;
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u32 csc;
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u32 dc_chan = 0;
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int timeout = 50;
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int irq = 0;
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@ -745,7 +743,7 @@ void ipu_init_dc_mappings(void)
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ipu_dc_map_config(4, 2, 21, 0xFC);
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}
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static int ipu_pixfmt_to_map(uint32_t fmt)
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static int ipu_pixfmt_to_map(u32 fmt)
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{
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switch (fmt) {
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case IPU_PIX_FMT_GENERIC:
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@ -801,17 +799,16 @@ static int ipu_pixfmt_to_map(uint32_t fmt)
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* fail.
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*/
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int32_t ipu_init_sync_panel(int disp, uint32_t pixel_clk, uint16_t width,
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uint16_t height, uint32_t pixel_fmt,
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uint16_t h_start_width, uint16_t h_sync_width,
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uint16_t h_end_width, uint16_t v_start_width,
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uint16_t v_sync_width, uint16_t v_end_width,
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uint32_t v_to_h_sync, ipu_di_signal_cfg_t sig)
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int32_t ipu_init_sync_panel(int disp, u32 pixel_clk, u16 width, u16 height,
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u32 pixel_fmt, u16 h_start_width, u16 h_sync_width,
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u16 h_end_width, u16 v_start_width,
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u16 v_sync_width, u16 v_end_width, u32 v_to_h_sync,
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ipu_di_signal_cfg_t sig)
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{
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uint32_t reg;
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uint32_t di_gen, vsync_cnt;
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uint32_t div, rounded_pixel_clk;
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uint32_t h_total, v_total;
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u32 reg;
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u32 di_gen, vsync_cnt;
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u32 div, rounded_pixel_clk;
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u32 h_total, v_total;
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int map;
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struct clk *di_parent;
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@ -1135,9 +1132,9 @@ int32_t ipu_init_sync_panel(int disp, uint32_t pixel_clk, uint16_t width,
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* Return: Returns 0 on success or negative error code on fail
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*/
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int32_t ipu_disp_set_global_alpha(ipu_channel_t channel, unsigned char enable,
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uint8_t alpha)
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u8 alpha)
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{
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uint32_t reg;
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u32 reg;
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unsigned char bg_chan;
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@ -1162,8 +1159,7 @@ int32_t ipu_disp_set_global_alpha(ipu_channel_t channel, unsigned char enable,
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if (enable) {
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reg = __raw_readl(DP_GRAPH_WIND_CTRL()) & 0x00FFFFFFL;
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__raw_writel(reg | ((uint32_t)alpha << 24),
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DP_GRAPH_WIND_CTRL());
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__raw_writel(reg | ((u32)alpha << 24), DP_GRAPH_WIND_CTRL());
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reg = __raw_readl(DP_COM_CONF());
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__raw_writel(reg | DP_COM_CONF_GWAM, DP_COM_CONF());
|
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@ -1190,9 +1186,9 @@ int32_t ipu_disp_set_global_alpha(ipu_channel_t channel, unsigned char enable,
|
||||
* Return: Returns 0 on success or negative error code on fail
|
||||
*/
|
||||
int32_t ipu_disp_set_color_key(ipu_channel_t channel, unsigned char enable,
|
||||
uint32_t color_key)
|
||||
u32 color_key)
|
||||
{
|
||||
uint32_t reg;
|
||||
u32 reg;
|
||||
int y, u, v;
|
||||
int red, green, blue;
|
||||
|
||||
|
||||
@ -37,8 +37,8 @@ static int mxcfb_map_video_memory(struct fb_info *fbi);
|
||||
static int mxcfb_unmap_video_memory(struct fb_info *fbi);
|
||||
|
||||
static struct fb_videomode const *gmode;
|
||||
static uint8_t gdisp;
|
||||
static uint32_t gpixfmt;
|
||||
static u8 gdisp;
|
||||
static u32 gpixfmt;
|
||||
|
||||
static void fb_videomode_to_var(struct fb_var_screeninfo *var,
|
||||
const struct fb_videomode *mode)
|
||||
@ -75,9 +75,9 @@ struct mxcfb_info {
|
||||
dma_addr_t alpha_phy_addr1;
|
||||
void *alpha_virt_addr0;
|
||||
void *alpha_virt_addr1;
|
||||
uint32_t alpha_mem_len;
|
||||
uint32_t cur_ipu_buf;
|
||||
uint32_t cur_ipu_alpha_buf;
|
||||
u32 alpha_mem_len;
|
||||
u32 cur_ipu_buf;
|
||||
u32 cur_ipu_alpha_buf;
|
||||
|
||||
u32 pseudo_palette[16];
|
||||
};
|
||||
@ -89,9 +89,9 @@ static unsigned char g_dp_in_use;
|
||||
static struct fb_info *mxcfb_info[3];
|
||||
static int ext_clk_used;
|
||||
|
||||
static uint32_t bpp_to_pixfmt(struct fb_info *fbi)
|
||||
static u32 bpp_to_pixfmt(struct fb_info *fbi)
|
||||
{
|
||||
uint32_t pixfmt = 0;
|
||||
u32 pixfmt = 0;
|
||||
|
||||
debug("bpp_to_pixfmt: %d\n", fbi->var.bits_per_pixel);
|
||||
|
||||
@ -180,7 +180,7 @@ static int mxcfb_set_par(struct fb_info *fbi)
|
||||
u32 mem_len;
|
||||
ipu_di_signal_cfg_t sig_cfg;
|
||||
struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par;
|
||||
uint32_t out_pixel_fmt;
|
||||
u32 out_pixel_fmt;
|
||||
|
||||
ipu_disable_channel(mxc_fbi->ipu_ch);
|
||||
ipu_uninit_channel(mxc_fbi->ipu_ch);
|
||||
@ -378,7 +378,7 @@ static int mxcfb_map_video_memory(struct fb_info *fbi)
|
||||
}
|
||||
|
||||
debug("allocated fb @ paddr=0x%08X, size=%d.\n",
|
||||
(uint32_t)fbi->fix.smem_start, fbi->fix.smem_len);
|
||||
(u32)fbi->fix.smem_start, fbi->fix.smem_len);
|
||||
|
||||
fbi->screen_size = fbi->fix.smem_len;
|
||||
|
||||
@ -451,7 +451,7 @@ extern struct clk *g_ipu_clk;
|
||||
*
|
||||
* Return: Appropriate error code to the kernel common code
|
||||
*/
|
||||
static int mxcfb_probe(struct udevice *dev, u32 interface_pix_fmt, uint8_t disp,
|
||||
static int mxcfb_probe(struct udevice *dev, u32 interface_pix_fmt, u8 disp,
|
||||
struct fb_videomode const *mode)
|
||||
{
|
||||
struct fb_info *fbi;
|
||||
@ -536,8 +536,7 @@ void ipuv3_fb_shutdown(void)
|
||||
}
|
||||
}
|
||||
|
||||
int ipuv3_fb_init(struct fb_videomode const *mode, uint8_t disp,
|
||||
uint32_t pixfmt)
|
||||
int ipuv3_fb_init(struct fb_videomode const *mode, u8 disp, u32 pixfmt)
|
||||
{
|
||||
gmode = mode;
|
||||
gdisp = disp;
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user