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doc: board: ti: j721e: document OSPI layout

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Updated OSPI flash layout diagram.

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Jonathan Humphreys 2024-06-14 11:35:36 -05:00 committed by Tom Rini
parent 40abc84b1d
commit 44ba2836d4
2 changed files with 840 additions and 668 deletions
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doc/board/ti/img/ospi_sysfw.svg
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doc/board/ti/j721e_evm.rst
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@ -150,6 +150,33 @@ Image formats:
.. image:: img/sysfw.itb.svg
:alt: sysfw.itb image format
OSPI:
-----
ROM supports booting from OSPI from offset 0x0.
Flashing images to OSPI:
Below commands can be used to download tiboot3.bin, tispl.bin, u-boot.img,
and sysfw.itb over tftp and then flash those to OSPI at their respective
addresses.
.. prompt:: bash =>
sf probe
tftp ${loadaddr} tiboot3.bin
sf update $loadaddr 0x0 $filesize
tftp ${loadaddr} tispl.bin
sf update $loadaddr 0x80000 $filesize
tftp ${loadaddr} u-boot.img
sf update $loadaddr 0x280000 $filesize
tftp ${loadaddr} sysfw.itb
sf update $loadaddr 0x6C0000 $filesize
Flash layout for OSPI:
.. image:: img/ospi_sysfw.svg
:alt: OSPI flash partition layout
R5 Memory Map:
--------------
@ -193,35 +220,8 @@ R5 Memory Map:
- 0x41cffbfc
- 0x41cfffff
OSPI:
-----
ROM supports booting from OSPI from offset 0x0.
Flashing images to OSPI:
Below commands can be used to download tiboot3.bin, tispl.bin, u-boot.img,
and sysfw.itb over tftp and then flash those to OSPI at their respective
addresses.
.. prompt:: bash =>
sf probe
tftp ${loadaddr} tiboot3.bin
sf update $loadaddr 0x0 $filesize
tftp ${loadaddr} tispl.bin
sf update $loadaddr 0x80000 $filesize
tftp ${loadaddr} u-boot.img
sf update $loadaddr 0x280000 $filesize
tftp ${loadaddr} sysfw.itb
sf update $loadaddr 0x6C0000 $filesize
Flash layout for OSPI:
.. image:: img/ospi_sysfw.svg
:alt: OSPI flash partition layout
Firmwares:
----------
Firmware:
---------
The J721e u-boot allows firmware to be loaded for the Cortex-R5 subsystem.
The CPSW5G in J7200 and CPSW9G in J721E present in MAIN domain is configured