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power: regulator: add MediaTek MT6357 driver
Add a driver for the power regulators of the MediaTek MT6357 PMIC chip. Signed-off-by: Julien Masson <jmasson@baylibre.com> Co-developed-by: Macpaul Lin <macpaul.lin@mediatek.com> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
Julien Masson
Peng Fan
parent
6f7d976317
commit
4267b414dc
@ -432,6 +432,7 @@ F: drivers/net/phy/mediatek/
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F: drivers/phy/phy-mtk-*
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F: drivers/pinctrl/mediatek/
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F: drivers/power/domain/mtk-power-domain.c
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F: drivers/power/regulator/mt*.c
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F: drivers/pci/pcie_mediatek_gen3.c
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F: drivers/pci/pcie_mediatek.c
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F: drivers/pwm/pwm-mtk.c
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@ -448,6 +449,7 @@ F: drivers/reset/reset-mediatek.c
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F: drivers/serial/serial_mtk.c
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F: include/dt-bindings/clock/mediatek,*
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F: include/dt-bindings/power/mediatek,*
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F: include/power/mt*.h
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F: tools/mtk_image.c
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F: tools/mtk_image.h
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F: tools/mtk_nand_headers.c
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@ -521,3 +521,12 @@ config DM_REGULATOR_CPCAP
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REGULATOR CPCAP. The driver supports both DC-to-DC Step-Down Switching
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(SW) Regulators and Low-Dropout Linear (LDO) Regulators found in CPCAP
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PMIC and implements get/set api for voltage and state.
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config DM_REGULATOR_MT6357
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bool "Enable driver for MediaTek MT6357 PMIC regulators"
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depends on DM_REGULATOR && DM_PMIC_MTK_PWRAP
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help
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Say y here to select this option to enable the power regulator of
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MediaTek MT6357 PMIC.
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This driver supports the control of different power rails of device
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through regulator interface.
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@ -47,3 +47,4 @@ obj-$(CONFIG_$(PHASE_)DM_REGULATOR_ANATOP) += anatop_regulator.o
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obj-$(CONFIG_DM_REGULATOR_TPS65219) += tps65219_regulator.o
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obj-$(CONFIG_REGULATOR_RZG2L_USBPHY) += rzg2l-usbphy-regulator.o
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obj-$(CONFIG_$(PHASE_)DM_REGULATOR_CPCAP) += cpcap_regulator.o
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obj-$(CONFIG_DM_REGULATOR_MT6357) += mt6357_regulator.o
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512
drivers/power/regulator/mt6357_regulator.c
Normal file
512
drivers/power/regulator/mt6357_regulator.c
Normal file
@ -0,0 +1,512 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* MT6357 regulator driver
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*
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* Copyright (c) 2026 BayLibre, SAS.
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* Author: Julien Masson <jmasson@baylibre.com>
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*/
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#include <dm.h>
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#include <power/regulator.h>
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#include <power/mt6357.h>
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#include <power/pmic.h>
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enum mt6357_regulator_type {
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MT6357_REG_TYPE_RANGE,
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MT6357_REG_TYPE_TABLE,
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MT6357_REG_TYPE_FIXED,
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};
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struct mt6357_linear_range {
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unsigned int min;
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unsigned int min_sel;
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unsigned int max_sel;
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unsigned int step;
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};
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struct mt6357_regulator_desc {
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const char *name;
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const char *of_match;
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enum mt6357_regulator_type type;
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int id;
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unsigned int n_voltages;
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const unsigned int *volt_table;
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const struct mt6357_linear_range *linear_ranges;
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int n_linear_ranges;
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unsigned int min_uV;
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unsigned int vsel_reg;
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unsigned int vsel_mask;
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unsigned int enable_reg;
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unsigned int enable_mask;
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};
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struct mt6357_regulator_info {
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struct mt6357_regulator_desc desc;
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const u32 *index_table;
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unsigned int n_table;
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u32 vsel_shift;
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u32 da_vsel_reg;
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u32 da_vsel_mask;
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u32 da_vsel_shift;
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};
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/* Initialize struct mt6357_linear_range for regulators */
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#define REGULATOR_LINEAR_RANGE(_min_uV, _min_sel, _max_sel, _step_uV) \
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{ \
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.min = _min_uV, \
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.min_sel = _min_sel, \
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.max_sel = _max_sel, \
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.step = _step_uV, \
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}
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#define MT6357_BUCK(match, vreg, min, max, step, \
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volt_ranges, vosel_reg, vosel_mask, _da_vsel_mask) \
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[MT6357_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.type = MT6357_REG_TYPE_RANGE, \
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.id = MT6357_ID_##vreg, \
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.n_voltages = ((max) - (min)) / (step) + 1, \
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.linear_ranges = volt_ranges, \
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.n_linear_ranges = ARRAY_SIZE(volt_ranges), \
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.vsel_reg = vosel_reg, \
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.vsel_mask = vosel_mask, \
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.enable_reg = MT6357_BUCK_##vreg##_CON0, \
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.enable_mask = BIT(0), \
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}, \
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.da_vsel_reg = MT6357_BUCK_##vreg##_DBG0, \
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.da_vsel_mask = _da_vsel_mask, \
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.da_vsel_shift = 0, \
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}
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#define MT6357_LDO(match, vreg, ldo_volt_table, \
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ldo_index_table, enreg, vosel, \
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vosel_mask) \
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[MT6357_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.type = MT6357_REG_TYPE_TABLE, \
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.id = MT6357_ID_##vreg, \
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.n_voltages = ARRAY_SIZE(ldo_volt_table), \
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.volt_table = ldo_volt_table, \
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.vsel_reg = vosel, \
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.vsel_mask = vosel_mask << 8, \
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.enable_reg = enreg, \
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.enable_mask = BIT(0), \
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}, \
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.index_table = ldo_index_table, \
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.n_table = ARRAY_SIZE(ldo_index_table), \
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}
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#define MT6357_LDO1(match, vreg, min, max, step, volt_ranges, \
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enreg, vosel, vosel_mask) \
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[MT6357_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.type = MT6357_REG_TYPE_RANGE, \
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.id = MT6357_ID_##vreg, \
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.n_voltages = ((max) - (min)) / (step) + 1, \
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.linear_ranges = volt_ranges, \
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.n_linear_ranges = ARRAY_SIZE(volt_ranges), \
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.vsel_reg = vosel, \
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.vsel_mask = vosel_mask, \
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.enable_reg = enreg, \
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.enable_mask = BIT(0), \
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}, \
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.da_vsel_reg = MT6357_LDO_##vreg##_DBG0, \
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.da_vsel_mask = 0x7f, \
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.da_vsel_shift = 8, \
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}
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#define MT6357_REG_FIXED(match, vreg, volt) \
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[MT6357_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.type = MT6357_REG_TYPE_FIXED, \
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.id = MT6357_ID_##vreg, \
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.n_voltages = 1, \
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.enable_reg = MT6357_LDO_##vreg##_CON0, \
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.enable_mask = BIT(0), \
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.min_uV = volt, \
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}, \
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}
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static int mt6357_range_find_value(const struct mt6357_linear_range *r,
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unsigned int sel,
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unsigned int *val)
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{
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if (!val || sel < r->min_sel || sel > r->max_sel)
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return -EINVAL;
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*val = r->min + r->step * (sel - r->min_sel);
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return 0;
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}
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static int mt6357_range_find_selector(const struct mt6357_linear_range *r,
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int val, unsigned int *sel)
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{
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int num_vals = r->max_sel - r->min_sel + 1;
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int ret = -EINVAL;
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if (val >= r->min && val <= r->min + r->step * (num_vals - 1)) {
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if (r->step) {
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*sel = r->min_sel + ((val - r->min) / r->step);
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ret = 0;
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} else {
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*sel = r->min_sel;
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ret = 0;
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}
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}
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return ret;
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}
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static int mt6357_get_enable(struct udevice *dev)
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{
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struct mt6357_regulator_info *info = dev_get_priv(dev);
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int ret;
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ret = pmic_reg_read(dev->parent, info->desc.enable_reg);
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if (ret < 0)
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return ret;
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return ret & info->desc.enable_mask ? true : false;
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}
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static int mt6357_set_enable(struct udevice *dev, bool enable)
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{
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struct mt6357_regulator_info *info = dev_get_priv(dev);
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return pmic_clrsetbits(dev->parent, info->desc.enable_reg,
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info->desc.enable_mask,
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enable ? info->desc.enable_mask : 0);
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}
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static int mt6357_get_value(struct udevice *dev)
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{
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struct mt6357_regulator_info *info = dev_get_priv(dev);
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unsigned int val_uV;
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int selector, idx, ret;
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const u32 *pvol;
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switch (info->desc.type) {
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case MT6357_REG_TYPE_RANGE:
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selector = pmic_reg_read(dev->parent, info->da_vsel_reg);
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if (selector < 0)
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return selector;
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selector = (selector & info->da_vsel_mask) >> info->da_vsel_shift;
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ret = mt6357_range_find_value(info->desc.linear_ranges, selector, &val_uV);
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if (ret < 0)
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return ret;
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return val_uV;
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case MT6357_REG_TYPE_TABLE:
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selector = pmic_reg_read(dev->parent, info->desc.vsel_reg);
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if (selector < 0)
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return selector;
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selector = (selector & info->desc.vsel_mask) >> 8;
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pvol = info->index_table;
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for (idx = 0; idx < info->desc.n_voltages; idx++) {
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if (pvol[idx] == selector)
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return info->desc.volt_table[idx];
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}
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return -EINVAL;
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case MT6357_REG_TYPE_FIXED:
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return info->desc.min_uV;
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default:
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return -EINVAL;
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}
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}
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static int mt6357_set_value(struct udevice *dev, int uvolt)
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{
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struct mt6357_regulator_info *info = dev_get_priv(dev);
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int selector, idx, ret;
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const u32 *pvol;
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switch (info->desc.type) {
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case MT6357_REG_TYPE_RANGE:
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ret = mt6357_range_find_selector(info->desc.linear_ranges, uvolt,
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&selector);
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if (ret < 0)
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return ret;
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return pmic_clrsetbits(dev->parent, info->desc.vsel_reg,
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info->desc.vsel_mask, selector);
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case MT6357_REG_TYPE_TABLE:
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pvol = info->desc.volt_table;
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for (idx = 0; idx < info->desc.n_voltages; idx++) {
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if (pvol[idx] == uvolt) {
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selector = info->index_table[idx];
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return pmic_clrsetbits(dev->parent, info->desc.vsel_reg,
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info->desc.vsel_mask, selector << 8);
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}
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}
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return -EINVAL;
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default:
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return -EINVAL;
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}
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}
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static const int vxo22_voltages[] = {
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2200000,
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2400000,
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};
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static const int vefuse_voltages[] = {
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1200000,
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1300000,
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1500000,
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1800000,
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2800000,
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2900000,
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3000000,
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3300000,
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};
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static const int vcn33_voltages[] = {
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3300000,
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3400000,
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3500000,
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};
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static const int vcama_voltages[] = {
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2500000,
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2800000,
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};
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static const int vcamd_voltages[] = {
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1000000,
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1100000,
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1200000,
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1300000,
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1500000,
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1800000,
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};
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static const int vldo28_voltages[] = {
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2800000,
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3000000,
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};
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static const int vdram_voltages[] = {
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1100000,
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1200000,
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};
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static const int vsim_voltages[] = {
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1700000,
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1800000,
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2700000,
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3000000,
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3100000,
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};
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static const int vibr_voltages[] = {
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1200000,
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1300000,
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1500000,
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1800000,
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2000000,
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2800000,
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3000000,
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3300000,
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};
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static const int vmc_voltages[] = {
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1800000,
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2900000,
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3000000,
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3300000,
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};
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static const int vmch_voltages[] = {
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2900000,
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3000000,
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3300000,
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};
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static const int vemc_voltages[] = {
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2900000,
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3000000,
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3300000,
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};
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static const int vusb_voltages[] = {
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3000000,
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3100000,
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};
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static const int vmc_idx[] = {
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4, 10, 11, 13,
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};
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static const int vmch_idx[] = {
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2, 3, 5,
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};
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static const int vemc_idx[] = {
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2, 3, 5,
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};
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static const int vusb_idx[] = {
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3, 4,
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};
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static const int vxo22_idx[] = {
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0, 2,
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};
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static const int vefuse_idx[] = {
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0, 1, 2, 4, 9, 10, 11, 13,
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};
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static const int vcn33_idx[] = {
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1, 2, 3,
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};
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static const int vcama_idx[] = {
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7, 10,
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};
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static const int vcamd_idx[] = {
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4, 5, 6, 7, 9, 12,
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};
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static const int vldo28_idx[] = {
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1, 3,
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};
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static const int vdram_idx[] = {
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1, 2,
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};
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static const int vsim_idx[] = {
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3, 4, 8, 11, 12,
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};
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static const int vibr_idx[] = {
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0, 1, 2, 4, 5, 9, 11, 13,
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};
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static const struct mt6357_linear_range buck_volt_range1[] = {
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REGULATOR_LINEAR_RANGE(518750, 0, 0x7f, 6250),
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};
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static const struct mt6357_linear_range buck_volt_range2[] = {
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REGULATOR_LINEAR_RANGE(500000, 0, 0x7f, 6250),
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};
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static const struct mt6357_linear_range buck_volt_range3[] = {
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REGULATOR_LINEAR_RANGE(500000, 0, 0x3f, 50000),
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};
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static const struct mt6357_linear_range buck_volt_range4[] = {
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REGULATOR_LINEAR_RANGE(1200000, 0, 0x7f, 12500),
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};
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/* The array is indexed by id(MT6357_ID_XXX) */
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static struct mt6357_regulator_info mt6357_regulators[] = {
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/* Bucks */
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MT6357_BUCK("buck-vcore", VCORE, 518750, 1312500, 6250,
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buck_volt_range1, MT6357_BUCK_VCORE_ELR0, 0x7f, 0x7f),
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MT6357_BUCK("buck-vproc", VPROC, 518750, 1312500, 6250,
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buck_volt_range1, MT6357_BUCK_VPROC_ELR0, 0x7f, 0x7f),
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MT6357_BUCK("buck-vmodem", VMODEM, 500000, 1293750, 6250,
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buck_volt_range2, MT6357_BUCK_VMODEM_ELR0, 0x7f, 0x7f),
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MT6357_BUCK("buck-vpa", VPA, 500000, 3650000, 50000,
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||||
buck_volt_range3, MT6357_BUCK_VPA_CON1, 0x3f, 0x3f),
|
||||
MT6357_BUCK("buck-vs1", VS1, 1200000, 2787500, 12500,
|
||||
buck_volt_range4, MT6357_BUCK_VS1_ELR0, 0x7f, 0x7f),
|
||||
|
||||
/* LDOs */
|
||||
MT6357_LDO("ldo-vcama", VCAMA, vcama_voltages, vcama_idx,
|
||||
MT6357_LDO_VCAMA_CON0, MT6357_VCAMA_ANA_CON0, 0xf),
|
||||
MT6357_LDO("ldo-vcamd", VCAMD, vcamd_voltages, vcamd_idx,
|
||||
MT6357_LDO_VCAMD_CON0, MT6357_VCAMD_ANA_CON0, 0xf),
|
||||
MT6357_LDO("ldo-vcn33-bt", VCN33_BT, vcn33_voltages, vcn33_idx,
|
||||
MT6357_LDO_VCN33_CON0_0, MT6357_VCN33_ANA_CON0, 0x3),
|
||||
MT6357_LDO("ldo-vcn33-wifi", VCN33_WIFI, vcn33_voltages, vcn33_idx,
|
||||
MT6357_LDO_VCN33_CON0_1, MT6357_VCN33_ANA_CON0, 0x3),
|
||||
MT6357_LDO("ldo-vdram", VDRAM, vdram_voltages, vdram_idx,
|
||||
MT6357_LDO_VDRAM_CON0, MT6357_VDRAM_ELR_2, 0x3),
|
||||
MT6357_LDO("ldo-vefuse", VEFUSE, vefuse_voltages, vefuse_idx,
|
||||
MT6357_LDO_VEFUSE_CON0, MT6357_VEFUSE_ANA_CON0, 0xf),
|
||||
MT6357_LDO("ldo-vemc", VEMC, vemc_voltages, vemc_idx,
|
||||
MT6357_LDO_VEMC_CON0, MT6357_VEMC_ANA_CON0, 0x7),
|
||||
MT6357_LDO("ldo-vibr", VIBR, vibr_voltages, vibr_idx,
|
||||
MT6357_LDO_VIBR_CON0, MT6357_VIBR_ANA_CON0, 0xf),
|
||||
MT6357_LDO("ldo-vldo28", VLDO28, vldo28_voltages, vldo28_idx,
|
||||
MT6357_LDO_VLDO28_CON0_0, MT6357_VLDO28_ANA_CON0, 0x3),
|
||||
MT6357_LDO("ldo-vmc", VMC, vmc_voltages, vmc_idx,
|
||||
MT6357_LDO_VMC_CON0, MT6357_VMC_ANA_CON0, 0xf),
|
||||
MT6357_LDO("ldo-vmch", VMCH, vmch_voltages, vmch_idx,
|
||||
MT6357_LDO_VMCH_CON0, MT6357_VMCH_ANA_CON0, 0x7),
|
||||
MT6357_LDO("ldo-vsim1", VSIM1, vsim_voltages, vsim_idx,
|
||||
MT6357_LDO_VSIM1_CON0, MT6357_VSIM1_ANA_CON0, 0xf),
|
||||
MT6357_LDO("ldo-vsim2", VSIM2, vsim_voltages, vsim_idx,
|
||||
MT6357_LDO_VSIM2_CON0, MT6357_VSIM2_ANA_CON0, 0xf),
|
||||
MT6357_LDO("ldo-vusb33", VUSB33, vusb_voltages, vusb_idx,
|
||||
MT6357_LDO_VUSB33_CON0_0, MT6357_VUSB33_ANA_CON0, 0x7),
|
||||
MT6357_LDO("ldo-vxo22", VXO22, vxo22_voltages, vxo22_idx,
|
||||
MT6357_LDO_VXO22_CON0, MT6357_VXO22_ANA_CON0, 0x3),
|
||||
|
||||
MT6357_LDO1("ldo-vsram-proc", VSRAM_PROC, 518750, 1312500, 6250,
|
||||
buck_volt_range1, MT6357_LDO_VSRAM_PROC_CON0,
|
||||
MT6357_LDO_VSRAM_CON0, 0x7f),
|
||||
MT6357_LDO1("ldo-vsram-others", VSRAM_OTHERS, 518750, 1312500, 6250,
|
||||
buck_volt_range1, MT6357_LDO_VSRAM_OTHERS_CON0,
|
||||
MT6357_LDO_VSRAM_CON1, 0x7f),
|
||||
|
||||
MT6357_REG_FIXED("ldo-vaud28", VAUD28, 2800000),
|
||||
MT6357_REG_FIXED("ldo-vaux18", VAUX18, 1800000),
|
||||
MT6357_REG_FIXED("ldo-vcamio18", VCAMIO, 1800000),
|
||||
MT6357_REG_FIXED("ldo-vcn18", VCN18, 1800000),
|
||||
MT6357_REG_FIXED("ldo-vcn28", VCN28, 2800000),
|
||||
MT6357_REG_FIXED("ldo-vfe28", VFE28, 2800000),
|
||||
MT6357_REG_FIXED("ldo-vio18", VIO18, 1800000),
|
||||
MT6357_REG_FIXED("ldo-vio28", VIO28, 2800000),
|
||||
MT6357_REG_FIXED("ldo-vrf12", VRF12, 1200000),
|
||||
MT6357_REG_FIXED("ldo-vrf18", VRF18, 1800000),
|
||||
};
|
||||
|
||||
static int mt6357_regulator_probe(struct udevice *dev)
|
||||
{
|
||||
struct mt6357_regulator_info *priv = dev_get_priv(dev);
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(mt6357_regulators); i++) {
|
||||
if (!strcmp(dev->name, mt6357_regulators[i].desc.of_match)) {
|
||||
*priv = mt6357_regulators[i];
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
static const struct dm_regulator_ops mt6357_regulator_ops = {
|
||||
.get_value = mt6357_get_value,
|
||||
.set_value = mt6357_set_value,
|
||||
.get_enable = mt6357_get_enable,
|
||||
.set_enable = mt6357_set_enable,
|
||||
};
|
||||
|
||||
U_BOOT_DRIVER(mt6357_regulator) = {
|
||||
.name = MT6357_REGULATOR_DRIVER,
|
||||
.id = UCLASS_REGULATOR,
|
||||
.ops = &mt6357_regulator_ops,
|
||||
.probe = mt6357_regulator_probe,
|
||||
.priv_auto = sizeof(struct mt6357_regulator_info),
|
||||
};
|
||||
159
include/power/mt6357.h
Normal file
159
include/power/mt6357.h
Normal file
@ -0,0 +1,159 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* Copyright (c) 2026 BayLibre, SAS.
|
||||
* Author: Julien Masson <jmasson@baylibre.com>
|
||||
*/
|
||||
|
||||
#ifndef _REGULATOR_MT6357_H_
|
||||
#define _REGULATOR_MT6357_H_
|
||||
|
||||
#define MT6357_REGULATOR_DRIVER "mt6357_regulator"
|
||||
|
||||
enum {
|
||||
/* Bucks */
|
||||
MT6357_ID_VCORE,
|
||||
MT6357_ID_VMODEM,
|
||||
MT6357_ID_VPA,
|
||||
MT6357_ID_VPROC,
|
||||
MT6357_ID_VS1,
|
||||
|
||||
/* LDOs */
|
||||
MT6357_ID_VAUX18,
|
||||
MT6357_ID_VAUD28,
|
||||
MT6357_ID_VCAMA,
|
||||
MT6357_ID_VCAMD,
|
||||
MT6357_ID_VCAMIO,
|
||||
MT6357_ID_VCN18,
|
||||
MT6357_ID_VCN28,
|
||||
MT6357_ID_VCN33_BT,
|
||||
MT6357_ID_VCN33_WIFI,
|
||||
MT6357_ID_VDRAM,
|
||||
MT6357_ID_VEFUSE,
|
||||
MT6357_ID_VEMC,
|
||||
MT6357_ID_VFE28,
|
||||
MT6357_ID_VIBR,
|
||||
MT6357_ID_VIO18,
|
||||
MT6357_ID_VIO28,
|
||||
MT6357_ID_VLDO28,
|
||||
MT6357_ID_VMC,
|
||||
MT6357_ID_VMCH,
|
||||
MT6357_ID_VRF12,
|
||||
MT6357_ID_VRF18,
|
||||
MT6357_ID_VSIM1,
|
||||
MT6357_ID_VSIM2,
|
||||
MT6357_ID_VSRAM_OTHERS,
|
||||
MT6357_ID_VSRAM_PROC,
|
||||
MT6357_ID_VUSB33,
|
||||
MT6357_ID_VXO22,
|
||||
};
|
||||
|
||||
/* PMIC Registers */
|
||||
#define MT6357_BUCK_TOP_CLK_CON0 0x140c
|
||||
#define MT6357_BUCK_TOP_CLK_HWEN_CON0 0x1412
|
||||
#define MT6357_BUCK_TOP_CLK_MISC_CON0 0x1418
|
||||
#define MT6357_BUCK_TOP_INT_CON0 0x141a
|
||||
#define MT6357_BUCK_TOP_INT_MASK_CON0 0x1420
|
||||
#define MT6357_BUCK_TOP_SLP_CON0 0x142c
|
||||
#define MT6357_BUCK_TOP_OC_CON0 0x1434
|
||||
#define MT6357_BUCK_TOP_K_CON0 0x1436
|
||||
#define MT6357_BUCK_VPROC_CON0 0x1488
|
||||
#define MT6357_BUCK_VPROC_DBG0 0x14a2
|
||||
#define MT6357_BUCK_VPROC_ELR0 0x14aa
|
||||
#define MT6357_BUCK_VCORE_CON0 0x1508
|
||||
#define MT6357_BUCK_VCORE_DBG0 0x1522
|
||||
#define MT6357_BUCK_VCORE_ELR0 0x152a
|
||||
#define MT6357_BUCK_VMODEM_CON0 0x1588
|
||||
#define MT6357_BUCK_VMODEM_DBG0 0x15a2
|
||||
#define MT6357_BUCK_VMODEM_ELR0 0x15aa
|
||||
#define MT6357_BUCK_VS1_CON0 0x1608
|
||||
#define MT6357_BUCK_VS1_DBG0 0x1622
|
||||
#define MT6357_BUCK_VS1_ELR0 0x1632
|
||||
#define MT6357_BUCK_VPA_CON0 0x1688
|
||||
#define MT6357_BUCK_VPA_CON1 0x168a
|
||||
#define MT6357_BUCK_VPA_DBG0 0x1692
|
||||
#define MT6357_BUCK_VPA_DLC_CON0 0x1698
|
||||
#define MT6357_BUCK_VPA_MSFG_CON0 0x169e
|
||||
#define MT6357_LDO_TOP_CLK_DCM_CON0 0x188c
|
||||
#define MT6357_LDO_TOP_CLK_VIO28_CON0 0x188e
|
||||
#define MT6357_LDO_TOP_CLK_VIO18_CON0 0x1890
|
||||
#define MT6357_LDO_TOP_CLK_VAUD28_CON0 0x1892
|
||||
#define MT6357_LDO_TOP_CLK_VDRAM_CON0 0x1894
|
||||
#define MT6357_LDO_TOP_CLK_VSRAM_PROC_CON0 0x1896
|
||||
#define MT6357_LDO_TOP_CLK_VSRAM_OTHERS_CON0 0x1898
|
||||
#define MT6357_LDO_TOP_CLK_VAUX18_CON0 0x189a
|
||||
#define MT6357_LDO_TOP_CLK_VUSB33_CON0 0x189c
|
||||
#define MT6357_LDO_TOP_CLK_VEMC_CON0 0x189e
|
||||
#define MT6357_LDO_TOP_CLK_VXO22_CON0 0x18a0
|
||||
#define MT6357_LDO_TOP_CLK_VSIM1_CON0 0x18a2
|
||||
#define MT6357_LDO_TOP_CLK_VSIM2_CON0 0x18a4
|
||||
#define MT6357_LDO_TOP_CLK_VCAMD_CON0 0x18a6
|
||||
#define MT6357_LDO_TOP_CLK_VCAMIO_CON0 0x18a8
|
||||
#define MT6357_LDO_TOP_CLK_VEFUSE_CON0 0x18aa
|
||||
#define MT6357_LDO_TOP_CLK_VCN33_CON0 0x18ac
|
||||
#define MT6357_LDO_TOP_CLK_VCN18_CON0 0x18ae
|
||||
#define MT6357_LDO_TOP_CLK_VCN28_CON0 0x18b0
|
||||
#define MT6357_LDO_TOP_CLK_VIBR_CON0 0x18b2
|
||||
#define MT6357_LDO_TOP_CLK_VFE28_CON0 0x18b4
|
||||
#define MT6357_LDO_TOP_CLK_VMCH_CON0 0x18b6
|
||||
#define MT6357_LDO_TOP_CLK_VMC_CON0 0x18b8
|
||||
#define MT6357_LDO_TOP_CLK_VRF18_CON0 0x18ba
|
||||
#define MT6357_LDO_TOP_CLK_VLDO28_CON0 0x18bc
|
||||
#define MT6357_LDO_TOP_CLK_VRF12_CON0 0x18be
|
||||
#define MT6357_LDO_TOP_CLK_VCAMA_CON0 0x18c0
|
||||
#define MT6357_LDO_TOP_CLK_TREF_CON0 0x18c2
|
||||
#define MT6357_LDO_TOP_INT_CON0 0x18c4
|
||||
#define MT6357_LDO_TOP_INT_MASK_CON0 0x18d0
|
||||
#define MT6357_LDO_TEST_CON0 0x18e4
|
||||
#define MT6357_LDO_TOP_WDT_CON0 0x18e6
|
||||
#define MT6357_LDO_TOP_RSV_CON0 0x18e8
|
||||
#define MT6357_LDO_VXO22_CON0 0x1908
|
||||
#define MT6357_LDO_VAUX18_CON0 0x191c
|
||||
#define MT6357_LDO_VAUD28_CON0 0x1930
|
||||
#define MT6357_LDO_VIO28_CON0 0x1944
|
||||
#define MT6357_LDO_VIO18_CON0 0x1958
|
||||
#define MT6357_LDO_VDRAM_CON0 0x196c
|
||||
#define MT6357_LDO_VEMC_CON0 0x1988
|
||||
#define MT6357_LDO_VUSB33_CON0_0 0x199c
|
||||
#define MT6357_LDO_VSRAM_PROC_CON0 0x19b2
|
||||
#define MT6357_LDO_VSRAM_PROC_DBG0 0x19cc
|
||||
#define MT6357_LDO_VSRAM_OTHERS_CON0 0x19d0
|
||||
#define MT6357_LDO_VSRAM_OTHERS_DBG0 0x19ea
|
||||
#define MT6357_LDO_VSRAM_WDT_DBG0 0x19f6
|
||||
#define MT6357_LDO_VSRAM_CON0 0x19fa
|
||||
#define MT6357_LDO_VSRAM_CON1 0x19fc
|
||||
#define MT6357_LDO_VFE28_CON0 0x1a08
|
||||
#define MT6357_LDO_VRF18_CON0 0x1a1c
|
||||
#define MT6357_LDO_VRF12_CON0 0x1a30
|
||||
#define MT6357_LDO_VEFUSE_CON0 0x1a44
|
||||
#define MT6357_LDO_VCN18_CON0 0x1a58
|
||||
#define MT6357_LDO_VCAMA_CON0 0x1a6c
|
||||
#define MT6357_LDO_VCAMD_CON0 0x1a88
|
||||
#define MT6357_LDO_VCAMIO_CON0 0x1a9c
|
||||
#define MT6357_LDO_VMC_CON0 0x1ab0
|
||||
#define MT6357_LDO_VMCH_CON0 0x1ac4
|
||||
#define MT6357_LDO_VSIM1_CON0 0x1ad8
|
||||
#define MT6357_LDO_VSIM2_CON0 0x1aec
|
||||
#define MT6357_LDO_VIBR_CON0 0x1b08
|
||||
#define MT6357_LDO_VCN33_CON0_0 0x1b1c
|
||||
#define MT6357_LDO_VCN33_CON0_1 0x1b2a
|
||||
#define MT6357_LDO_VLDO28_CON0_0 0x1b32
|
||||
#define MT6357_LDO_GOFF2_RSV_CON0 0x1b48
|
||||
#define MT6357_LDO_VCN28_CON0 0x1b88
|
||||
#define MT6357_LDO_TREF_CON0 0x1b9e
|
||||
#define MT6357_LDO_GOFF3_RSV_CON0 0x1bae
|
||||
#define MT6357_VXO22_ANA_CON0 0x1c18
|
||||
#define MT6357_VCN33_ANA_CON0 0x1c1c
|
||||
#define MT6357_VEMC_ANA_CON0 0x1c20
|
||||
#define MT6357_VLDO28_ANA_CON0 0x1c24
|
||||
#define MT6357_VIBR_ANA_CON0 0x1c2c
|
||||
#define MT6357_VSIM1_ANA_CON0 0x1c30
|
||||
#define MT6357_VSIM2_ANA_CON0 0x1c34
|
||||
#define MT6357_VMCH_ANA_CON0 0x1c38
|
||||
#define MT6357_VMC_ANA_CON0 0x1c3c
|
||||
#define MT6357_VUSB33_ANA_CON0 0x1c88
|
||||
#define MT6357_VCAMA_ANA_CON0 0x1c8c
|
||||
#define MT6357_VEFUSE_ANA_CON0 0x1c90
|
||||
#define MT6357_VCAMD_ANA_CON0 0x1c94
|
||||
#define MT6357_VDRAM_ELR_2 0x1cac
|
||||
|
||||
#endif
|
||||
Loading…
x
Reference in New Issue
Block a user