From f7fead89141e72558dd24bb7ac47aabb77fc4662 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Fri, 16 Feb 2024 17:35:35 +0100 Subject: [PATCH 1/8] clk: sifive: append missing \n to messages If multiple messages are written, line-feeds improve the readability. Fixes: c40b6df87fc0 ("clk: Add SiFive FU540 PRCI clock driver") Signed-off-by: Heinrich Schuchardt Reviewed-by: Sean Anderson --- drivers/clk/analogbits/wrpll-cln28hpc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/analogbits/wrpll-cln28hpc.c b/drivers/clk/analogbits/wrpll-cln28hpc.c index a3cb109d357..537c696b727 100644 --- a/drivers/clk/analogbits/wrpll-cln28hpc.c +++ b/drivers/clk/analogbits/wrpll-cln28hpc.c @@ -81,7 +81,7 @@ static int __wrpll_calc_filter_range(unsigned long post_divr_freq) { if (post_divr_freq < MIN_POST_DIVR_FREQ || post_divr_freq > MAX_POST_DIVR_FREQ) { - WARN(1, "%s: post-divider reference freq out of range: %lu", + WARN(1, "%s: post-divider reference freq out of range: %lu\n", __func__, post_divr_freq); return -ERANGE; } @@ -229,7 +229,7 @@ int wrpll_configure_for_rate(struct wrpll_cfg *c, u32 target_rate, int range; if (c->flags == 0) { - WARN(1, "%s called with uninitialized PLL config", __func__); + WARN(1, "%s called with uninitialized PLL config\n", __func__); return -EINVAL; } @@ -335,7 +335,7 @@ unsigned long wrpll_calc_output_rate(const struct wrpll_cfg *c, u64 n; if (c->flags & WRPLL_FLAGS_EXT_FEEDBACK_MASK) { - WARN(1, "external feedback mode not yet supported"); + WARN(1, "external feedback mode not yet supported\n"); return ULONG_MAX; } From 5896ac5766fdafb0ba087c16261e3dff792dbe3e Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sat, 17 Feb 2024 00:18:04 +0100 Subject: [PATCH 2/8] clk: sifive: avoid declaring static variables in includes The existing code is unnecessarily convoluted: Arrays __prci_init_clocks_fu[5|7]40 are initialized with data. In separate includes fu[5|7]40-prci.h the size of the arrays is provided as constants. By moving the structures prci_clk_fu[5|7]40 to the respective code modules we can directly use ARRAY_SIZE() to access the size of the data used for initialization. Signed-off-by: Heinrich Schuchardt Reviewed-by: Leo Yu-Chi Liang --- drivers/clk/sifive/fu540-prci.c | 7 ++++++- drivers/clk/sifive/fu540-prci.h | 22 ---------------------- drivers/clk/sifive/fu740-prci.c | 7 ++++++- drivers/clk/sifive/fu740-prci.h | 22 ---------------------- drivers/clk/sifive/sifive-prci.c | 3 +-- drivers/clk/sifive/sifive-prci.h | 4 ++++ 6 files changed, 17 insertions(+), 48 deletions(-) delete mode 100644 drivers/clk/sifive/fu540-prci.h delete mode 100644 drivers/clk/sifive/fu740-prci.h diff --git a/drivers/clk/sifive/fu540-prci.c b/drivers/clk/sifive/fu540-prci.c index ceb2c6fab0d..e55a26ab8fd 100644 --- a/drivers/clk/sifive/fu540-prci.c +++ b/drivers/clk/sifive/fu540-prci.c @@ -58,7 +58,7 @@ static const struct __prci_clock_ops sifive_fu540_prci_tlclksel_clk_ops = { }; /* List of clock controls provided by the PRCI */ -struct __prci_clock __prci_init_clocks_fu540[] = { +static struct __prci_clock __prci_init_clocks_fu540[] = { [PRCI_CLK_COREPLL] = { .name = "corepll", .parent_name = "hfclk", @@ -83,3 +83,8 @@ struct __prci_clock __prci_init_clocks_fu540[] = { .ops = &sifive_fu540_prci_tlclksel_clk_ops, }, }; + +const struct prci_clk_desc prci_clk_fu540 = { + .clks = __prci_init_clocks_fu540, + .num_clks = ARRAY_SIZE(__prci_init_clocks_fu540), +}; diff --git a/drivers/clk/sifive/fu540-prci.h b/drivers/clk/sifive/fu540-prci.h deleted file mode 100644 index 113301107da..00000000000 --- a/drivers/clk/sifive/fu540-prci.h +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2020-2021 SiFive, Inc. - * Zong Li - * Pragnesh Patel - */ - -#ifndef __SIFIVE_CLK_FU540_PRCI_H -#define __SIFIVE_CLK_FU540_PRCI_H - -#include "sifive-prci.h" - -#define NUM_CLOCK_FU540 4 - -extern struct __prci_clock __prci_init_clocks_fu540[NUM_CLOCK_FU540]; - -static const struct prci_clk_desc prci_clk_fu540 = { - .clks = __prci_init_clocks_fu540, - .num_clks = ARRAY_SIZE(__prci_init_clocks_fu540), -}; - -#endif /* __SIFIVE_CLK_FU540_PRCI_H */ diff --git a/drivers/clk/sifive/fu740-prci.c b/drivers/clk/sifive/fu740-prci.c index 5edc864e4bd..4274b215d2f 100644 --- a/drivers/clk/sifive/fu740-prci.c +++ b/drivers/clk/sifive/fu740-prci.c @@ -102,7 +102,7 @@ static const struct __prci_clock_ops sifive_fu740_prci_pcieaux_clk_ops = { }; /* List of clock controls provided by the PRCI */ -struct __prci_clock __prci_init_clocks_fu740[] = { +static struct __prci_clock __prci_init_clocks_fu740[] = { [FU740_PRCI_CLK_COREPLL] = { .name = "corepll", .parent_name = "hfclk", @@ -156,3 +156,8 @@ struct __prci_clock __prci_init_clocks_fu740[] = { .pwd = &__prci_pcieaux_data, } }; + +const struct prci_clk_desc prci_clk_fu740 = { + .clks = __prci_init_clocks_fu740, + .num_clks = ARRAY_SIZE(__prci_init_clocks_fu740), +}; diff --git a/drivers/clk/sifive/fu740-prci.h b/drivers/clk/sifive/fu740-prci.h deleted file mode 100644 index b74f0789061..00000000000 --- a/drivers/clk/sifive/fu740-prci.h +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2020-2021 SiFive, Inc. - * Zong Li - * Pragnesh Patel - */ - -#ifndef __SIFIVE_CLK_FU740_PRCI_H -#define __SIFIVE_CLK_FU740_PRCI_H - -#include "sifive-prci.h" - -#define NUM_CLOCK_FU740 9 - -extern struct __prci_clock __prci_init_clocks_fu740[NUM_CLOCK_FU740]; - -static const struct prci_clk_desc prci_clk_fu740 = { - .clks = __prci_init_clocks_fu740, - .num_clks = ARRAY_SIZE(__prci_init_clocks_fu740), -}; - -#endif /* __SIFIVE_CLK_FU740_PRCI_H */ diff --git a/drivers/clk/sifive/sifive-prci.c b/drivers/clk/sifive/sifive-prci.c index 5ea86062800..aa26d3a109b 100644 --- a/drivers/clk/sifive/sifive-prci.c +++ b/drivers/clk/sifive/sifive-prci.c @@ -33,8 +33,7 @@ #include #include -#include "fu540-prci.h" -#include "fu740-prci.h" +#include "sifive-prci.h" /* * Private functions diff --git a/drivers/clk/sifive/sifive-prci.h b/drivers/clk/sifive/sifive-prci.h index 5ce33d61846..b391698081d 100644 --- a/drivers/clk/sifive/sifive-prci.h +++ b/drivers/clk/sifive/sifive-prci.h @@ -320,4 +320,8 @@ unsigned long sifive_prci_hfpclkplldiv_recalc_rate(struct __prci_clock *pc, int sifive_prci_clock_enable(struct __prci_clock *pc, bool enable); +/* Clock driver data */ +extern const struct prci_clk_desc prci_clk_fu540; +extern const struct prci_clk_desc prci_clk_fu740; + #endif /* __SIFIVE_CLK_SIFIVE_PRCI_H */ From e0495c9186a429220eb342e415b9db57f097ef3d Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sat, 20 Jul 2024 01:11:58 +0200 Subject: [PATCH 3/8] board: fix compatible property Milk-V Mars CM For the Milk-V Mars CM (lite) we have only been copying sizeof(void *) bytes to the compatible property instead of the whole string list. Fixes: de3229599d4f ("board: add support for Milk-V Mars CM") Reported-by: E Shattow Signed-off-by: Heinrich Schuchardt Reviewed-by: Leo Yu-Chi Liang --- board/starfive/visionfive2/spl.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/board/starfive/visionfive2/spl.c b/board/starfive/visionfive2/spl.c index b794b73b6bd..f55c6b5d34c 100644 --- a/board/starfive/visionfive2/spl.c +++ b/board/starfive/visionfive2/spl.c @@ -170,23 +170,32 @@ void spl_fdt_fixup_mars_cm(void *fdt) { const char *compat; const char *model; + int compat_size; spl_fdt_fixup_mars(fdt); if (!get_mmc_size_from_eeprom()) { int offset; + static const char + compat_cm_lite[] = "milkv,mars-cm-lite\0starfive,jh7110"; model = "Milk-V Mars CM Lite"; - compat = "milkv,mars-cm-lite\0starfive,jh7110"; + compat = compat_cm_lite; + compat_size = sizeof(compat_cm_lite); offset = fdt_path_offset(fdt, "/soc/pinctrl/mmc0-pins/mmc0-pins-rest"); /* GPIOMUX(22, GPOUT_SYS_SDIO0_RST, GPOEN_ENABLE, GPI_NONE) */ fdt_setprop_u32(fdt, offset, "pinmux", 0xff130016); } else { + static const char + compat_cm[] = "milkv,mars-cm\0starfive,jh7110"; + model = "Milk-V Mars CM"; - compat = "milkv,mars-cm\0starfive,jh7110"; + compat = compat_cm; + compat_size = sizeof(compat_cm); } - fdt_setprop(fdt, fdt_path_offset(fdt, "/"), "compatible", compat, sizeof(compat)); + fdt_setprop(fdt, fdt_path_offset(fdt, "/"), + "compatible", compat, compat_size); fdt_setprop_string(fdt, fdt_path_offset(fdt, "/"), "model", model); } From bbbb2ef4a7e8ea2f0300765b4a560053e5ffa669 Mon Sep 17 00:00:00 2001 From: Maxim Kochetkov Date: Fri, 26 Jul 2024 15:07:21 +0300 Subject: [PATCH 4/8] riscv: define find_{first,next}_zero_bit in asm/bitops.h These seem to be missing, and trying to build fastboot cmd without them is causing errors due to these being missing. Signed-off-by: Maxim Kochetkov Tested-by: E Shattow --- arch/riscv/include/asm/bitops.h | 40 +++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/riscv/include/asm/bitops.h b/arch/riscv/include/asm/bitops.h index 35f1368b837..2f2994c4ddc 100644 --- a/arch/riscv/include/asm/bitops.h +++ b/arch/riscv/include/asm/bitops.h @@ -138,6 +138,43 @@ static inline unsigned long ffz(unsigned long word) return k; } +static inline int find_next_zero_bit(void *addr, int size, int offset) +{ + unsigned long *p = ((unsigned long *)addr) + (offset / BITS_PER_LONG); + unsigned long result = offset & ~(BITS_PER_LONG - 1); + unsigned long tmp; + + if (offset >= size) + return size; + size -= result; + offset &= (BITS_PER_LONG - 1); + if (offset) { + tmp = *(p++); + tmp |= ~0UL >> (BITS_PER_LONG - offset); + if (size < BITS_PER_LONG) + goto found_first; + if (~tmp) + goto found_middle; + size -= BITS_PER_LONG; + result += BITS_PER_LONG; + } + while (size & ~(BITS_PER_LONG - 1)) { + tmp = *(p++); + if (~tmp) + goto found_middle; + result += BITS_PER_LONG; + size -= BITS_PER_LONG; + } + if (!size) + return result; + tmp = *p; + +found_first: + tmp |= ~0UL << size; +found_middle: + return result + ffz(tmp); +} + /* * ffs: find first bit set. This is defined the same way as * the libc and compiler builtin ffs routines, therefore @@ -158,6 +195,9 @@ static inline unsigned long ffz(unsigned long word) #define hweight16(x) generic_hweight16(x) #define hweight8(x) generic_hweight8(x) +#define find_first_zero_bit(addr, size) \ + find_next_zero_bit((addr), (size), 0) + #define test_and_set_bit __test_and_set_bit #define test_and_clear_bit __test_and_clear_bit From aeff27c0aa48de2a64603ef6c4c9d0561de8a754 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sun, 11 Aug 2024 11:51:09 +0200 Subject: [PATCH 5/8] riscv: CONFIG_SPL_FRAMEPOINTER must depend on CONFIG_SPL The CONFIG_SPL_FRAMEPOINTER symbol is only relevant in SPL. Signed-off-by: Heinrich Schuchardt Reviewed-by: Leo Yu-Chi Liang Reviewed-by: Ben Dooks --- arch/riscv/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index fa3b016c527..4e228a659f2 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -133,6 +133,7 @@ config FRAMEPOINTER config SPL_FRAMEPOINTER bool "Build SPL with frame pointer for stack unwinding" + depends on SPL help Choose this option to use the frame pointer so the stack can be unwound if needed. This is useful for tracing where faults came From 73e73f04b79480ff1ee9e73aa68794f3f9c0e047 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sun, 11 Aug 2024 13:01:03 +0200 Subject: [PATCH 6/8] riscv: allow to enable SHOW_REGS in main U-Boot only To minimize SPL size it is reasonable to disable SHOW_REGS. For main U-Boot the size restrictions are much more relaxed. * Provide separate Kconfig symbols for SPL and main U-Boot. * Add a help text. Signed-off-by: Heinrich Schuchardt Reviewed-by: Leo Yu-Chi Liang --- arch/riscv/Kconfig | 12 ++++++++++++ arch/riscv/lib/interrupts.c | 7 +++---- 2 files changed, 15 insertions(+), 4 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 4e228a659f2..fd1f5f87b63 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -439,6 +439,18 @@ config AVAILABLE_HARTS config SHOW_REGS bool "Show registers on unhandled exception" + help + By default only the program counter and the return address register + are shown in crash dumps. Enable this symbol to show all registers in + main U-Boot. + +config SPL_SHOW_REGS + bool "In SPL show registers on unhandled exception" + depends on SPL + help + By default only the program counter and the return address register + are shown in crash dumps. Enable this symbol to show all registers in + SPL. config RISCV_PRIV_1_9 bool "Use version 1.9 of the RISC-V priviledged specification" diff --git a/arch/riscv/lib/interrupts.c b/arch/riscv/lib/interrupts.c index f9a1428a486..714cc92d03e 100644 --- a/arch/riscv/lib/interrupts.c +++ b/arch/riscv/lib/interrupts.c @@ -34,9 +34,8 @@ static void show_efi_loaded_images(uintptr_t epc) efi_print_image_infos((void *)epc); } -static void show_regs(struct pt_regs *regs) +static void __maybe_unused show_regs(struct pt_regs *regs) { -#ifdef CONFIG_SHOW_REGS printf("\nSP: " REG_FMT " GP: " REG_FMT " TP: " REG_FMT "\n", regs->sp, regs->gp, regs->tp); printf("T0: " REG_FMT " T1: " REG_FMT " T2: " REG_FMT "\n", @@ -57,7 +56,6 @@ static void show_regs(struct pt_regs *regs) regs->s10, regs->s11, regs->t3); printf("T4: " REG_FMT " T5: " REG_FMT " T6: " REG_FMT "\n", regs->t4, regs->t5, regs->t6); -#endif } static void __maybe_unused show_backtrace(struct pt_regs *regs) @@ -157,7 +155,8 @@ static void _exit_trap(ulong code, ulong epc, ulong tval, struct pt_regs *regs) printf("EPC: " REG_FMT " RA: " REG_FMT " reloc adjusted\n", epc - gd->reloc_off, regs->ra - gd->reloc_off); - show_regs(regs); + if (CONFIG_IS_ENABLED(SHOW_REGS)) + show_regs(regs); if (CONFIG_IS_ENABLED(FRAMEPOINTER)) show_backtrace(regs); show_code(epc); From 4a36d217bb131ec82cdb9a010221d6ae420aaf1b Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sun, 11 Aug 2024 13:01:04 +0200 Subject: [PATCH 7/8] riscv: show registers in crash dumps by default If an exception occurs in main U-Boot, show the registers. This makes analyzing crashes especially in external applications easier. Signed-off-by: Heinrich Schuchardt Reviewed-by: Leo Yu-Chi Liang --- arch/riscv/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index fd1f5f87b63..876bec35bc1 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -438,6 +438,7 @@ config AVAILABLE_HARTS If disable this, it will send IPI by CPUs node numbers of device tree. config SHOW_REGS + default y bool "Show registers on unhandled exception" help By default only the program counter and the return address register From 1806fed0ce6b56365ecf6b84ce6d17aafd3af979 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sun, 11 Aug 2024 16:41:23 +0200 Subject: [PATCH 8/8] cmd: add rdcycle test to RISC-V exception command Some versions of KVM don't allow access to the cycle CSR. Provide a command 'exception rdcycle' for testing. If the cycle CSR is accessible, we get an output like: => exception rdcycle cycle = 0x41f7563de If the cycle CSR is not accessible, we get an output like: => exception rdcycle Unhandled exception: Illegal instruction Put subcommands into alphabetical order in long help. Signed-off-by: Heinrich Schuchardt Reviewed-by: Leo Yu-Chi Liang --- cmd/riscv/exception.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/cmd/riscv/exception.c b/cmd/riscv/exception.c index 2b58b1c449c..16e335327f1 100644 --- a/cmd/riscv/exception.c +++ b/cmd/riscv/exception.c @@ -36,6 +36,14 @@ static int do_ialign16(struct cmd_tbl *cmdtp, int flag, int argc, return CMD_RET_SUCCESS; } +static int do_rdcycle(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + printf("cycle = 0x%lx\n", csr_read(CSR_CYCLE)); + + return CMD_RET_SUCCESS; +} + static int do_unaligned(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { @@ -62,6 +70,8 @@ static struct cmd_tbl cmd_sub[] = { "", ""), U_BOOT_CMD_MKENT(ialign16, CONFIG_SYS_MAXARGS, 1, do_ialign16, "", ""), + U_BOOT_CMD_MKENT(rdcycle, CONFIG_SYS_MAXARGS, 1, do_rdcycle, + "", ""), U_BOOT_CMD_MKENT(unaligned, CONFIG_SYS_MAXARGS, 1, do_unaligned, "", ""), U_BOOT_CMD_MKENT(undefined, CONFIG_SYS_MAXARGS, 1, do_undefined, @@ -74,7 +84,8 @@ U_BOOT_LONGHELP(exception, " compressed - compressed instruction\n" " ebreak - breakpoint\n" " ialign16 - 16 bit aligned instruction\n" - " undefined - illegal instruction\n" - " unaligned - load address misaligned\n"); + " rdcycle - read cycle CSR\n" + " unaligned - load address misaligned\n" + " undefined - illegal instruction\n"); #include