From d545fe3b82ca319f699abb40f59f7ab5f8116de5 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 2 Mar 2024 23:54:02 +0100 Subject: [PATCH 01/15] fdt: Fix bootm_low handling According to README CFG_SYS_BOOTMAPSZ section, in case both "bootm_low" and "bootm_size" variables are defined, "bootm_mapsize" variable is not defined and CFG_SYS_BOOTMAPSZ macro is not defined, all data for the Linux kernel must be between "bootm_low" and "bootm_low" + "bootm_size". Currently, for systems with DRAM between 0x4000_0000..0x7fff_ffff and with e.g. bootm_low=0x60000000 and bootm_size=0x10000000, the code will attempt to reserve memory from 0x4000_0000..0x4fff_ffff, which is incorrect. This is because "bootm_low" is not taken into consideration correctly. The last parameter of lmb_alloc_base() is the maximum physical address of the to be reserved LMB area. Currently this is the start of DRAM bank that is considered for LMB area reservation + min(DRAM bank size, bootm_size). In case bootm_low is set to non-zero, this maximum physical address has to be shifted upward, to min(DRAM bank start + size, bootm_low + bootm_size), otherwise the reserved memory may be below bootm_low address. In case of multiple DRAM banks, the current change reserves top part of the first bank, and reserves the rest of memory in the follow up banks. Signed-off-by: Marek Vasut --- boot/image-fdt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/boot/image-fdt.c b/boot/image-fdt.c index 75bdd55f326..5e4aa9de0d2 100644 --- a/boot/image-fdt.c +++ b/boot/image-fdt.c @@ -217,14 +217,14 @@ int boot_relocate_fdt(struct lmb *lmb, char **of_flat_tree, ulong *of_size) if (start + size < low) continue; - usable = min(size, (u64)mapsize); + usable = min(start + size, (u64)(low + mapsize)); /* * At least part of this DRAM bank is usable, try * using it for LMB allocation. */ of_start = map_sysmem((ulong)lmb_alloc_base(lmb, - of_len, 0x1000, start + usable), of_len); + of_len, 0x1000, usable), of_len); /* Allocation succeeded, use this block. */ if (of_start != NULL) break; From 24c4ac842ef4cb727f380634242a3aa3bff949a5 Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Mon, 4 Mar 2024 10:04:15 +0300 Subject: [PATCH 02/15] Kconfig: move CONFIG_32/64BIT to arch/Kconfig These configs are used in multiple places so put them in a shared Kconfig file. Signed-off-by: Dan Carpenter Reviewed-by: Tom Rini --- arch/Kconfig | 6 ++++++ arch/mips/Kconfig | 6 ------ arch/riscv/Kconfig | 6 ------ 3 files changed, 6 insertions(+), 12 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index 0d3cce919f8..f9aaf372478 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -20,6 +20,12 @@ config SYS_CACHE_SHIFT_6 config SYS_CACHE_SHIFT_7 bool +config 32BIT + bool + +config 64BIT + bool + config SYS_CACHELINE_SIZE int default 128 if SYS_CACHE_SHIFT_7 diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index f0704d97f79..eb7f3ad2376 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -473,12 +473,6 @@ config MIPS_TUNE_74KC config MIPS_TUNE_OCTEON3 bool -config 32BIT - bool - -config 64BIT - bool - config SWAP_IO_SPACE bool diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index ac52c5e6daf..6c26f91f166 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -288,12 +288,6 @@ endmenu config RISCV_ISA_A def_bool y -config 32BIT - bool - -config 64BIT - bool - config DMA_ADDR_T_64BIT bool default y if 64BIT From 0cff87c90c676d0e5c5b59553a2a982782f024bb Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Mon, 4 Mar 2024 10:04:29 +0300 Subject: [PATCH 03/15] arm64: Enable CONFIG_64BIT for static analysis In the Makefile there is a line that says this: # the checker needs the correct machine size CHECKFLAGS += $(if $(CONFIG_64BIT),-m64,-m32) Set CONFIG_64BIT for ARM64 so that we pass -m64 to the static checkers instead of -m32. Signed-off-by: Dan Carpenter --- arch/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 85f0111fcfe..2105c1e1307 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -6,6 +6,7 @@ config SYS_ARCH config ARM64 bool + select 64BIT select PHYS_64BIT select SYS_CACHE_SHIFT_6 imply SPL_SEPARATE_BSS From 12ccdcd79bddace90dfb6080084b0e36a6d44b37 Mon Sep 17 00:00:00 2001 From: Weizhao Ouyang Date: Mon, 4 Mar 2024 14:42:40 +0000 Subject: [PATCH 04/15] firmware: psci: Fix bind_smccc_features psci check According to PSCI specification DEN0022F, PSCI_FEATURES is used to check whether the SMCCC is implemented by discovering SMCCC_VERSION. Signed-off-by: Weizhao Ouyang --- drivers/firmware/psci.c | 5 ++++- include/linux/arm-smccc.h | 6 ++++++ 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c index c6b9efab41c..03544d76ed4 100644 --- a/drivers/firmware/psci.c +++ b/drivers/firmware/psci.c @@ -135,10 +135,13 @@ static int bind_smccc_features(struct udevice *dev, int psci_method) PSCI_VERSION_MAJOR(psci_0_2_get_version()) == 0) return 0; - if (request_psci_features(ARM_SMCCC_ARCH_FEATURES) == + if (request_psci_features(ARM_SMCCC_VERSION) == PSCI_RET_NOT_SUPPORTED) return 0; + if (invoke_psci_fn(ARM_SMCCC_VERSION, 0, 0, 0) < ARM_SMCCC_VERSION_1_1) + return 0; + if (psci_method == PSCI_METHOD_HVC) pdata->invoke_fn = smccc_invoke_hvc; else diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index f44e9e8f930..da3d29aabee 100644 --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -55,8 +55,14 @@ #define ARM_SMCCC_QUIRK_NONE 0 #define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */ +#define ARM_SMCCC_VERSION 0x80000000 #define ARM_SMCCC_ARCH_FEATURES 0x80000001 +#define ARM_SMCCC_VERSION_1_0 0x10000 +#define ARM_SMCCC_VERSION_1_1 0x10001 +#define ARM_SMCCC_VERSION_1_2 0x10002 +#define ARM_SMCCC_VERSION_1_3 0x10003 + #define ARM_SMCCC_RET_NOT_SUPPORTED ((unsigned long)-1) #ifndef __ASSEMBLY__ From 1da4d327d49bb068bdc69974e0dee1391dfb30e6 Mon Sep 17 00:00:00 2001 From: Weizhao Ouyang Date: Mon, 4 Mar 2024 14:42:41 +0000 Subject: [PATCH 05/15] driver: rng: Fix SMCCC TRNG crash Fix a SMCCC TRNG null pointer crash due to a failed smccc feature binding. Fixes: 53355bb86c25 ("drivers: rng: add smccc trng driver") Reviewed-by: Heinrich Schuchardt Signed-off-by: Weizhao Ouyang --- drivers/rng/smccc_trng.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/rng/smccc_trng.c b/drivers/rng/smccc_trng.c index 5bb7ebe8a49..f59b80666b3 100644 --- a/drivers/rng/smccc_trng.c +++ b/drivers/rng/smccc_trng.c @@ -165,7 +165,7 @@ static int smccc_trng_probe(struct udevice *dev) struct smccc_trng_priv *priv = dev_get_priv(dev); struct arm_smccc_res res; - if (!(smccc_trng_is_supported(smccc->invoke_fn))) + if (!smccc || !(smccc_trng_is_supported(smccc->invoke_fn))) return -ENODEV; /* At least one of 64bit and 32bit interfaces is available */ From 9a6e975c7c41f2fb67d7ef11fceb28942a4a4b4c Mon Sep 17 00:00:00 2001 From: Weizhao Ouyang Date: Mon, 4 Mar 2024 14:42:42 +0000 Subject: [PATCH 06/15] cmd: rng: Add rng list command The 'rng list' command probes all RNG devices and list those devices that are successfully probed. Also update the help info. Reviewed-by: Heinrich Schuchardt Signed-off-by: Weizhao Ouyang --- cmd/rng.c | 23 ++++++++++++++++++----- doc/usage/cmd/rng.rst | 14 ++++++++++---- 2 files changed, 28 insertions(+), 9 deletions(-) diff --git a/cmd/rng.c b/cmd/rng.c index 52f722c7af8..b073a6c8492 100644 --- a/cmd/rng.c +++ b/cmd/rng.c @@ -19,6 +19,22 @@ static int do_rng(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) struct udevice *dev; int ret = CMD_RET_SUCCESS; + if (argc == 2 && !strcmp(argv[1], "list")) { + int idx = 0; + + uclass_foreach_dev_probe(UCLASS_RNG, dev) { + idx++; + printf("RNG #%d - %s\n", dev->seq_, dev->name); + } + + if (!idx) { + log_err("No RNG device\n"); + return CMD_RET_FAILURE; + } + + return CMD_RET_SUCCESS; + } + switch (argc) { case 1: devnum = 0; @@ -56,12 +72,9 @@ static int do_rng(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) return ret; } -U_BOOT_LONGHELP(rng, - "[dev [n]]\n" - " - print n random bytes(max 64) read from dev\n"); - U_BOOT_CMD( rng, 3, 0, do_rng, "print bytes from the hardware random number generator", - rng_help_text + "list - list all the probed rng devices\n" + "rng [dev] [n] - print n random bytes(max 64) read from dev\n" ); diff --git a/doc/usage/cmd/rng.rst b/doc/usage/cmd/rng.rst index 274e4d88df3..4a61e33d272 100644 --- a/doc/usage/cmd/rng.rst +++ b/doc/usage/cmd/rng.rst @@ -11,16 +11,22 @@ Synopsis :: - rng [devnum [n]] + rng list + rng [dev] [n] -Description ------------ +rng list +-------- + +List all the probed rng devices. + +rng [dev] [n] +------------- The *rng* command reads the random number generator(RNG) device and prints the random bytes read on the console. A maximum of 64 bytes can be read in one invocation of the command. -devnum +dev The RNG device from which the random bytes are to be read. Defaults to 0. From efdf91c8eac143ff332c64ce58186f68ba396ae6 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 4 Mar 2024 10:26:17 -0500 Subject: [PATCH 07/15] boards: Remove empty BOARD_SPECIFIC_OPTIONS While there are currently uses for a stanza of "config BOARD_SPECIFIC_OPTIONS" followed by "def_bool y" and a series of select/imply statements, having this option set followed by nothing else doesn't provide anything. Remove these stanzas. Signed-off-by: Tom Rini --- board/anbernic/rgxx3_rk3566/Kconfig | 3 --- board/chipspark/popmetal_rk3288/Kconfig | 3 --- board/edgeble/neural-compute-module-6/Kconfig | 3 --- board/elgin/elgin_rv1108/Kconfig | 3 --- board/firefly/firefly-rk3288/Kconfig | 3 --- board/firefly/firefly-rk3308/Kconfig | 3 --- board/firefly/roc-pc-rk3399/Kconfig | 3 --- board/friendlyelec/nanopc-t6-rk3588/Kconfig | 3 --- board/geekbuying/geekbox/Kconfig | 3 --- board/google/gru/Kconfig | 6 ------ board/google/veyron/Kconfig | 12 ------------ board/hardkernel/odroid_go2/Kconfig | 3 --- board/hardkernel/odroid_m1/Kconfig | 3 --- board/mqmaker/miqi_rk3288/Kconfig | 3 --- board/phytec/phycore_rk3288/Kconfig | 3 --- board/pine64/pinebook-pro-rk3399/Kconfig | 3 --- board/pine64/pinephone-pro-rk3399/Kconfig | 3 --- board/pine64/quartz64_rk3566/Kconfig | 3 --- board/pine64/quartzpro64-rk3588/Kconfig | 3 --- board/pine64/rockpro64_rk3399/Kconfig | 3 --- board/radxa/rock/Kconfig | 3 --- board/radxa/rock2/Kconfig | 3 --- board/radxa/rock5a-rk3588s/Kconfig | 3 --- board/radxa/rock5b-rk3588/Kconfig | 3 --- board/rikomagic/mk808/Kconfig | 3 --- board/rockchip/evb_px30/Kconfig | 3 --- board/rockchip/evb_px5/Kconfig | 3 --- board/rockchip/evb_rk3036/Kconfig | 3 --- board/rockchip/evb_rk3128/Kconfig | 3 --- board/rockchip/evb_rk3229/Kconfig | 3 --- board/rockchip/evb_rk3288/Kconfig | 3 --- board/rockchip/evb_rk3308/Kconfig | 3 --- board/rockchip/evb_rk3328/Kconfig | 3 --- board/rockchip/evb_rk3399/Kconfig | 3 --- board/rockchip/evb_rk3568/Kconfig | 3 --- board/rockchip/evb_rk3588/Kconfig | 3 --- board/rockchip/evb_rv1108/Kconfig | 3 --- board/rockchip/kylin_rk3036/Kconfig | 3 --- board/rockchip/sheep_rk3368/Kconfig | 3 --- board/rockchip/tinker_rk3288/Kconfig | 3 --- board/theobroma-systems/lion_rk3368/Kconfig | 3 --- board/turing/turing-rk1-rk3588/Kconfig | 3 --- board/vamrs/rock960_rk3399/Kconfig | 3 --- 43 files changed, 141 deletions(-) diff --git a/board/anbernic/rgxx3_rk3566/Kconfig b/board/anbernic/rgxx3_rk3566/Kconfig index 6743a28a2f5..b5ee67c16b7 100644 --- a/board/anbernic/rgxx3_rk3566/Kconfig +++ b/board/anbernic/rgxx3_rk3566/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "anbernic-rgxx3-rk3566" -config BOARD_SPECIFIC_OPTIONS - def_bool y - endif diff --git a/board/chipspark/popmetal_rk3288/Kconfig b/board/chipspark/popmetal_rk3288/Kconfig index a5f404306a8..22228aecdea 100644 --- a/board/chipspark/popmetal_rk3288/Kconfig +++ b/board/chipspark/popmetal_rk3288/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "popmetal_rk3288" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/edgeble/neural-compute-module-6/Kconfig b/board/edgeble/neural-compute-module-6/Kconfig index c445454dded..05de14f93c8 100644 --- a/board/edgeble/neural-compute-module-6/Kconfig +++ b/board/edgeble/neural-compute-module-6/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "neural-compute-module-6" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/elgin/elgin_rv1108/Kconfig b/board/elgin/elgin_rv1108/Kconfig index be9243164aa..e942e133aa0 100644 --- a/board/elgin/elgin_rv1108/Kconfig +++ b/board/elgin/elgin_rv1108/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "elgin_rv1108" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/firefly/firefly-rk3288/Kconfig b/board/firefly/firefly-rk3288/Kconfig index 1c2bca86824..ed1c9fcb643 100644 --- a/board/firefly/firefly-rk3288/Kconfig +++ b/board/firefly/firefly-rk3288/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "firefly-rk3288" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/firefly/firefly-rk3308/Kconfig b/board/firefly/firefly-rk3308/Kconfig index 80b1ad85a2e..fd6b981c4f7 100644 --- a/board/firefly/firefly-rk3308/Kconfig +++ b/board/firefly/firefly-rk3308/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "firefly_rk3308" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/firefly/roc-pc-rk3399/Kconfig b/board/firefly/roc-pc-rk3399/Kconfig index 720fbbb5fa3..c211e9d3c79 100644 --- a/board/firefly/roc-pc-rk3399/Kconfig +++ b/board/firefly/roc-pc-rk3399/Kconfig @@ -9,8 +9,5 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "roc-pc-rk3399" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/friendlyelec/nanopc-t6-rk3588/Kconfig b/board/friendlyelec/nanopc-t6-rk3588/Kconfig index 032ef486108..e86a94c5909 100644 --- a/board/friendlyelec/nanopc-t6-rk3588/Kconfig +++ b/board/friendlyelec/nanopc-t6-rk3588/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "nanopc-t6-rk3588" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/geekbuying/geekbox/Kconfig b/board/geekbuying/geekbox/Kconfig index 41aa8fbe03d..ac5aedf46ad 100644 --- a/board/geekbuying/geekbox/Kconfig +++ b/board/geekbuying/geekbox/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "geekbox" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/google/gru/Kconfig b/board/google/gru/Kconfig index 1455e1481dc..c84ebaf3cc1 100644 --- a/board/google/gru/Kconfig +++ b/board/google/gru/Kconfig @@ -9,9 +9,6 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "gru" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif if TARGET_CHROMEBOOK_KEVIN @@ -25,7 +22,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "gru" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/google/veyron/Kconfig b/board/google/veyron/Kconfig index 7f55d78dacb..e24a2aeee04 100644 --- a/board/google/veyron/Kconfig +++ b/board/google/veyron/Kconfig @@ -9,9 +9,6 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "veyron" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif if TARGET_CHROMEBIT_MICKEY @@ -25,9 +22,6 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "veyron" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif if TARGET_CHROMEBOOK_MINNIE @@ -41,9 +35,6 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "veyron" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif if TARGET_CHROMEBOOK_SPEEDY @@ -57,7 +48,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "veyron" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/hardkernel/odroid_go2/Kconfig b/board/hardkernel/odroid_go2/Kconfig index cf3f7c91d92..82988dffb3c 100644 --- a/board/hardkernel/odroid_go2/Kconfig +++ b/board/hardkernel/odroid_go2/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "odroid_go2" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/hardkernel/odroid_m1/Kconfig b/board/hardkernel/odroid_m1/Kconfig index 999c4944a83..0217c91d7b7 100644 --- a/board/hardkernel/odroid_m1/Kconfig +++ b/board/hardkernel/odroid_m1/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "odroid_m1" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/mqmaker/miqi_rk3288/Kconfig b/board/mqmaker/miqi_rk3288/Kconfig index 232a1120907..bb687c973fb 100644 --- a/board/mqmaker/miqi_rk3288/Kconfig +++ b/board/mqmaker/miqi_rk3288/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "miqi_rk3288" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/phytec/phycore_rk3288/Kconfig b/board/phytec/phycore_rk3288/Kconfig index 57cd8e26ed7..09753ef238f 100644 --- a/board/phytec/phycore_rk3288/Kconfig +++ b/board/phytec/phycore_rk3288/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "phycore_rk3288" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/pine64/pinebook-pro-rk3399/Kconfig b/board/pine64/pinebook-pro-rk3399/Kconfig index 3bb7ca448e4..3eedbcdd49d 100644 --- a/board/pine64/pinebook-pro-rk3399/Kconfig +++ b/board/pine64/pinebook-pro-rk3399/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "pinebook-pro-rk3399" -config BOARD_SPECIFIC_OPTIONS - def_bool y - endif diff --git a/board/pine64/pinephone-pro-rk3399/Kconfig b/board/pine64/pinephone-pro-rk3399/Kconfig index 13d6465ae6e..5f207df6dea 100644 --- a/board/pine64/pinephone-pro-rk3399/Kconfig +++ b/board/pine64/pinephone-pro-rk3399/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "pinephone-pro-rk3399" -config BOARD_SPECIFIC_OPTIONS - def_bool y - endif diff --git a/board/pine64/quartz64_rk3566/Kconfig b/board/pine64/quartz64_rk3566/Kconfig index 3de1d8f7a99..104b7a1598e 100644 --- a/board/pine64/quartz64_rk3566/Kconfig +++ b/board/pine64/quartz64_rk3566/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "quartz64_rk3566" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/pine64/quartzpro64-rk3588/Kconfig b/board/pine64/quartzpro64-rk3588/Kconfig index 96aa7921d32..4147240e4e4 100644 --- a/board/pine64/quartzpro64-rk3588/Kconfig +++ b/board/pine64/quartzpro64-rk3588/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "quartzpro64-rk3588" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/pine64/rockpro64_rk3399/Kconfig b/board/pine64/rockpro64_rk3399/Kconfig index 3353f1fd095..93aab57de68 100644 --- a/board/pine64/rockpro64_rk3399/Kconfig +++ b/board/pine64/rockpro64_rk3399/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "rockpro64_rk3399" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/radxa/rock/Kconfig b/board/radxa/rock/Kconfig index 855b9b6954a..c9c4576f264 100644 --- a/board/radxa/rock/Kconfig +++ b/board/radxa/rock/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "rock" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/radxa/rock2/Kconfig b/board/radxa/rock2/Kconfig index c2ff9e99632..82ecabac5a1 100644 --- a/board/radxa/rock2/Kconfig +++ b/board/radxa/rock2/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "rock2" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/radxa/rock5a-rk3588s/Kconfig b/board/radxa/rock5a-rk3588s/Kconfig index 2d7fc85df4f..82013adf013 100644 --- a/board/radxa/rock5a-rk3588s/Kconfig +++ b/board/radxa/rock5a-rk3588s/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "rock5a-rk3588s" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/radxa/rock5b-rk3588/Kconfig b/board/radxa/rock5b-rk3588/Kconfig index 8f1444649af..41dfe2402b1 100644 --- a/board/radxa/rock5b-rk3588/Kconfig +++ b/board/radxa/rock5b-rk3588/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "rock5b-rk3588" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/rikomagic/mk808/Kconfig b/board/rikomagic/mk808/Kconfig index 4abad7e7500..61c27d2b4d8 100644 --- a/board/rikomagic/mk808/Kconfig +++ b/board/rikomagic/mk808/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "mk808" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/rockchip/evb_px30/Kconfig b/board/rockchip/evb_px30/Kconfig index 0042c8e4db1..03ed8088ca6 100644 --- a/board/rockchip/evb_px30/Kconfig +++ b/board/rockchip/evb_px30/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "evb_px30" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/rockchip/evb_px5/Kconfig b/board/rockchip/evb_px5/Kconfig index 9a04ee7e616..7a42b4a21b1 100644 --- a/board/rockchip/evb_px5/Kconfig +++ b/board/rockchip/evb_px5/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "evb_px5" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/rockchip/evb_rk3036/Kconfig b/board/rockchip/evb_rk3036/Kconfig index ef45f629252..4abe8cff33a 100644 --- a/board/rockchip/evb_rk3036/Kconfig +++ b/board/rockchip/evb_rk3036/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "evb_rk3036" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/rockchip/evb_rk3128/Kconfig b/board/rockchip/evb_rk3128/Kconfig index 5b3095ade99..c36691cc8c5 100644 --- a/board/rockchip/evb_rk3128/Kconfig +++ b/board/rockchip/evb_rk3128/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "evb_rk3128" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/rockchip/evb_rk3229/Kconfig b/board/rockchip/evb_rk3229/Kconfig index 361dcb18603..f5862d5678c 100644 --- a/board/rockchip/evb_rk3229/Kconfig +++ b/board/rockchip/evb_rk3229/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "evb_rk3229" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/rockchip/evb_rk3288/Kconfig b/board/rockchip/evb_rk3288/Kconfig index 8ab07f41fa6..0707486d2a8 100644 --- a/board/rockchip/evb_rk3288/Kconfig +++ b/board/rockchip/evb_rk3288/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "evb_rk3288" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/rockchip/evb_rk3308/Kconfig b/board/rockchip/evb_rk3308/Kconfig index 0074429cb6d..b12d7f8d73a 100644 --- a/board/rockchip/evb_rk3308/Kconfig +++ b/board/rockchip/evb_rk3308/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "evb_rk3308" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/rockchip/evb_rk3328/Kconfig b/board/rockchip/evb_rk3328/Kconfig index ef446b49dda..1e084bdcd39 100644 --- a/board/rockchip/evb_rk3328/Kconfig +++ b/board/rockchip/evb_rk3328/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "evb_rk3328" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/rockchip/evb_rk3399/Kconfig b/board/rockchip/evb_rk3399/Kconfig index 412b81cbee9..597b0a68b5b 100644 --- a/board/rockchip/evb_rk3399/Kconfig +++ b/board/rockchip/evb_rk3399/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "evb_rk3399" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/rockchip/evb_rk3568/Kconfig b/board/rockchip/evb_rk3568/Kconfig index f3d3a7e1112..ab710c58d3b 100644 --- a/board/rockchip/evb_rk3568/Kconfig +++ b/board/rockchip/evb_rk3568/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "evb_rk3568" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/rockchip/evb_rk3588/Kconfig b/board/rockchip/evb_rk3588/Kconfig index d38efe61d83..5e15d2e9cce 100644 --- a/board/rockchip/evb_rk3588/Kconfig +++ b/board/rockchip/evb_rk3588/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "evb_rk3588" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/rockchip/evb_rv1108/Kconfig b/board/rockchip/evb_rv1108/Kconfig index 4a76e0b9fa9..91afefd8b79 100644 --- a/board/rockchip/evb_rv1108/Kconfig +++ b/board/rockchip/evb_rv1108/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "evb_rv1108" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/rockchip/kylin_rk3036/Kconfig b/board/rockchip/kylin_rk3036/Kconfig index 8d35b4e62bd..debffe15c78 100644 --- a/board/rockchip/kylin_rk3036/Kconfig +++ b/board/rockchip/kylin_rk3036/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "kylin_rk3036" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/rockchip/sheep_rk3368/Kconfig b/board/rockchip/sheep_rk3368/Kconfig index d39b5e8b1aa..321bf814859 100644 --- a/board/rockchip/sheep_rk3368/Kconfig +++ b/board/rockchip/sheep_rk3368/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "sheep_rk3368" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/rockchip/tinker_rk3288/Kconfig b/board/rockchip/tinker_rk3288/Kconfig index bca6c37bc94..04a9f1405a4 100644 --- a/board/rockchip/tinker_rk3288/Kconfig +++ b/board/rockchip/tinker_rk3288/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "tinker_rk3288" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/theobroma-systems/lion_rk3368/Kconfig b/board/theobroma-systems/lion_rk3368/Kconfig index fddbf826df1..537a2e7d9af 100644 --- a/board/theobroma-systems/lion_rk3368/Kconfig +++ b/board/theobroma-systems/lion_rk3368/Kconfig @@ -9,9 +9,6 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "lion_rk3368" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - config ENV_SIZE default 0x2000 diff --git a/board/turing/turing-rk1-rk3588/Kconfig b/board/turing/turing-rk1-rk3588/Kconfig index 4c6cd6af343..0def6e0d7cd 100644 --- a/board/turing/turing-rk1-rk3588/Kconfig +++ b/board/turing/turing-rk1-rk3588/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "turing-rk1-rk3588" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif diff --git a/board/vamrs/rock960_rk3399/Kconfig b/board/vamrs/rock960_rk3399/Kconfig index cacc53f3780..0c052c6fec4 100644 --- a/board/vamrs/rock960_rk3399/Kconfig +++ b/board/vamrs/rock960_rk3399/Kconfig @@ -9,7 +9,4 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "rock960_rk3399" -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - endif From 44951340309d0dca73c05fc61406a1e839d1da93 Mon Sep 17 00:00:00 2001 From: Hanyuan Zhao Date: Tue, 5 Mar 2024 15:37:33 +0800 Subject: [PATCH 08/15] cli: panic when failed to allocate memory for the history buffer This commit simply modifies the history initialize function, replacing the return value by panic with reasons. The calling chains of hist_init don't have steps explicitly throwing or dealing with the ENOMEM error, and once the init fails, the whole system is died. Using panic here to provide error information instead. Signed-off-by: Hanyuan Zhao --- common/cli_readline.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/cli_readline.c b/common/cli_readline.c index 2507be22952..99e7efdfe55 100644 --- a/common/cli_readline.c +++ b/common/cli_readline.c @@ -110,7 +110,7 @@ static int hist_init(void) hist = calloc(HIST_MAX, HIST_SIZE + 1); if (!hist) - return -ENOMEM; + panic("%s: calloc: out of memory!\n", __func__); for (i = 0; i < HIST_MAX; i++) hist_list[i] = hist + (i * (HIST_SIZE + 1)); From 421359ac52bfc80946929c4ffeacf6a68273e758 Mon Sep 17 00:00:00 2001 From: Hanyuan Zhao Date: Tue, 5 Mar 2024 15:37:35 +0800 Subject: [PATCH 09/15] cli: allow users to determine history buffer allocation method This commit allows users to choose the appropriate memory allocation method between static allocated and dynamically calloc. The previous static-array way will not obviously contribute to the final binary size since it is uninitialized, and might have better performance than the dynamical one. Now we provide the users with both the two options. Signed-off-by: Hanyuan Zhao --- cmd/Kconfig | 11 +++++++++++ common/cli_readline.c | 36 +++++++++++++++++++++++++----------- 2 files changed, 36 insertions(+), 11 deletions(-) diff --git a/cmd/Kconfig b/cmd/Kconfig index 102f62ac89d..bd5464a4989 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -189,6 +189,17 @@ config CMD_HISTORY Show the command-line history, i.e. a list of commands that are in the history buffer. +config CMD_HISTORY_USE_CALLOC + bool "dynamically allocate memory" + default y + depends on CMD_HISTORY + help + Saying Y to this will use calloc to get the space for history + storing. Otherwise the history buffer will be an uninitialized + static array directly, without the memory allocation, and it is + writable after relocation to RAM. If u-boot is running from ROM + all the time or unsure, say Y to this. + config CMD_LICENSE bool "license" select BUILD_BIN2C diff --git a/common/cli_readline.c b/common/cli_readline.c index 99e7efdfe55..cf4339d0e50 100644 --- a/common/cli_readline.c +++ b/common/cli_readline.c @@ -86,6 +86,9 @@ static int hist_add_idx; static int hist_cur = -1; static unsigned hist_num; +#ifndef CONFIG_CMD_HISTORY_USE_CALLOC +static char hist_data[HIST_MAX][HIST_SIZE + 1]; +#endif static char *hist_list[HIST_MAX]; #define add_idx_minus_one() ((hist_add_idx == 0) ? hist_max : hist_add_idx-1) @@ -100,20 +103,26 @@ static void getcmd_putchars(int count, int ch) static int hist_init(void) { - unsigned char *hist; int i; - hist_max = 0; - hist_add_idx = 0; - hist_cur = -1; - hist_num = 0; - - hist = calloc(HIST_MAX, HIST_SIZE + 1); +#ifndef CONFIG_CMD_HISTORY_USE_CALLOC + for (i = 0; i < HIST_MAX; i++) { + hist_list[i] = hist_data[i]; + hist_list[i][0] = '\0'; + } +#else + unsigned char *hist = calloc(HIST_MAX, HIST_SIZE + 1); if (!hist) panic("%s: calloc: out of memory!\n", __func__); for (i = 0; i < HIST_MAX; i++) hist_list[i] = hist + (i * (HIST_SIZE + 1)); +#endif + + hist_max = 0; + hist_add_idx = 0; + hist_cur = -1; + hist_num = 0; return 0; } @@ -643,10 +652,15 @@ int cli_readline_into_buffer(const char *const prompt, char *buffer, static int initted; /* - * History uses a global array which is not - * writable until after relocation to RAM. - * Revert to non-history version if still - * running from flash. + * Say N to CMD_HISTORY_USE_CALLOC will skip runtime + * allocation for the history buffer and directly + * use an uninitialized static array as the buffer. + * Doing this might have better performance and not + * increase the binary file's size, as it only marks + * the size. However, the array is only writable after + * relocation to RAM. If u-boot is running from ROM + * all the time, consider say Y to CMD_HISTORY_USE_CALLOC + * or disable CMD_HISTORY. */ if (IS_ENABLED(CONFIG_CMDLINE_EDITING) && (gd->flags & GD_FLG_RELOC)) { if (!initted) { From 7554388c1d10e3b44714cb8e4cbcc17f20141eec Mon Sep 17 00:00:00 2001 From: Caleb Connolly Date: Tue, 5 Mar 2024 14:55:13 +0000 Subject: [PATCH 10/15] initcall: break loop immediately on failure The current ordering always results in func pointing to the next function in the init_sequence. e.g. if fdtdec_setup() fails, ret will be set to the error code, then func will be updated to point to initf_malloc(), only then is ret checked and the loop broken. The end result of this is that the "initcall failed at ..." error will point you to initf_malloc(), when the error actually occured in fdtdec_setup()! This can be quite confusing and result in a lot of time wasted debugging code that has nothing to do with the failure (ask me how I know :P). Adjust the for loop to check ret immediately after the call and break early so that func will correctly reference the failed function. Signed-off-by: Caleb Connolly Reviewed-by: Dan Carpenter --- lib/initcall.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/lib/initcall.c b/lib/initcall.c index ce317af213a..c8e2b0f6a38 100644 --- a/lib/initcall.c +++ b/lib/initcall.c @@ -55,7 +55,7 @@ int initcall_run_list(const init_fnc_t init_sequence[]) init_fnc_t func; int ret = 0; - for (ptr = init_sequence; func = *ptr, !ret && func; ptr++) { + for (ptr = init_sequence; func = *ptr, func; ptr++) { type = initcall_is_event(func); if (type) { @@ -71,6 +71,8 @@ int initcall_run_list(const init_fnc_t init_sequence[]) } ret = type ? event_notify_null(type) : func(); + if (ret) + break; } if (ret) { From 5b05266928cd18e6bc94583dd41809e0b66ed87a Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Tue, 5 Mar 2024 10:19:37 -0600 Subject: [PATCH 11/15] arm: dts: k3-am64: Move to OF_UPSTREAM Enable OF_UPSTREAM for AM64-EVM and SK-AM64 boards. Remove DT files that are now available in dts/upstream. Update the appended files based on version of latest OF_UPSTREAM sync point (v6.7-rc7). Signed-off-by: Andrew Davis --- arch/arm/dts/Makefile | 4 +- arch/arm/dts/k3-am64-main.dtsi | 1546 ------------------------- arch/arm/dts/k3-am64-mcu.dtsi | 161 --- arch/arm/dts/k3-am64-thermal.dtsi | 33 - arch/arm/dts/k3-am64.dtsi | 100 -- arch/arm/dts/k3-am642-evm-u-boot.dtsi | 110 -- arch/arm/dts/k3-am642-evm.dts | 690 ----------- arch/arm/dts/k3-am642-r5-evm.dts | 24 - arch/arm/dts/k3-am642-r5-sk.dts | 12 - arch/arm/dts/k3-am642-sk-u-boot.dtsi | 94 -- arch/arm/dts/k3-am642-sk.dts | 642 ---------- arch/arm/dts/k3-am642.dtsi | 66 -- arch/arm/dts/k3-am64x-binman.dtsi | 6 +- configs/am64x_evm_a53_defconfig | 5 +- 14 files changed, 7 insertions(+), 3486 deletions(-) delete mode 100644 arch/arm/dts/k3-am64-main.dtsi delete mode 100644 arch/arm/dts/k3-am64-mcu.dtsi delete mode 100644 arch/arm/dts/k3-am64-thermal.dtsi delete mode 100644 arch/arm/dts/k3-am64.dtsi delete mode 100644 arch/arm/dts/k3-am642-evm.dts delete mode 100644 arch/arm/dts/k3-am642-sk.dts delete mode 100644 arch/arm/dts/k3-am642.dtsi diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index a965a70f37c..51c83efe89b 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1418,9 +1418,7 @@ dtb-$(CONFIG_SOC_K3_J721S2) += k3-am68-sk-base-board.dtb\ dtb-$(CONFIG_SOC_K3_J784S4) += k3-am69-r5-sk.dtb \ k3-j784s4-r5-evm.dtb -dtb-$(CONFIG_SOC_K3_AM642) += k3-am642-evm.dtb \ - k3-am642-r5-evm.dtb \ - k3-am642-sk.dtb \ +dtb-$(CONFIG_SOC_K3_AM642) += k3-am642-r5-evm.dtb \ k3-am642-r5-sk.dtb \ k3-am642-phyboard-electra-rdk.dtb \ k3-am642-r5-phycore-som-2gb.dtb diff --git a/arch/arm/dts/k3-am64-main.dtsi b/arch/arm/dts/k3-am64-main.dtsi deleted file mode 100644 index 0df54a74182..00000000000 --- a/arch/arm/dts/k3-am64-main.dtsi +++ /dev/null @@ -1,1546 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for AM642 SoC Family Main Domain peripherals - * - * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ - */ - -#include -#include - -/ { - serdes_refclk: clock-cmnrefclk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <0>; - }; -}; - -&cbass_main { - oc_sram: sram@70000000 { - compatible = "mmio-sram"; - reg = <0x00 0x70000000 0x00 0x200000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x00 0x70000000 0x200000>; - - tfa-sram@1c0000 { - reg = <0x1c0000 0x20000>; - }; - - dmsc-sram@1e0000 { - reg = <0x1e0000 0x1c000>; - }; - - sproxy-sram@1fc000 { - reg = <0x1fc000 0x4000>; - }; - }; - - main_conf: syscon@43000000 { - compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; - reg = <0x0 0x43000000 0x0 0x20000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x0 0x43000000 0x20000>; - - chipid@14 { - compatible = "ti,am654-chipid"; - reg = <0x00000014 0x4>; - }; - - serdes_ln_ctrl: mux-controller { - compatible = "mmio-mux"; - #mux-control-cells = <1>; - mux-reg-masks = <0x4080 0x3>; /* SERDES0 lane0 select */ - }; - - phy_gmii_sel: phy@4044 { - compatible = "ti,am654-phy-gmii-sel"; - reg = <0x4044 0x8>; - #phy-cells = <1>; - }; - - epwm_tbclk: clock-controller@4140 { - compatible = "ti,am64-epwm-tbclk"; - reg = <0x4130 0x4>; - #clock-cells = <1>; - }; - }; - - gic500: interrupt-controller@1800000 { - compatible = "arm,gic-v3"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - #interrupt-cells = <3>; - interrupt-controller; - reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */ - <0x00 0x01840000 0x00 0xC0000>, /* GICR */ - <0x01 0x00000000 0x00 0x2000>, /* GICC */ - <0x01 0x00010000 0x00 0x1000>, /* GICH */ - <0x01 0x00020000 0x00 0x2000>; /* GICV */ - /* - * vcpumntirq: - * virtual CPU interface maintenance interrupt - */ - interrupts = ; - - gic_its: msi-controller@1820000 { - compatible = "arm,gic-v3-its"; - reg = <0x00 0x01820000 0x00 0x10000>; - socionext,synquacer-pre-its = <0x1000000 0x400000>; - msi-controller; - #msi-cells = <1>; - }; - }; - - dmss: bus@48000000 { - compatible = "simple-mfd"; - #address-cells = <2>; - #size-cells = <2>; - dma-ranges; - ranges = <0x00 0x48000000 0x00 0x48000000 0x00 0x06400000>; - - ti,sci-dev-id = <25>; - - secure_proxy_main: mailbox@4d000000 { - compatible = "ti,am654-secure-proxy"; - #mbox-cells = <1>; - reg-names = "target_data", "rt", "scfg"; - reg = <0x00 0x4d000000 0x00 0x80000>, - <0x00 0x4a600000 0x00 0x80000>, - <0x00 0x4a400000 0x00 0x80000>; - interrupt-names = "rx_012"; - interrupts = ; - }; - - inta_main_dmss: interrupt-controller@48000000 { - compatible = "ti,sci-inta"; - reg = <0x00 0x48000000 0x00 0x100000>; - #interrupt-cells = <0>; - interrupt-controller; - interrupt-parent = <&gic500>; - msi-controller; - ti,sci = <&dmsc>; - ti,sci-dev-id = <28>; - ti,interrupt-ranges = <4 68 36>; - ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>; - }; - - main_bcdma: dma-controller@485c0100 { - compatible = "ti,am64-dmss-bcdma"; - reg = <0x00 0x485c0100 0x00 0x100>, - <0x00 0x4c000000 0x00 0x20000>, - <0x00 0x4a820000 0x00 0x20000>, - <0x00 0x4aa40000 0x00 0x20000>, - <0x00 0x4bc00000 0x00 0x100000>; - reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt"; - msi-parent = <&inta_main_dmss>; - #dma-cells = <3>; - - ti,sci = <&dmsc>; - ti,sci-dev-id = <26>; - ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */ - ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */ - ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */ - }; - - main_pktdma: dma-controller@485c0000 { - compatible = "ti,am64-dmss-pktdma"; - reg = <0x00 0x485c0000 0x00 0x100>, - <0x00 0x4a800000 0x00 0x20000>, - <0x00 0x4aa00000 0x00 0x40000>, - <0x00 0x4b800000 0x00 0x400000>; - reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt"; - msi-parent = <&inta_main_dmss>; - #dma-cells = <2>; - - ti,sci = <&dmsc>; - ti,sci-dev-id = <30>; - ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */ - <0x24>, /* CPSW_TX_CHAN */ - <0x25>, /* SAUL_TX_0_CHAN */ - <0x26>, /* SAUL_TX_1_CHAN */ - <0x27>, /* ICSSG_0_TX_CHAN */ - <0x28>; /* ICSSG_1_TX_CHAN */ - ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */ - <0x11>, /* RING_CPSW_TX_CHAN */ - <0x12>, /* RING_SAUL_TX_0_CHAN */ - <0x13>, /* RING_SAUL_TX_1_CHAN */ - <0x14>, /* RING_ICSSG_0_TX_CHAN */ - <0x15>; /* RING_ICSSG_1_TX_CHAN */ - ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */ - <0x2b>, /* CPSW_RX_CHAN */ - <0x2d>, /* SAUL_RX_0_CHAN */ - <0x2f>, /* SAUL_RX_1_CHAN */ - <0x31>, /* SAUL_RX_2_CHAN */ - <0x33>, /* SAUL_RX_3_CHAN */ - <0x35>, /* ICSSG_0_RX_CHAN */ - <0x37>; /* ICSSG_1_RX_CHAN */ - ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */ - <0x2c>, /* FLOW_CPSW_RX_CHAN */ - <0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */ - <0x32>, /* FLOW_SAUL_RX_2/3_CHAN */ - <0x36>, /* FLOW_ICSSG_0_RX_CHAN */ - <0x38>; /* FLOW_ICSSG_1_RX_CHAN */ - }; - }; - - dmsc: system-controller@44043000 { - compatible = "ti,k2g-sci"; - ti,host-id = <12>; - mbox-names = "rx", "tx"; - mboxes = <&secure_proxy_main 12>, - <&secure_proxy_main 13>; - reg-names = "debug_messages"; - reg = <0x00 0x44043000 0x00 0xfe0>; - - k3_pds: power-controller { - compatible = "ti,sci-pm-domain"; - #power-domain-cells = <2>; - }; - - k3_clks: clock-controller { - compatible = "ti,k2g-sci-clk"; - #clock-cells = <2>; - }; - - k3_reset: reset-controller { - compatible = "ti,sci-reset"; - #reset-cells = <2>; - }; - }; - - main_pmx0: pinctrl@f4000 { - compatible = "pinctrl-single"; - reg = <0x00 0xf4000 0x00 0x2d0>; - #pinctrl-cells = <1>; - pinctrl-single,register-width = <32>; - pinctrl-single,function-mask = <0xffffffff>; - }; - - main_timer0: timer@2400000 { - compatible = "ti,am654-timer"; - reg = <0x00 0x2400000 0x00 0x400>; - interrupts = ; - clocks = <&k3_clks 36 1>; - clock-names = "fck"; - assigned-clocks = <&k3_clks 36 1>; - assigned-clock-parents = <&k3_clks 36 2>; - power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>; - ti,timer-pwm; - }; - - main_timer1: timer@2410000 { - compatible = "ti,am654-timer"; - reg = <0x00 0x2410000 0x00 0x400>; - interrupts = ; - clocks = <&k3_clks 37 1>; - clock-names = "fck"; - assigned-clocks = <&k3_clks 37 1>; - assigned-clock-parents = <&k3_clks 37 2>; - power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>; - ti,timer-pwm; - }; - - main_timer2: timer@2420000 { - compatible = "ti,am654-timer"; - reg = <0x00 0x2420000 0x00 0x400>; - interrupts = ; - clocks = <&k3_clks 38 1>; - clock-names = "fck"; - assigned-clocks = <&k3_clks 38 1>; - assigned-clock-parents = <&k3_clks 38 2>; - power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>; - ti,timer-pwm; - }; - - main_timer3: timer@2430000 { - compatible = "ti,am654-timer"; - reg = <0x00 0x2430000 0x00 0x400>; - interrupts = ; - clocks = <&k3_clks 39 1>; - clock-names = "fck"; - assigned-clocks = <&k3_clks 39 1>; - assigned-clock-parents = <&k3_clks 39 2>; - power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>; - ti,timer-pwm; - }; - - main_timer4: timer@2440000 { - compatible = "ti,am654-timer"; - reg = <0x00 0x2440000 0x00 0x400>; - interrupts = ; - clocks = <&k3_clks 40 1>; - clock-names = "fck"; - assigned-clocks = <&k3_clks 40 1>; - assigned-clock-parents = <&k3_clks 40 2>; - power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>; - ti,timer-pwm; - }; - - main_timer5: timer@2450000 { - compatible = "ti,am654-timer"; - reg = <0x00 0x2450000 0x00 0x400>; - interrupts = ; - clocks = <&k3_clks 41 1>; - clock-names = "fck"; - assigned-clocks = <&k3_clks 41 1>; - assigned-clock-parents = <&k3_clks 41 2>; - power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>; - ti,timer-pwm; - }; - - main_timer6: timer@2460000 { - compatible = "ti,am654-timer"; - reg = <0x00 0x2460000 0x00 0x400>; - interrupts = ; - clocks = <&k3_clks 42 1>; - clock-names = "fck"; - assigned-clocks = <&k3_clks 42 1>; - assigned-clock-parents = <&k3_clks 42 2>; - power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>; - ti,timer-pwm; - }; - - main_timer7: timer@2470000 { - compatible = "ti,am654-timer"; - reg = <0x00 0x2470000 0x00 0x400>; - interrupts = ; - clocks = <&k3_clks 43 1>; - clock-names = "fck"; - assigned-clocks = <&k3_clks 43 1>; - assigned-clock-parents = <&k3_clks 43 2>; - power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>; - ti,timer-pwm; - }; - - main_timer8: timer@2480000 { - compatible = "ti,am654-timer"; - reg = <0x00 0x2480000 0x00 0x400>; - interrupts = ; - clocks = <&k3_clks 44 1>; - clock-names = "fck"; - assigned-clocks = <&k3_clks 44 1>; - assigned-clock-parents = <&k3_clks 44 2>; - power-domains = <&k3_pds 44 TI_SCI_PD_EXCLUSIVE>; - ti,timer-pwm; - }; - - main_timer9: timer@2490000 { - compatible = "ti,am654-timer"; - reg = <0x00 0x2490000 0x00 0x400>; - interrupts = ; - clocks = <&k3_clks 45 1>; - clock-names = "fck"; - assigned-clocks = <&k3_clks 45 1>; - assigned-clock-parents = <&k3_clks 45 2>; - power-domains = <&k3_pds 45 TI_SCI_PD_EXCLUSIVE>; - ti,timer-pwm; - }; - - main_timer10: timer@24a0000 { - compatible = "ti,am654-timer"; - reg = <0x00 0x24a0000 0x00 0x400>; - interrupts = ; - clocks = <&k3_clks 46 1>; - clock-names = "fck"; - assigned-clocks = <&k3_clks 46 1>; - assigned-clock-parents = <&k3_clks 46 2>; - power-domains = <&k3_pds 46 TI_SCI_PD_EXCLUSIVE>; - ti,timer-pwm; - }; - - main_timer11: timer@24b0000 { - compatible = "ti,am654-timer"; - reg = <0x00 0x24b0000 0x00 0x400>; - interrupts = ; - clocks = <&k3_clks 47 1>; - clock-names = "fck"; - assigned-clocks = <&k3_clks 47 1>; - assigned-clock-parents = <&k3_clks 47 2>; - power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>; - ti,timer-pwm; - }; - - main_esm: esm@420000 { - compatible = "ti,j721e-esm"; - reg = <0x00 0x420000 0x00 0x1000>; - ti,esm-pins = <160>, <161>; - }; - - main_uart0: serial@2800000 { - compatible = "ti,am64-uart", "ti,am654-uart"; - reg = <0x00 0x02800000 0x00 0x100>; - interrupts = ; - clock-frequency = <48000000>; - power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 146 0>; - clock-names = "fclk"; - status = "disabled"; - }; - - main_uart1: serial@2810000 { - compatible = "ti,am64-uart", "ti,am654-uart"; - reg = <0x00 0x02810000 0x00 0x100>; - interrupts = ; - clock-frequency = <48000000>; - power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 152 0>; - clock-names = "fclk"; - status = "disabled"; - }; - - main_uart2: serial@2820000 { - compatible = "ti,am64-uart", "ti,am654-uart"; - reg = <0x00 0x02820000 0x00 0x100>; - interrupts = ; - clock-frequency = <48000000>; - power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 153 0>; - clock-names = "fclk"; - status = "disabled"; - }; - - main_uart3: serial@2830000 { - compatible = "ti,am64-uart", "ti,am654-uart"; - reg = <0x00 0x02830000 0x00 0x100>; - interrupts = ; - clock-frequency = <48000000>; - power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 154 0>; - clock-names = "fclk"; - status = "disabled"; - }; - - main_uart4: serial@2840000 { - compatible = "ti,am64-uart", "ti,am654-uart"; - reg = <0x00 0x02840000 0x00 0x100>; - interrupts = ; - clock-frequency = <48000000>; - power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 155 0>; - clock-names = "fclk"; - status = "disabled"; - }; - - main_uart5: serial@2850000 { - compatible = "ti,am64-uart", "ti,am654-uart"; - reg = <0x00 0x02850000 0x00 0x100>; - interrupts = ; - clock-frequency = <48000000>; - power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 156 0>; - clock-names = "fclk"; - status = "disabled"; - }; - - main_uart6: serial@2860000 { - compatible = "ti,am64-uart", "ti,am654-uart"; - reg = <0x00 0x02860000 0x00 0x100>; - interrupts = ; - clock-frequency = <48000000>; - power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 158 0>; - clock-names = "fclk"; - status = "disabled"; - }; - - main_i2c0: i2c@20000000 { - compatible = "ti,am64-i2c", "ti,omap4-i2c"; - reg = <0x00 0x20000000 0x00 0x100>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 102 2>; - clock-names = "fck"; - status = "disabled"; - }; - - main_i2c1: i2c@20010000 { - compatible = "ti,am64-i2c", "ti,omap4-i2c"; - reg = <0x00 0x20010000 0x00 0x100>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 103 2>; - clock-names = "fck"; - status = "disabled"; - }; - - main_i2c2: i2c@20020000 { - compatible = "ti,am64-i2c", "ti,omap4-i2c"; - reg = <0x00 0x20020000 0x00 0x100>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 104 2>; - clock-names = "fck"; - status = "disabled"; - }; - - main_i2c3: i2c@20030000 { - compatible = "ti,am64-i2c", "ti,omap4-i2c"; - reg = <0x00 0x20030000 0x00 0x100>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 105 2>; - clock-names = "fck"; - status = "disabled"; - }; - - main_spi0: spi@20100000 { - compatible = "ti,am654-mcspi", "ti,omap4-mcspi"; - reg = <0x00 0x20100000 0x00 0x400>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 141 0>; - dmas = <&main_pktdma 0xc300 0>, <&main_pktdma 0x4300 0>; - dma-names = "tx0", "rx0"; - status = "disabled"; - }; - - main_spi1: spi@20110000 { - compatible = "ti,am654-mcspi","ti,omap4-mcspi"; - reg = <0x00 0x20110000 0x00 0x400>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 142 0>; - status = "disabled"; - }; - - main_spi2: spi@20120000 { - compatible = "ti,am654-mcspi","ti,omap4-mcspi"; - reg = <0x00 0x20120000 0x00 0x400>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 143 0>; - status = "disabled"; - }; - - main_spi3: spi@20130000 { - compatible = "ti,am654-mcspi","ti,omap4-mcspi"; - reg = <0x00 0x20130000 0x00 0x400>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&k3_pds 144 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 144 0>; - status = "disabled"; - }; - - main_spi4: spi@20140000 { - compatible = "ti,am654-mcspi","ti,omap4-mcspi"; - reg = <0x00 0x20140000 0x00 0x400>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&k3_pds 145 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 145 0>; - status = "disabled"; - }; - - main_gpio_intr: interrupt-controller@a00000 { - compatible = "ti,sci-intr"; - reg = <0x00 0x00a00000 0x00 0x800>; - ti,intr-trigger-type = <1>; - interrupt-controller; - interrupt-parent = <&gic500>; - #interrupt-cells = <1>; - ti,sci = <&dmsc>; - ti,sci-dev-id = <3>; - ti,interrupt-ranges = <0 32 16>; - }; - - main_gpio0: gpio@600000 { - compatible = "ti,am64-gpio", "ti,keystone-gpio"; - reg = <0x0 0x00600000 0x0 0x100>; - gpio-controller; - #gpio-cells = <2>; - interrupt-parent = <&main_gpio_intr>; - interrupts = <190>, <191>, <192>, - <193>, <194>, <195>; - interrupt-controller; - #interrupt-cells = <2>; - ti,ngpio = <87>; - ti,davinci-gpio-unbanked = <0>; - power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 77 0>; - clock-names = "gpio"; - }; - - main_gpio1: gpio@601000 { - compatible = "ti,am64-gpio", "ti,keystone-gpio"; - reg = <0x0 0x00601000 0x0 0x100>; - gpio-controller; - #gpio-cells = <2>; - interrupt-parent = <&main_gpio_intr>; - interrupts = <180>, <181>, <182>, - <183>, <184>, <185>; - interrupt-controller; - #interrupt-cells = <2>; - ti,ngpio = <88>; - ti,davinci-gpio-unbanked = <0>; - power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 78 0>; - clock-names = "gpio"; - }; - - sdhci0: mmc@fa10000 { - compatible = "ti,am64-sdhci-8bit"; - reg = <0x00 0xfa10000 0x00 0x260>, <0x00 0xfa18000 0x00 0x134>; - interrupts = ; - power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 57 0>, <&k3_clks 57 1>; - clock-names = "clk_ahb", "clk_xin"; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - ti,trm-icp = <0x2>; - ti,otap-del-sel-legacy = <0x0>; - ti,otap-del-sel-mmc-hs = <0x0>; - ti,otap-del-sel-ddr52 = <0x6>; - ti,otap-del-sel-hs200 = <0x7>; - }; - - sdhci1: mmc@fa00000 { - compatible = "ti,am64-sdhci-4bit"; - reg = <0x00 0xfa00000 0x00 0x260>, <0x00 0xfa08000 0x00 0x134>; - interrupts = ; - power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 58 3>, <&k3_clks 58 4>; - clock-names = "clk_ahb", "clk_xin"; - ti,trm-icp = <0x2>; - ti,otap-del-sel-legacy = <0x0>; - ti,otap-del-sel-sd-hs = <0xf>; - ti,otap-del-sel-sdr12 = <0xf>; - ti,otap-del-sel-sdr25 = <0xf>; - ti,otap-del-sel-sdr50 = <0xc>; - ti,otap-del-sel-sdr104 = <0x6>; - ti,otap-del-sel-ddr50 = <0x9>; - ti,clkbuf-sel = <0x7>; - }; - - cpsw3g: ethernet@8000000 { - compatible = "ti,am642-cpsw-nuss"; - #address-cells = <2>; - #size-cells = <2>; - reg = <0x0 0x8000000 0x0 0x200000>; - reg-names = "cpsw_nuss"; - ranges = <0x0 0x0 0x0 0x8000000 0x0 0x200000>; - clocks = <&k3_clks 13 0>; - assigned-clocks = <&k3_clks 13 1>; - assigned-clock-parents = <&k3_clks 13 9>; - clock-names = "fck"; - power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>; - - dmas = <&main_pktdma 0xC500 15>, - <&main_pktdma 0xC501 15>, - <&main_pktdma 0xC502 15>, - <&main_pktdma 0xC503 15>, - <&main_pktdma 0xC504 15>, - <&main_pktdma 0xC505 15>, - <&main_pktdma 0xC506 15>, - <&main_pktdma 0xC507 15>, - <&main_pktdma 0x4500 15>; - dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", - "tx7", "rx"; - - ethernet-ports { - #address-cells = <1>; - #size-cells = <0>; - - cpsw_port1: port@1 { - reg = <1>; - ti,mac-only; - label = "port1"; - phys = <&phy_gmii_sel 1>; - mac-address = [00 00 00 00 00 00]; - ti,syscon-efuse = <&main_conf 0x200>; - }; - - cpsw_port2: port@2 { - reg = <2>; - ti,mac-only; - label = "port2"; - phys = <&phy_gmii_sel 2>; - mac-address = [00 00 00 00 00 00]; - }; - }; - - cpsw3g_mdio: mdio@f00 { - compatible = "ti,cpsw-mdio","ti,davinci_mdio"; - reg = <0x0 0xf00 0x0 0x100>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&k3_clks 13 0>; - clock-names = "fck"; - bus_freq = <1000000>; - status = "disabled"; - }; - - cpts@3d000 { - compatible = "ti,j721e-cpts"; - reg = <0x0 0x3d000 0x0 0x400>; - clocks = <&k3_clks 13 1>; - clock-names = "cpts"; - interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "cpts"; - ti,cpts-ext-ts-inputs = <4>; - ti,cpts-periodic-outputs = <2>; - }; - }; - - main_cpts0: cpts@39000000 { - compatible = "ti,j721e-cpts"; - reg = <0x0 0x39000000 0x0 0x400>; - reg-names = "cpts"; - power-domains = <&k3_pds 84 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 84 0>; - clock-names = "cpts"; - assigned-clocks = <&k3_clks 84 0>; - assigned-clock-parents = <&k3_clks 84 8>; - interrupts = ; - interrupt-names = "cpts"; - ti,cpts-periodic-outputs = <6>; - ti,cpts-ext-ts-inputs = <8>; - }; - - timesync_router: pinctrl@a40000 { - compatible = "pinctrl-single"; - reg = <0x0 0xa40000 0x0 0x800>; - #pinctrl-cells = <1>; - pinctrl-single,register-width = <32>; - pinctrl-single,function-mask = <0x000107ff>; - }; - - usbss0: cdns-usb@f900000 { - compatible = "ti,am64-usb"; - reg = <0x00 0xf900000 0x00 0x100>; - power-domains = <&k3_pds 161 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 161 9>, <&k3_clks 161 1>; - clock-names = "ref", "lpm"; - assigned-clocks = <&k3_clks 161 9>; /* USB2_REFCLK */ - assigned-clock-parents = <&k3_clks 161 10>; /* HF0SC0 */ - #address-cells = <2>; - #size-cells = <2>; - ranges; - usb0: usb@f400000 { - compatible = "cdns,usb3"; - reg = <0x00 0xf400000 0x00 0x10000>, - <0x00 0xf410000 0x00 0x10000>, - <0x00 0xf420000 0x00 0x10000>; - reg-names = "otg", - "xhci", - "dev"; - interrupts = , /* irq.0 */ - , /* irq.6 */ - ; /* otgirq */ - interrupt-names = "host", - "peripheral", - "otg"; - maximum-speed = "super-speed"; - dr_mode = "otg"; - }; - }; - - tscadc0: tscadc@28001000 { - compatible = "ti,am654-tscadc", "ti,am3359-tscadc"; - reg = <0x00 0x28001000 0x00 0x1000>; - interrupts = ; - power-domains = <&k3_pds 0 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 0 0>; - assigned-clocks = <&k3_clks 0 0>; - assigned-clock-parents = <&k3_clks 0 3>; - assigned-clock-rates = <60000000>; - clock-names = "fck"; - status = "disabled"; - - adc { - #io-channel-cells = <1>; - compatible = "ti,am654-adc", "ti,am3359-adc"; - }; - }; - - fss: bus@fc00000 { - compatible = "simple-bus"; - reg = <0x00 0x0fc00000 0x00 0x70000>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - ospi0: spi@fc40000 { - compatible = "ti,am654-ospi", "cdns,qspi-nor"; - reg = <0x00 0x0fc40000 0x00 0x100>, - <0x05 0x00000000 0x01 0x00000000>; - interrupts = ; - cdns,fifo-depth = <256>; - cdns,fifo-width = <4>; - cdns,trigger-address = <0x0>; - #address-cells = <0x1>; - #size-cells = <0x0>; - clocks = <&k3_clks 75 6>; - assigned-clocks = <&k3_clks 75 6>; - assigned-clock-parents = <&k3_clks 75 7>; - assigned-clock-rates = <166666666>; - power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>; - status = "disabled"; - }; - }; - - hwspinlock: spinlock@2a000000 { - compatible = "ti,am64-hwspinlock"; - reg = <0x00 0x2a000000 0x00 0x1000>; - #hwlock-cells = <1>; - }; - - mailbox0_cluster2: mailbox@29020000 { - compatible = "ti,am64-mailbox"; - reg = <0x00 0x29020000 0x00 0x200>; - interrupts = , - ; - #mbox-cells = <1>; - ti,mbox-num-users = <4>; - ti,mbox-num-fifos = <16>; - status = "disabled"; - }; - - mailbox0_cluster3: mailbox@29030000 { - compatible = "ti,am64-mailbox"; - reg = <0x00 0x29030000 0x00 0x200>; - interrupts = , - ; - #mbox-cells = <1>; - ti,mbox-num-users = <4>; - ti,mbox-num-fifos = <16>; - status = "disabled"; - }; - - mailbox0_cluster4: mailbox@29040000 { - compatible = "ti,am64-mailbox"; - reg = <0x00 0x29040000 0x00 0x200>; - interrupts = , - ; - #mbox-cells = <1>; - ti,mbox-num-users = <4>; - ti,mbox-num-fifos = <16>; - status = "disabled"; - }; - - mailbox0_cluster5: mailbox@29050000 { - compatible = "ti,am64-mailbox"; - reg = <0x00 0x29050000 0x00 0x200>; - interrupts = , - ; - #mbox-cells = <1>; - ti,mbox-num-users = <4>; - ti,mbox-num-fifos = <16>; - status = "disabled"; - }; - - mailbox0_cluster6: mailbox@29060000 { - compatible = "ti,am64-mailbox"; - reg = <0x00 0x29060000 0x00 0x200>; - interrupts = ; - #mbox-cells = <1>; - ti,mbox-num-users = <4>; - ti,mbox-num-fifos = <16>; - status = "disabled"; - }; - - mailbox0_cluster7: mailbox@29070000 { - compatible = "ti,am64-mailbox"; - reg = <0x00 0x29070000 0x00 0x200>; - interrupts = ; - #mbox-cells = <1>; - ti,mbox-num-users = <4>; - ti,mbox-num-fifos = <16>; - status = "disabled"; - }; - - main_r5fss0: r5fss@78000000 { - compatible = "ti,am64-r5fss"; - ti,cluster-mode = <0>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x78000000 0x00 0x78000000 0x10000>, - <0x78100000 0x00 0x78100000 0x10000>, - <0x78200000 0x00 0x78200000 0x08000>, - <0x78300000 0x00 0x78300000 0x08000>; - power-domains = <&k3_pds 119 TI_SCI_PD_EXCLUSIVE>; - - main_r5fss0_core0: r5f@78000000 { - compatible = "ti,am64-r5f"; - reg = <0x78000000 0x00010000>, - <0x78100000 0x00010000>; - reg-names = "atcm", "btcm"; - ti,sci = <&dmsc>; - ti,sci-dev-id = <121>; - ti,sci-proc-ids = <0x01 0xff>; - resets = <&k3_reset 121 1>; - firmware-name = "am64-main-r5f0_0-fw"; - ti,atcm-enable = <1>; - ti,btcm-enable = <1>; - ti,loczrama = <1>; - }; - - main_r5fss0_core1: r5f@78200000 { - compatible = "ti,am64-r5f"; - reg = <0x78200000 0x00008000>, - <0x78300000 0x00008000>; - reg-names = "atcm", "btcm"; - ti,sci = <&dmsc>; - ti,sci-dev-id = <122>; - ti,sci-proc-ids = <0x02 0xff>; - resets = <&k3_reset 122 1>; - firmware-name = "am64-main-r5f0_1-fw"; - ti,atcm-enable = <1>; - ti,btcm-enable = <1>; - ti,loczrama = <1>; - }; - }; - - main_r5fss1: r5fss@78400000 { - compatible = "ti,am64-r5fss"; - ti,cluster-mode = <0>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x78400000 0x00 0x78400000 0x10000>, - <0x78500000 0x00 0x78500000 0x10000>, - <0x78600000 0x00 0x78600000 0x08000>, - <0x78700000 0x00 0x78700000 0x08000>; - power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>; - - main_r5fss1_core0: r5f@78400000 { - compatible = "ti,am64-r5f"; - reg = <0x78400000 0x00010000>, - <0x78500000 0x00010000>; - reg-names = "atcm", "btcm"; - ti,sci = <&dmsc>; - ti,sci-dev-id = <123>; - ti,sci-proc-ids = <0x06 0xff>; - resets = <&k3_reset 123 1>; - firmware-name = "am64-main-r5f1_0-fw"; - ti,atcm-enable = <1>; - ti,btcm-enable = <1>; - ti,loczrama = <1>; - }; - - main_r5fss1_core1: r5f@78600000 { - compatible = "ti,am64-r5f"; - reg = <0x78600000 0x00008000>, - <0x78700000 0x00008000>; - reg-names = "atcm", "btcm"; - ti,sci = <&dmsc>; - ti,sci-dev-id = <124>; - ti,sci-proc-ids = <0x07 0xff>; - resets = <&k3_reset 124 1>; - firmware-name = "am64-main-r5f1_1-fw"; - ti,atcm-enable = <1>; - ti,btcm-enable = <1>; - ti,loczrama = <1>; - }; - }; - - serdes_wiz0: wiz@f000000 { - compatible = "ti,am64-wiz-10g"; - #address-cells = <1>; - #size-cells = <1>; - power-domains = <&k3_pds 162 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 162 0>, <&k3_clks 162 1>, <&serdes_refclk>; - clock-names = "fck", "core_ref_clk", "ext_ref_clk"; - num-lanes = <1>; - #reset-cells = <1>; - #clock-cells = <1>; - ranges = <0x0f000000 0x0 0x0f000000 0x00010000>; - - assigned-clocks = <&k3_clks 162 1>; - assigned-clock-parents = <&k3_clks 162 5>; - - serdes0: serdes@f000000 { - compatible = "ti,j721e-serdes-10g"; - reg = <0x0f000000 0x00010000>; - reg-names = "torrent_phy"; - resets = <&serdes_wiz0 0>; - reset-names = "torrent_reset"; - clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, - <&serdes_wiz0 TI_WIZ_PHY_EN_REFCLK>; - clock-names = "refclk", "phy_en_refclk"; - assigned-clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, - <&serdes_wiz0 TI_WIZ_PLL1_REFCLK>, - <&serdes_wiz0 TI_WIZ_REFCLK_DIG>; - assigned-clock-parents = <&k3_clks 162 1>, - <&k3_clks 162 1>, - <&k3_clks 162 1>; - #address-cells = <1>; - #size-cells = <0>; - #clock-cells = <1>; - }; - }; - - pcie0_rc: pcie@f102000 { - compatible = "ti,am64-pcie-host", "ti,j721e-pcie-host"; - reg = <0x00 0x0f102000 0x00 0x1000>, - <0x00 0x0f100000 0x00 0x400>, - <0x00 0x0d000000 0x00 0x00800000>, - <0x00 0x68000000 0x00 0x00001000>; - reg-names = "intd_cfg", "user_cfg", "reg", "cfg"; - interrupt-names = "link_state"; - interrupts = ; - device_type = "pci"; - ti,syscon-pcie-ctrl = <&main_conf 0x4070>; - max-link-speed = <2>; - num-lanes = <1>; - power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 114 0>, <&serdes0 CDNS_TORRENT_REFCLK_DRIVER>; - clock-names = "fck", "pcie_refclk"; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x0 0xff>; - cdns,no-bar-match-nbits = <64>; - vendor-id = <0x104c>; - device-id = <0xb010>; - msi-map = <0x0 &gic_its 0x0 0x10000>; - ranges = <0x01000000 0x00 0x68001000 0x00 0x68001000 0x00 0x0010000>, - <0x02000000 0x00 0x68011000 0x00 0x68011000 0x00 0x7fef000>; - dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x00000010 0x0>; - status = "disabled"; - }; - - pcie0_ep: pcie-ep@f102000 { - compatible = "ti,am64-pcie-ep", "ti,j721e-pcie-ep"; - reg = <0x00 0x0f102000 0x00 0x1000>, - <0x00 0x0f100000 0x00 0x400>, - <0x00 0x0d000000 0x00 0x00800000>, - <0x00 0x68000000 0x00 0x08000000>; - reg-names = "intd_cfg", "user_cfg", "reg", "mem"; - interrupt-names = "link_state"; - interrupts = ; - ti,syscon-pcie-ctrl = <&main_conf 0x4070>; - max-link-speed = <2>; - num-lanes = <1>; - power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 114 0>; - clock-names = "fck"; - max-functions = /bits/ 8 <1>; - status = "disabled"; - }; - - epwm0: pwm@23000000 { - compatible = "ti,am64-epwm", "ti,am3352-ehrpwm"; - #pwm-cells = <3>; - reg = <0x0 0x23000000 0x0 0x100>; - power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>; - clocks = <&epwm_tbclk 0>, <&k3_clks 86 0>; - clock-names = "tbclk", "fck"; - status = "disabled"; - }; - - epwm1: pwm@23010000 { - compatible = "ti,am64-epwm", "ti,am3352-ehrpwm"; - #pwm-cells = <3>; - reg = <0x0 0x23010000 0x0 0x100>; - power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>; - clocks = <&epwm_tbclk 1>, <&k3_clks 87 0>; - clock-names = "tbclk", "fck"; - status = "disabled"; - }; - - epwm2: pwm@23020000 { - compatible = "ti,am64-epwm", "ti,am3352-ehrpwm"; - #pwm-cells = <3>; - reg = <0x0 0x23020000 0x0 0x100>; - power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>; - clocks = <&epwm_tbclk 2>, <&k3_clks 88 0>; - clock-names = "tbclk", "fck"; - status = "disabled"; - }; - - epwm3: pwm@23030000 { - compatible = "ti,am64-epwm", "ti,am3352-ehrpwm"; - #pwm-cells = <3>; - reg = <0x0 0x23030000 0x0 0x100>; - power-domains = <&k3_pds 89 TI_SCI_PD_EXCLUSIVE>; - clocks = <&epwm_tbclk 3>, <&k3_clks 89 0>; - clock-names = "tbclk", "fck"; - status = "disabled"; - }; - - epwm4: pwm@23040000 { - compatible = "ti,am64-epwm", "ti,am3352-ehrpwm"; - #pwm-cells = <3>; - reg = <0x0 0x23040000 0x0 0x100>; - power-domains = <&k3_pds 90 TI_SCI_PD_EXCLUSIVE>; - clocks = <&epwm_tbclk 4>, <&k3_clks 90 0>; - clock-names = "tbclk", "fck"; - status = "disabled"; - }; - - epwm5: pwm@23050000 { - compatible = "ti,am64-epwm", "ti,am3352-ehrpwm"; - #pwm-cells = <3>; - reg = <0x0 0x23050000 0x0 0x100>; - power-domains = <&k3_pds 91 TI_SCI_PD_EXCLUSIVE>; - clocks = <&epwm_tbclk 5>, <&k3_clks 91 0>; - clock-names = "tbclk", "fck"; - status = "disabled"; - }; - - epwm6: pwm@23060000 { - compatible = "ti,am64-epwm", "ti,am3352-ehrpwm"; - #pwm-cells = <3>; - reg = <0x0 0x23060000 0x0 0x100>; - power-domains = <&k3_pds 92 TI_SCI_PD_EXCLUSIVE>; - clocks = <&epwm_tbclk 6>, <&k3_clks 92 0>; - clock-names = "tbclk", "fck"; - status = "disabled"; - }; - - epwm7: pwm@23070000 { - compatible = "ti,am64-epwm", "ti,am3352-ehrpwm"; - #pwm-cells = <3>; - reg = <0x0 0x23070000 0x0 0x100>; - power-domains = <&k3_pds 93 TI_SCI_PD_EXCLUSIVE>; - clocks = <&epwm_tbclk 7>, <&k3_clks 93 0>; - clock-names = "tbclk", "fck"; - status = "disabled"; - }; - - epwm8: pwm@23080000 { - compatible = "ti,am64-epwm", "ti,am3352-ehrpwm"; - #pwm-cells = <3>; - reg = <0x0 0x23080000 0x0 0x100>; - power-domains = <&k3_pds 94 TI_SCI_PD_EXCLUSIVE>; - clocks = <&epwm_tbclk 8>, <&k3_clks 94 0>; - clock-names = "tbclk", "fck"; - status = "disabled"; - }; - - ecap0: pwm@23100000 { - compatible = "ti,am64-ecap", "ti,am3352-ecap"; - #pwm-cells = <3>; - reg = <0x0 0x23100000 0x0 0x60>; - power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 51 0>; - clock-names = "fck"; - status = "disabled"; - }; - - ecap1: pwm@23110000 { - compatible = "ti,am64-ecap", "ti,am3352-ecap"; - #pwm-cells = <3>; - reg = <0x0 0x23110000 0x0 0x60>; - power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 52 0>; - clock-names = "fck"; - status = "disabled"; - }; - - ecap2: pwm@23120000 { - compatible = "ti,am64-ecap", "ti,am3352-ecap"; - #pwm-cells = <3>; - reg = <0x0 0x23120000 0x0 0x60>; - power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 53 0>; - clock-names = "fck"; - status = "disabled"; - }; - - main_rti0: watchdog@e000000 { - compatible = "ti,j7-rti-wdt"; - reg = <0x00 0xe000000 0x00 0x100>; - clocks = <&k3_clks 125 0>; - power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>; - assigned-clocks = <&k3_clks 125 0>; - assigned-clock-parents = <&k3_clks 125 2>; - }; - - main_rti1: watchdog@e010000 { - compatible = "ti,j7-rti-wdt"; - reg = <0x00 0xe010000 0x00 0x100>; - clocks = <&k3_clks 126 0>; - power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>; - assigned-clocks = <&k3_clks 126 0>; - assigned-clock-parents = <&k3_clks 126 2>; - }; - - icssg0: icssg@30000000 { - compatible = "ti,am642-icssg"; - reg = <0x00 0x30000000 0x00 0x80000>; - power-domains = <&k3_pds 81 TI_SCI_PD_EXCLUSIVE>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x00 0x30000000 0x80000>; - - icssg0_mem: memories@0 { - reg = <0x0 0x2000>, - <0x2000 0x2000>, - <0x10000 0x10000>; - reg-names = "dram0", "dram1", "shrdram2"; - }; - - icssg0_cfg: cfg@26000 { - compatible = "ti,pruss-cfg", "syscon"; - reg = <0x26000 0x200>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x26000 0x2000>; - - clocks { - #address-cells = <1>; - #size-cells = <0>; - - icssg0_coreclk_mux: coreclk-mux@3c { - reg = <0x3c>; - #clock-cells = <0>; - clocks = <&k3_clks 81 0>, /* icssg0_core_clk */ - <&k3_clks 81 20>; /* icssg0_iclk */ - assigned-clocks = <&icssg0_coreclk_mux>; - assigned-clock-parents = <&k3_clks 81 20>; - }; - - icssg0_iepclk_mux: iepclk-mux@30 { - reg = <0x30>; - #clock-cells = <0>; - clocks = <&k3_clks 81 3>, /* icssg0_iep_clk */ - <&icssg0_coreclk_mux>; /* icssg0_coreclk_mux */ - assigned-clocks = <&icssg0_iepclk_mux>; - assigned-clock-parents = <&icssg0_coreclk_mux>; - }; - }; - }; - - icssg0_mii_rt: mii-rt@32000 { - compatible = "ti,pruss-mii", "syscon"; - reg = <0x32000 0x100>; - }; - - icssg0_mii_g_rt: mii-g-rt@33000 { - compatible = "ti,pruss-mii-g", "syscon"; - reg = <0x33000 0x1000>; - }; - - icssg0_intc: interrupt-controller@20000 { - compatible = "ti,icssg-intc"; - reg = <0x20000 0x2000>; - interrupt-controller; - #interrupt-cells = <3>; - interrupts = , - , - , - , - , - , - , - ; - interrupt-names = "host_intr0", "host_intr1", - "host_intr2", "host_intr3", - "host_intr4", "host_intr5", - "host_intr6", "host_intr7"; - }; - - pru0_0: pru@34000 { - compatible = "ti,am642-pru"; - reg = <0x34000 0x3000>, - <0x22000 0x100>, - <0x22400 0x100>; - reg-names = "iram", "control", "debug"; - firmware-name = "am64x-pru0_0-fw"; - }; - - rtu0_0: rtu@4000 { - compatible = "ti,am642-rtu"; - reg = <0x4000 0x2000>, - <0x23000 0x100>, - <0x23400 0x100>; - reg-names = "iram", "control", "debug"; - firmware-name = "am64x-rtu0_0-fw"; - }; - - tx_pru0_0: txpru@a000 { - compatible = "ti,am642-tx-pru"; - reg = <0xa000 0x1800>, - <0x25000 0x100>, - <0x25400 0x100>; - reg-names = "iram", "control", "debug"; - firmware-name = "am64x-txpru0_0-fw"; - }; - - pru0_1: pru@38000 { - compatible = "ti,am642-pru"; - reg = <0x38000 0x3000>, - <0x24000 0x100>, - <0x24400 0x100>; - reg-names = "iram", "control", "debug"; - firmware-name = "am64x-pru0_1-fw"; - }; - - rtu0_1: rtu@6000 { - compatible = "ti,am642-rtu"; - reg = <0x6000 0x2000>, - <0x23800 0x100>, - <0x23c00 0x100>; - reg-names = "iram", "control", "debug"; - firmware-name = "am64x-rtu0_1-fw"; - }; - - tx_pru0_1: txpru@c000 { - compatible = "ti,am642-tx-pru"; - reg = <0xc000 0x1800>, - <0x25800 0x100>, - <0x25c00 0x100>; - reg-names = "iram", "control", "debug"; - firmware-name = "am64x-txpru0_1-fw"; - }; - - icssg0_mdio: mdio@32400 { - compatible = "ti,davinci_mdio"; - reg = <0x32400 0x100>; - clocks = <&k3_clks 62 3>; - clock-names = "fck"; - #address-cells = <1>; - #size-cells = <0>; - bus_freq = <1000000>; - status = "disabled"; - }; - }; - - icssg1: icssg@30080000 { - compatible = "ti,am642-icssg"; - reg = <0x00 0x30080000 0x00 0x80000>; - power-domains = <&k3_pds 82 TI_SCI_PD_EXCLUSIVE>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x00 0x30080000 0x80000>; - - icssg1_mem: memories@0 { - reg = <0x0 0x2000>, - <0x2000 0x2000>, - <0x10000 0x10000>; - reg-names = "dram0", "dram1", "shrdram2"; - }; - - icssg1_cfg: cfg@26000 { - compatible = "ti,pruss-cfg", "syscon"; - reg = <0x26000 0x200>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x26000 0x2000>; - - clocks { - #address-cells = <1>; - #size-cells = <0>; - - icssg1_coreclk_mux: coreclk-mux@3c { - reg = <0x3c>; - #clock-cells = <0>; - clocks = <&k3_clks 82 0>, /* icssg1_core_clk */ - <&k3_clks 82 20>; /* icssg1_iclk */ - assigned-clocks = <&icssg1_coreclk_mux>; - assigned-clock-parents = <&k3_clks 82 20>; - }; - - icssg1_iepclk_mux: iepclk-mux@30 { - reg = <0x30>; - #clock-cells = <0>; - clocks = <&k3_clks 82 3>, /* icssg1_iep_clk */ - <&icssg1_coreclk_mux>; /* icssg1_coreclk_mux */ - assigned-clocks = <&icssg1_iepclk_mux>; - assigned-clock-parents = <&icssg1_coreclk_mux>; - }; - }; - }; - - icssg1_mii_rt: mii-rt@32000 { - compatible = "ti,pruss-mii", "syscon"; - reg = <0x32000 0x100>; - }; - - icssg1_mii_g_rt: mii-g-rt@33000 { - compatible = "ti,pruss-mii-g", "syscon"; - reg = <0x33000 0x1000>; - }; - - icssg1_intc: interrupt-controller@20000 { - compatible = "ti,icssg-intc"; - reg = <0x20000 0x2000>; - interrupt-controller; - #interrupt-cells = <3>; - interrupts = , - , - , - , - , - , - , - ; - interrupt-names = "host_intr0", "host_intr1", - "host_intr2", "host_intr3", - "host_intr4", "host_intr5", - "host_intr6", "host_intr7"; - }; - - pru1_0: pru@34000 { - compatible = "ti,am642-pru"; - reg = <0x34000 0x4000>, - <0x22000 0x100>, - <0x22400 0x100>; - reg-names = "iram", "control", "debug"; - firmware-name = "am64x-pru1_0-fw"; - }; - - rtu1_0: rtu@4000 { - compatible = "ti,am642-rtu"; - reg = <0x4000 0x2000>, - <0x23000 0x100>, - <0x23400 0x100>; - reg-names = "iram", "control", "debug"; - firmware-name = "am64x-rtu1_0-fw"; - }; - - tx_pru1_0: txpru@a000 { - compatible = "ti,am642-tx-pru"; - reg = <0xa000 0x1800>, - <0x25000 0x100>, - <0x25400 0x100>; - reg-names = "iram", "control", "debug"; - firmware-name = "am64x-txpru1_0-fw"; - }; - - pru1_1: pru@38000 { - compatible = "ti,am642-pru"; - reg = <0x38000 0x4000>, - <0x24000 0x100>, - <0x24400 0x100>; - reg-names = "iram", "control", "debug"; - firmware-name = "am64x-pru1_1-fw"; - }; - - rtu1_1: rtu@6000 { - compatible = "ti,am642-rtu"; - reg = <0x6000 0x2000>, - <0x23800 0x100>, - <0x23c00 0x100>; - reg-names = "iram", "control", "debug"; - firmware-name = "am64x-rtu1_1-fw"; - }; - - tx_pru1_1: txpru@c000 { - compatible = "ti,am642-tx-pru"; - reg = <0xc000 0x1800>, - <0x25800 0x100>, - <0x25c00 0x100>; - reg-names = "iram", "control", "debug"; - firmware-name = "am64x-txpru1_1-fw"; - }; - - icssg1_mdio: mdio@32400 { - compatible = "ti,davinci_mdio"; - reg = <0x32400 0x100>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&k3_clks 82 0>; - clock-names = "fck"; - bus_freq = <1000000>; - status = "disabled"; - }; - }; - - main_mcan0: can@20701000 { - compatible = "bosch,m_can"; - reg = <0x00 0x20701000 0x00 0x200>, - <0x00 0x20708000 0x00 0x8000>; - reg-names = "m_can", "message_ram"; - power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 98 5>, <&k3_clks 98 0>; - clock-names = "hclk", "cclk"; - interrupts = , - ; - interrupt-names = "int0", "int1"; - bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; - status = "disabled"; - }; - - main_mcan1: can@20711000 { - compatible = "bosch,m_can"; - reg = <0x00 0x20711000 0x00 0x200>, - <0x00 0x20718000 0x00 0x8000>; - reg-names = "m_can", "message_ram"; - power-domains = <&k3_pds 99 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 99 5>, <&k3_clks 99 0>; - clock-names = "hclk", "cclk"; - interrupts = , - ; - interrupt-names = "int0", "int1"; - bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; - status = "disabled"; - }; - - crypto: crypto@40900000 { - compatible = "ti,am64-sa2ul"; - reg = <0x00 0x40900000 0x00 0x1200>; - power-domains = <&k3_pds 133 TI_SCI_PD_SHARED>; - #address-cells = <2>; - #size-cells = <2>; - ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>; - dmas = <&main_pktdma 0xc001 0>, <&main_pktdma 0x4002 0>, - <&main_pktdma 0x4003 0>; - dma-names = "tx", "rx1", "rx2"; - - rng: rng@40910000 { - compatible = "inside-secure,safexcel-eip76"; - reg = <0x00 0x40910000 0x00 0x7d>; - interrupts = ; - status = "disabled"; /* Used by OP-TEE */ - }; - }; - - gpmc0: memory-controller@3b000000 { - compatible = "ti,am64-gpmc"; - power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 80 0>; - clock-names = "fck"; - reg = <0x00 0x3b000000 0x00 0x400>, - <0x00 0x50000000 0x00 0x8000000>; - reg-names = "cfg", "data"; - interrupts = ; - gpmc,num-cs = <3>; - gpmc,num-waitpins = <2>; - #address-cells = <2>; - #size-cells = <1>; - interrupt-controller; - #interrupt-cells = <2>; - gpio-controller; - #gpio-cells = <2>; - status = "disabled"; - }; - - elm0: ecc@25010000 { - compatible = "ti,am64-elm"; - reg = <0x00 0x25010000 0x00 0x2000>; - interrupts = ; - power-domains = <&k3_pds 54 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 54 0>; - clock-names = "fck"; - status = "disabled"; - }; - - main_vtm0: temperature-sensor@b00000 { - compatible = "ti,j7200-vtm"; - reg = <0x00 0xb00000 0x00 0x400>, - <0x00 0xb01000 0x00 0x400>; - power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>; - #thermal-sensor-cells = <1>; - }; -}; diff --git a/arch/arm/dts/k3-am64-mcu.dtsi b/arch/arm/dts/k3-am64-mcu.dtsi deleted file mode 100644 index 686d4979072..00000000000 --- a/arch/arm/dts/k3-am64-mcu.dtsi +++ /dev/null @@ -1,161 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for AM64 SoC Family MCU Domain peripherals - * - * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ - */ - -&cbass_mcu { - /* - * The MCU domain timer interrupts are routed only to the ESM module, - * and not currently available for Linux. The MCU domain timers are - * of limited use without interrupts, and likely reserved by the ESM. - */ - mcu_timer0: timer@4800000 { - compatible = "ti,am654-timer"; - reg = <0x00 0x4800000 0x00 0x400>; - clocks = <&k3_clks 35 1>; - clock-names = "fck"; - power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>; - ti,timer-pwm; - status = "reserved"; - }; - - mcu_timer1: timer@4810000 { - compatible = "ti,am654-timer"; - reg = <0x00 0x4810000 0x00 0x400>; - clocks = <&k3_clks 48 1>; - clock-names = "fck"; - power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>; - ti,timer-pwm; - status = "reserved"; - }; - - mcu_timer2: timer@4820000 { - compatible = "ti,am654-timer"; - reg = <0x00 0x4820000 0x00 0x400>; - clocks = <&k3_clks 49 1>; - clock-names = "fck"; - power-domains = <&k3_pds 49 TI_SCI_PD_EXCLUSIVE>; - ti,timer-pwm; - status = "reserved"; - }; - - mcu_timer3: timer@4830000 { - compatible = "ti,am654-timer"; - reg = <0x00 0x4830000 0x00 0x400>; - clocks = <&k3_clks 50 1>; - clock-names = "fck"; - power-domains = <&k3_pds 50 TI_SCI_PD_EXCLUSIVE>; - ti,timer-pwm; - status = "reserved"; - }; - - mcu_uart0: serial@4a00000 { - compatible = "ti,am64-uart", "ti,am654-uart"; - reg = <0x00 0x04a00000 0x00 0x100>; - interrupts = ; - power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 149 0>; - clock-names = "fclk"; - status = "disabled"; - }; - - mcu_uart1: serial@4a10000 { - compatible = "ti,am64-uart", "ti,am654-uart"; - reg = <0x00 0x04a10000 0x00 0x100>; - interrupts = ; - power-domains = <&k3_pds 160 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 160 0>; - clock-names = "fclk"; - status = "disabled"; - }; - - mcu_i2c0: i2c@4900000 { - compatible = "ti,am64-i2c", "ti,omap4-i2c"; - reg = <0x00 0x04900000 0x00 0x100>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 106 2>; - clock-names = "fck"; - status = "disabled"; - }; - - mcu_i2c1: i2c@4910000 { - compatible = "ti,am64-i2c", "ti,omap4-i2c"; - reg = <0x00 0x04910000 0x00 0x100>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 107 2>; - clock-names = "fck"; - status = "disabled"; - }; - - mcu_spi0: spi@4b00000 { - compatible = "ti,am654-mcspi", "ti,omap4-mcspi"; - reg = <0x00 0x04b00000 0x00 0x400>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 147 0>; - status = "disabled"; - }; - - mcu_spi1: spi@4b10000 { - compatible = "ti,am654-mcspi","ti,omap4-mcspi"; - reg = <0x00 0x04b10000 0x00 0x400>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 148 0>; - status = "disabled"; - }; - - mcu_gpio_intr: interrupt-controller@4210000 { - compatible = "ti,sci-intr"; - reg = <0x00 0x04210000 0x00 0x200>; - ti,intr-trigger-type = <1>; - interrupt-controller; - interrupt-parent = <&gic500>; - #interrupt-cells = <1>; - ti,sci = <&dmsc>; - ti,sci-dev-id = <5>; - ti,interrupt-ranges = <0 104 4>; - }; - - mcu_gpio0: gpio@4201000 { - compatible = "ti,am64-gpio", "ti,keystone-gpio"; - reg = <0x0 0x4201000 0x0 0x100>; - gpio-controller; - #gpio-cells = <2>; - interrupt-parent = <&mcu_gpio_intr>; - interrupts = <30>, <31>; - interrupt-controller; - #interrupt-cells = <2>; - ti,ngpio = <23>; - ti,davinci-gpio-unbanked = <0>; - power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>; - clocks = <&k3_clks 79 0>; - clock-names = "gpio"; - }; - - mcu_pmx0: pinctrl@4084000 { - compatible = "pinctrl-single"; - reg = <0x00 0x4084000 0x00 0x84>; - #pinctrl-cells = <1>; - pinctrl-single,register-width = <32>; - pinctrl-single,function-mask = <0xffffffff>; - }; - - mcu_esm: esm@4100000 { - compatible = "ti,j721e-esm"; - reg = <0x00 0x4100000 0x00 0x1000>; - ti,esm-pins = <0>, <1>; - }; -}; diff --git a/arch/arm/dts/k3-am64-thermal.dtsi b/arch/arm/dts/k3-am64-thermal.dtsi deleted file mode 100644 index 036db56ba79..00000000000 --- a/arch/arm/dts/k3-am64-thermal.dtsi +++ /dev/null @@ -1,33 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 - -#include - -thermal_zones: thermal-zones { - main0_thermal: main0-thermal { - polling-delay-passive = <250>; /* milliSeconds */ - polling-delay = <500>; /* milliSeconds */ - thermal-sensors = <&main_vtm0 0>; - - trips { - main0_crit: main0-crit { - temperature = <105000>; /* milliCelsius */ - hysteresis = <2000>; /* milliCelsius */ - type = "critical"; - }; - }; - }; - - main1_thermal: main1-thermal { - polling-delay-passive = <250>; /* milliSeconds */ - polling-delay = <500>; /* milliSeconds */ - thermal-sensors = <&main_vtm0 1>; - - trips { - main1_crit: main1-crit { - temperature = <105000>; /* milliCelsius */ - hysteresis = <2000>; /* milliCelsius */ - type = "critical"; - }; - }; - }; -}; diff --git a/arch/arm/dts/k3-am64.dtsi b/arch/arm/dts/k3-am64.dtsi deleted file mode 100644 index 8e9c2bc70f4..00000000000 --- a/arch/arm/dts/k3-am64.dtsi +++ /dev/null @@ -1,100 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for AM642 SoC Family - * - * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ - */ - -#include -#include -#include -#include - -#include "k3-pinctrl.h" - -/ { - model = "Texas Instruments K3 AM642 SoC"; - compatible = "ti,am642"; - interrupt-parent = <&gic500>; - #address-cells = <2>; - #size-cells = <2>; - - chosen { }; - - firmware { - optee { - compatible = "linaro,optee-tz"; - method = "smc"; - }; - - psci: psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - }; - - a53_timer0: timer-cl0-cpu0 { - compatible = "arm,armv8-timer"; - interrupts = , /* cntpsirq */ - , /* cntpnsirq */ - , /* cntvirq */ - ; /* cnthpirq */ - }; - - pmu: pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = ; - }; - - cbass_main: bus@f4000 { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - ranges = <0x00 0x000f4000 0x00 0x000f4000 0x00 0x000002d0>, /* PINCTRL */ - <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */ - <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */ - <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */ - <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */ - <0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */ - <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */ - <0x00 0x0d000000 0x00 0x0d000000 0x00 0x00800000>, /* PCIE_CORE */ - <0x00 0x0e000000 0x00 0x0e000000 0x00 0x00000100>, /* Main RTI0 */ - <0x00 0x0e010000 0x00 0x0e010000 0x00 0x00000100>, /* Main RTI1 */ - <0x00 0x0f000000 0x00 0x0f000000 0x00 0x00c44200>, /* Second peripheral window */ - <0x00 0x20000000 0x00 0x20000000 0x00 0x0a008000>, /* Third peripheral window */ - <0x00 0x30000000 0x00 0x30000000 0x00 0x000bc100>, /* ICSSG0/1 */ - <0x00 0x37000000 0x00 0x37000000 0x00 0x00040000>, /* TIMERMGR0 TIMERS */ - <0x00 0x39000000 0x00 0x39000000 0x00 0x00000400>, /* CPTS0 */ - <0x00 0x3b000000 0x00 0x3b000000 0x00 0x00000400>, /* GPMC0_CFG */ - <0x00 0x3cd00000 0x00 0x3cd00000 0x00 0x00000200>, /* TIMERMGR0_CONFIG */ - <0x00 0x3f004000 0x00 0x3f004000 0x00 0x00000400>, /* GICSS0_REGS */ - <0x00 0x40900000 0x00 0x40900000 0x00 0x00030000>, /* SA2_UL0 */ - <0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>, /* CTRL_MMR0 */ - <0x00 0x44043000 0x00 0x44043000 0x00 0x00000fe0>, /* TI SCI DEBUG */ - <0x00 0x48000000 0x00 0x48000000 0x00 0x06400000>, /* DMASS */ - <0x00 0x50000000 0x00 0x50000000 0x00 0x08000000>, /* GPMC0 DATA */ - <0x00 0x60000000 0x00 0x60000000 0x00 0x08000000>, /* FSS0 DAT1 */ - <0x00 0x68000000 0x00 0x68000000 0x00 0x08000000>, /* PCIe DAT0 */ - <0x00 0x70000000 0x00 0x70000000 0x00 0x00200000>, /* OC SRAM */ - <0x00 0x78000000 0x00 0x78000000 0x00 0x00800000>, /* Main R5FSS */ - <0x01 0x00000000 0x01 0x00000000 0x00 0x00310000>, /* A53 PERIPHBASE */ - <0x06 0x00000000 0x06 0x00000000 0x01 0x00000000>, /* PCIe DAT1 */ - <0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>, /* FSS0 DAT3 */ - - /* MCU Domain Range */ - <0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>; - - cbass_mcu: bus@4000000 { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - ranges = <0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>; /* Peripheral window */ - }; - }; - - #include "k3-am64-thermal.dtsi" -}; - -/* Now include the peripherals for each bus segments */ -#include "k3-am64-main.dtsi" -#include "k3-am64-mcu.dtsi" diff --git a/arch/arm/dts/k3-am642-evm-u-boot.dtsi b/arch/arm/dts/k3-am642-evm-u-boot.dtsi index 60b219c0be5..ee6656774d6 100644 --- a/arch/arm/dts/k3-am642-evm-u-boot.dtsi +++ b/arch/arm/dts/k3-am642-evm-u-boot.dtsi @@ -9,97 +9,27 @@ chosen { tick-timer = &main_timer0; }; - - memory@80000000 { - bootph-all; - }; -}; - -&cbass_main { - bootph-all; }; &main_timer0 { - bootph-all; clock-frequency = <200000000>; }; -&main_conf { - bootph-all; - chipid@14 { - bootph-all; - }; -}; - -&main_pmx0 { - bootph-all; -}; - -&main_i2c0_pins_default { - bootph-all; -}; - -&main_i2c0 { - bootph-all; -}; - -&main_uart0_pins_default { - bootph-all; -}; - -&main_uart0 { - bootph-all; -}; - -&main_usb0_pins_default { - bootph-all; -}; - &usb0 { dr_mode="peripheral"; - bootph-all; -}; - -&usbss0 { - bootph-all; }; &main_mmc1_pins_default { bootph-all; }; -&main_usb0_pins_default { - bootph-all; -}; - -&dmss { - bootph-all; -}; - -&secure_proxy_main { - bootph-all; -}; - &dmsc { - bootph-all; k3_sysreset: sysreset-controller { compatible = "ti,sci-sysreset"; bootph-all; }; }; -&k3_pds { - bootph-all; -}; - -&k3_clks { - bootph-all; -}; - -&k3_reset { - bootph-all; -}; - &sdhci0 { bootph-all; }; @@ -108,10 +38,6 @@ bootph-all; }; -&sdhci1 { - bootph-all; -}; - &inta_main_dmss { bootph-all; }; @@ -143,42 +69,6 @@ bootph-all; }; -&mdio1_pins_default { - bootph-all; -}; - -&cpsw3g_mdio { - bootph-all; -}; - -&cpsw3g_phy0 { - bootph-all; -}; - -&rgmii1_pins_default { - bootph-all; -}; - -&rgmii2_pins_default { - bootph-all; -}; - -&cpsw3g { - bootph-all; - - ethernet-ports { - bootph-all; - }; -}; - -&phy_gmii_sel { - bootph-all; -}; - -&cpsw_port1 { - bootph-all; -}; - &cpsw_port2 { status = "disabled"; }; diff --git a/arch/arm/dts/k3-am642-evm.dts b/arch/arm/dts/k3-am642-evm.dts deleted file mode 100644 index b4a1f73d4fb..00000000000 --- a/arch/arm/dts/k3-am642-evm.dts +++ /dev/null @@ -1,690 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ - */ - -/dts-v1/; - -#include -#include -#include -#include -#include "k3-am642.dtsi" - -#include "k3-serdes.h" - -/ { - compatible = "ti,am642-evm", "ti,am642"; - model = "Texas Instruments AM642 EVM"; - - chosen { - stdout-path = &main_uart0; - }; - - aliases { - serial0 = &mcu_uart0; - serial1 = &main_uart1; - serial2 = &main_uart0; - serial3 = &main_uart3; - i2c0 = &main_i2c0; - i2c1 = &main_i2c1; - mmc0 = &sdhci0; - mmc1 = &sdhci1; - ethernet0 = &cpsw_port1; - ethernet1 = &cpsw_port2; - }; - - memory@80000000 { - device_type = "memory"; - /* 2G RAM */ - reg = <0x00000000 0x80000000 0x00000000 0x80000000>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - secure_ddr: optee@9e800000 { - reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ - alignment = <0x1000>; - no-map; - }; - - main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa0000000 0x00 0x100000>; - no-map; - }; - - main_r5fss0_core0_memory_region: r5f-memory@a0100000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa0100000 0x00 0xf00000>; - no-map; - }; - - main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa1000000 0x00 0x100000>; - no-map; - }; - - main_r5fss0_core1_memory_region: r5f-memory@a1100000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa1100000 0x00 0xf00000>; - no-map; - }; - - main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa2000000 0x00 0x100000>; - no-map; - }; - - main_r5fss1_core0_memory_region: r5f-memory@a2100000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa2100000 0x00 0xf00000>; - no-map; - }; - - main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa3000000 0x00 0x100000>; - no-map; - }; - - main_r5fss1_core1_memory_region: r5f-memory@a3100000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa3100000 0x00 0xf00000>; - no-map; - }; - - rtos_ipc_memory_region: ipc-memories@a5000000 { - reg = <0x00 0xa5000000 0x00 0x00800000>; - alignment = <0x1000>; - no-map; - }; - }; - - evm_12v0: regulator-0 { - /* main DC jack */ - compatible = "regulator-fixed"; - regulator-name = "evm_12v0"; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - regulator-always-on; - regulator-boot-on; - }; - - vsys_5v0: regulator-1 { - /* output of LM5140 */ - compatible = "regulator-fixed"; - regulator-name = "vsys_5v0"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&evm_12v0>; - regulator-always-on; - regulator-boot-on; - }; - - vsys_3v3: regulator-2 { - /* output of LM5140 */ - compatible = "regulator-fixed"; - regulator-name = "vsys_3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&evm_12v0>; - regulator-always-on; - regulator-boot-on; - }; - - vdd_mmc1: regulator-3 { - /* TPS2051BD */ - compatible = "regulator-fixed"; - regulator-name = "vdd_mmc1"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - enable-active-high; - vin-supply = <&vsys_3v3>; - gpio = <&exp1 6 GPIO_ACTIVE_HIGH>; - }; - - vddb: regulator-4 { - compatible = "regulator-fixed"; - regulator-name = "vddb_3v3_display"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vsys_3v3>; - regulator-always-on; - regulator-boot-on; - }; - - vtt_supply: regulator-5 { - compatible = "regulator-fixed"; - regulator-name = "vtt"; - pinctrl-names = "default"; - pinctrl-0 = <&ddr_vtt_pins_default>; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&main_gpio0 12 GPIO_ACTIVE_HIGH>; - vin-supply = <&vsys_3v3>; - enable-active-high; - regulator-always-on; - regulator-boot-on; - }; - - leds { - compatible = "gpio-leds"; - - led-0 { - label = "am64-evm:red:heartbeat"; - gpios = <&exp1 16 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - function = LED_FUNCTION_HEARTBEAT; - default-state = "off"; - }; - }; - - mdio_mux: mux-controller { - compatible = "gpio-mux"; - #mux-control-cells = <0>; - - mux-gpios = <&exp1 12 GPIO_ACTIVE_HIGH>; - }; - - mdio-mux-1 { - compatible = "mdio-mux-multiplexer"; - mux-controls = <&mdio_mux>; - mdio-parent-bus = <&cpsw3g_mdio>; - #address-cells = <1>; - #size-cells = <0>; - - mdio@1 { - reg = <0x1>; - #address-cells = <1>; - #size-cells = <0>; - - cpsw3g_phy3: ethernet-phy@3 { - reg = <3>; - }; - }; - }; - - transceiver1: can-phy0 { - compatible = "ti,tcan1042"; - #phy-cells = <0>; - max-bitrate = <5000000>; - standby-gpios = <&exp1 8 GPIO_ACTIVE_HIGH>; - }; - - transceiver2: can-phy1 { - compatible = "ti,tcan1042"; - #phy-cells = <0>; - max-bitrate = <5000000>; - standby-gpios = <&exp1 9 GPIO_ACTIVE_HIGH>; - }; -}; - -&main_pmx0 { - main_mmc1_pins_default: main-mmc1-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */ - AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */ - AM64X_IOPAD(0x0288, PIN_INPUT_PULLUP, 0) /* (K21) MMC1_DAT0 */ - AM64X_IOPAD(0x0284, PIN_INPUT_PULLUP, 0) /* (L21) MMC1_DAT1 */ - AM64X_IOPAD(0x0280, PIN_INPUT_PULLUP, 0) /* (K19) MMC1_DAT2 */ - AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /* (K18) MMC1_DAT3 */ - AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /* (D19) MMC1_SDCD */ - AM64X_IOPAD(0x029c, PIN_INPUT, 0) /* (C20) MMC1_SDWP */ - AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* MMC1_CLKLB */ - >; - }; - - main_uart1_pins_default: main-uart1-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */ - AM64X_IOPAD(0x024c, PIN_OUTPUT, 0) /* (E16) UART1_RTSn */ - AM64X_IOPAD(0x0240, PIN_INPUT, 0) /* (E15) UART1_RXD */ - AM64X_IOPAD(0x0244, PIN_OUTPUT, 0) /* (E14) UART1_TXD */ - >; - }; - - main_uart0_pins_default: main-uart0-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */ - AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */ - AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */ - AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */ - >; - }; - - main_spi0_pins_default: main-spi0-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x0210, PIN_INPUT, 0) /* (D13) SPI0_CLK */ - AM64X_IOPAD(0x0208, PIN_OUTPUT, 0) /* (D12) SPI0_CS0 */ - AM64X_IOPAD(0x0214, PIN_OUTPUT, 0) /* (A13) SPI0_D0 */ - AM64X_IOPAD(0x0218, PIN_INPUT, 0) /* (A14) SPI0_D1 */ - >; - }; - - main_i2c0_pins_default: main-i2c0-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */ - AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */ - >; - }; - - main_i2c1_pins_default: main-i2c1-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */ - AM64X_IOPAD(0x026c, PIN_INPUT_PULLUP, 0) /* (B19) I2C1_SDA */ - >; - }; - - mdio1_pins_default: mdio1-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */ - AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */ - >; - }; - - rgmii1_pins_default: rgmii1-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x01cc, PIN_INPUT, 4) /* (W5) PRG0_PRU1_GPO7.RGMII1_RD0 */ - AM64X_IOPAD(0x01d4, PIN_INPUT, 4) /* (Y5) PRG0_PRU1_GPO9.RGMII1_RD1 */ - AM64X_IOPAD(0x01d8, PIN_INPUT, 4) /* (V6) PRG0_PRU1_GPO10.RGMII1_RD2 */ - AM64X_IOPAD(0x01f4, PIN_INPUT, 4) /* (V5) PRG0_PRU1_GPO17.RGMII1_RD3 */ - AM64X_IOPAD(0x0188, PIN_INPUT, 4) /* (AA5) PRG0_PRU0_GPO10.RGMII1_RXC */ - AM64X_IOPAD(0x0184, PIN_INPUT, 4) /* (W6) PRG0_PRU0_GPO9.RGMII1_RX_CTL */ - AM64X_IOPAD(0x0124, PIN_OUTPUT, 4) /* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */ - AM64X_IOPAD(0x012c, PIN_OUTPUT, 4) /* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */ - AM64X_IOPAD(0x0130, PIN_OUTPUT, 4) /* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */ - AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) /* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */ - AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4) /* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */ - AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */ - >; - }; - - rgmii2_pins_default: rgmii2-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x0108, PIN_INPUT, 4) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */ - AM64X_IOPAD(0x010c, PIN_INPUT, 4) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */ - AM64X_IOPAD(0x0110, PIN_INPUT, 4) /* (AA12) PRG1_PRU1_GPO2.RGMII2_RD2 */ - AM64X_IOPAD(0x0114, PIN_INPUT, 4) /* (Y12) PRG1_PRU1_GPO3.RGMII2_RD3 */ - AM64X_IOPAD(0x0120, PIN_INPUT, 4) /* (U11) PRG1_PRU1_GPO6.RGMII2_RXC */ - AM64X_IOPAD(0x0118, PIN_INPUT, 4) /* (W12) PRG1_PRU1_GPO4.RGMII2_RX_CTL */ - AM64X_IOPAD(0x0134, PIN_OUTPUT, 4) /* (AA10) PRG1_PRU1_GPO11.RGMII2_TD0 */ - AM64X_IOPAD(0x0138, PIN_OUTPUT, 4) /* (V10) PRG1_PRU1_GPO12.RGMII2_TD1 */ - AM64X_IOPAD(0x013c, PIN_OUTPUT, 4) /* (U10) PRG1_PRU1_GPO13.RGMII2_TD2 */ - AM64X_IOPAD(0x0140, PIN_OUTPUT, 4) /* (AA11) PRG1_PRU1_GPO14.RGMII2_TD3 */ - AM64X_IOPAD(0x0148, PIN_OUTPUT, 4) /* (Y10) PRG1_PRU1_GPO16.RGMII2_TXC */ - AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */ - >; - }; - - main_usb0_pins_default: main-usb0-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */ - >; - }; - - ospi0_pins_default: ospi0-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x0000, PIN_OUTPUT, 0) /* (N20) OSPI0_CLK */ - AM64X_IOPAD(0x002c, PIN_OUTPUT, 0) /* (L19) OSPI0_CSn0 */ - AM64X_IOPAD(0x000c, PIN_INPUT, 0) /* (M19) OSPI0_D0 */ - AM64X_IOPAD(0x0010, PIN_INPUT, 0) /* (M18) OSPI0_D1 */ - AM64X_IOPAD(0x0014, PIN_INPUT, 0) /* (M20) OSPI0_D2 */ - AM64X_IOPAD(0x0018, PIN_INPUT, 0) /* (M21) OSPI0_D3 */ - AM64X_IOPAD(0x001c, PIN_INPUT, 0) /* (P21) OSPI0_D4 */ - AM64X_IOPAD(0x0020, PIN_INPUT, 0) /* (P20) OSPI0_D5 */ - AM64X_IOPAD(0x0024, PIN_INPUT, 0) /* (N18) OSPI0_D6 */ - AM64X_IOPAD(0x0028, PIN_INPUT, 0) /* (M17) OSPI0_D7 */ - AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */ - >; - }; - - main_ecap0_pins_default: main-ecap0-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */ - >; - }; - - main_mcan0_pins_default: main-mcan0-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x0254, PIN_INPUT, 0) /* (B17) MCAN0_RX */ - AM64X_IOPAD(0x0250, PIN_OUTPUT, 0) /* (A17) MCAN0_TX */ - >; - }; - - main_mcan1_pins_default: main-mcan1-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x025c, PIN_INPUT, 0) /* (D17) MCAN1_RX */ - AM64X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (C17) MCAN1_TX */ - >; - }; - - ddr_vtt_pins_default: ddr-vtt-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x0030, PIN_OUTPUT_PULLUP, 7) /* (L18) OSPI0_CSN1.GPIO0_12 */ - >; - }; -}; - -&main_uart0 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&main_uart0_pins_default>; - current-speed = <115200>; -}; - -/* main_uart1 is reserved for firmware usage */ -&main_uart1 { - status = "reserved"; - pinctrl-names = "default"; - pinctrl-0 = <&main_uart1_pins_default>; -}; - -&main_i2c0 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&main_i2c0_pins_default>; - clock-frequency = <400000>; - - eeprom@50 { - /* AT24CM01 */ - compatible = "atmel,24c1024"; - reg = <0x50>; - }; -}; - -&main_i2c1 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&main_i2c1_pins_default>; - clock-frequency = <400000>; - - exp1: gpio@22 { - compatible = "ti,tca6424"; - reg = <0x22>; - gpio-controller; - #gpio-cells = <2>; - gpio-line-names = "GPIO_eMMC_RSTn", "CAN_MUX_SEL", - "GPIO_CPSW1_RST", "GPIO_RGMII1_RST", - "GPIO_RGMII2_RST", "GPIO_PCIe_RST_OUT", - "MMC1_SD_EN", "FSI_FET_SEL", - "MCAN0_STB_3V3", "MCAN1_STB_3V3", - "CPSW_FET_SEL", "CPSW_FET2_SEL", - "PRG1_RGMII2_FET_SEL", "TEST_GPIO2", - "GPIO_OLED_RESETn", "VPP_LDO_EN", - "TEST_LED1", "TP92", "TP90", "TP88", - "TP87", "TP86", "TP89", "TP91"; - }; - - /* osd9616p0899-10 */ - display@3c { - compatible = "solomon,ssd1306fb-i2c"; - reg = <0x3c>; - reset-gpios = <&exp1 14 GPIO_ACTIVE_LOW>; - vbat-supply = <&vddb>; - solomon,height = <16>; - solomon,width = <96>; - solomon,com-seq; - solomon,com-invdir; - solomon,page-offset = <0>; - solomon,prechargep1 = <2>; - solomon,prechargep2 = <13>; - }; -}; - -/* mcu_gpio0 is reserved for mcu firmware usage */ -&mcu_gpio0 { - status = "reserved"; -}; - -&main_spi0 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&main_spi0_pins_default>; - ti,pindir-d0-out-d1-in; - eeprom@0 { - compatible = "microchip,93lc46b"; - reg = <0>; - spi-max-frequency = <1000000>; - spi-cs-high; - data-size = <16>; - }; -}; - -&sdhci0 { - /* emmc */ - bus-width = <8>; - non-removable; - ti,driver-strength-ohm = <50>; - disable-wp; -}; - -&sdhci1 { - /* SD/MMC */ - vmmc-supply = <&vdd_mmc1>; - pinctrl-names = "default"; - bus-width = <4>; - pinctrl-0 = <&main_mmc1_pins_default>; - ti,driver-strength-ohm = <50>; - disable-wp; -}; - -&usbss0 { - ti,vbus-divider; - ti,usb2-only; -}; - -&usb0 { - dr_mode = "otg"; - maximum-speed = "high-speed"; - pinctrl-names = "default"; - pinctrl-0 = <&main_usb0_pins_default>; -}; - -&cpsw3g { - pinctrl-names = "default"; - pinctrl-0 = <&rgmii1_pins_default>, <&rgmii2_pins_default>; -}; - -&cpsw_port1 { - phy-mode = "rgmii-rxid"; - phy-handle = <&cpsw3g_phy0>; -}; - -&cpsw_port2 { - phy-mode = "rgmii-rxid"; - phy-handle = <&cpsw3g_phy3>; -}; - -&cpsw3g_mdio { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&mdio1_pins_default>; - - cpsw3g_phy0: ethernet-phy@0 { - reg = <0>; - ti,rx-internal-delay = ; - ti,fifo-depth = ; - }; -}; - -&tscadc0 { - /* ADC is reserved for R5 usage */ - status = "reserved"; -}; - -&ospi0 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&ospi0_pins_default>; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0x0>; - spi-tx-bus-width = <8>; - spi-rx-bus-width = <8>; - spi-max-frequency = <25000000>; - cdns,tshsl-ns = <60>; - cdns,tsd2d-ns = <60>; - cdns,tchsh-ns = <60>; - cdns,tslch-ns = <60>; - cdns,read-delay = <4>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "ospi.tiboot3"; - reg = <0x0 0x100000>; - }; - - partition@100000 { - label = "ospi.tispl"; - reg = <0x100000 0x200000>; - }; - - partition@300000 { - label = "ospi.u-boot"; - reg = <0x300000 0x400000>; - }; - - partition@700000 { - label = "ospi.env"; - reg = <0x700000 0x40000>; - }; - - partition@740000 { - label = "ospi.env.backup"; - reg = <0x740000 0x40000>; - }; - - partition@800000 { - label = "ospi.rootfs"; - reg = <0x800000 0x37c0000>; - }; - - partition@3fc0000 { - label = "ospi.phypattern"; - reg = <0x3fc0000 0x40000>; - }; - }; - }; -}; - -&mailbox0_cluster2 { - status = "okay"; - - mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 { - ti,mbox-rx = <0 0 2>; - ti,mbox-tx = <1 0 2>; - }; - - mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 { - ti,mbox-rx = <2 0 2>; - ti,mbox-tx = <3 0 2>; - }; -}; - -&mailbox0_cluster4 { - status = "okay"; - - mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 { - ti,mbox-rx = <0 0 2>; - ti,mbox-tx = <1 0 2>; - }; - - mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 { - ti,mbox-rx = <2 0 2>; - ti,mbox-tx = <3 0 2>; - }; -}; - -&mailbox0_cluster6 { - status = "okay"; - - mbox_m4_0: mbox-m4-0 { - ti,mbox-rx = <0 0 2>; - ti,mbox-tx = <1 0 2>; - }; -}; - -&main_r5fss0_core0 { - mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core0>; - memory-region = <&main_r5fss0_core0_dma_memory_region>, - <&main_r5fss0_core0_memory_region>; -}; - -&main_r5fss0_core1 { - mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core1>; - memory-region = <&main_r5fss0_core1_dma_memory_region>, - <&main_r5fss0_core1_memory_region>; -}; - -&main_r5fss1_core0 { - mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core0>; - memory-region = <&main_r5fss1_core0_dma_memory_region>, - <&main_r5fss1_core0_memory_region>; -}; - -&main_r5fss1_core1 { - mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core1>; - memory-region = <&main_r5fss1_core1_dma_memory_region>, - <&main_r5fss1_core1_memory_region>; -}; - -&serdes_ln_ctrl { - idle-states = ; -}; - -&serdes0 { - serdes0_pcie_link: phy@0 { - reg = <0>; - cdns,num-lanes = <1>; - #phy-cells = <0>; - cdns,phy-type = ; - resets = <&serdes_wiz0 1>; - }; -}; - -&pcie0_rc { - status = "okay"; - reset-gpios = <&exp1 5 GPIO_ACTIVE_HIGH>; - phys = <&serdes0_pcie_link>; - phy-names = "pcie-phy"; - num-lanes = <1>; -}; - -&pcie0_ep { - phys = <&serdes0_pcie_link>; - phy-names = "pcie-phy"; - num-lanes = <1>; -}; - -&ecap0 { - status = "okay"; - /* PWM is available on Pin 1 of header J12 */ - pinctrl-names = "default"; - pinctrl-0 = <&main_ecap0_pins_default>; -}; - -&main_mcan0 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&main_mcan0_pins_default>; - phys = <&transceiver1>; -}; - -&main_mcan1 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&main_mcan1_pins_default>; - phys = <&transceiver2>; -}; diff --git a/arch/arm/dts/k3-am642-r5-evm.dts b/arch/arm/dts/k3-am642-r5-evm.dts index 6825c07df35..be8596987ba 100644 --- a/arch/arm/dts/k3-am642-r5-evm.dts +++ b/arch/arm/dts/k3-am642-r5-evm.dts @@ -40,10 +40,6 @@ }; }; -&vtt_supply { - bootph-pre-ram; -}; - &cbass_main { sysctrler: sysctrler { compatible = "ti,am654-system-controller"; @@ -53,18 +49,6 @@ }; }; -&main_esm { - bootph-pre-ram; -}; - -&cbass_mcu { - bootph-pre-ram; -}; - -&mcu_esm { - bootph-pre-ram; -}; - &dmsc { mboxes= <&secure_proxy_main 0>, <&secure_proxy_main 1>, @@ -74,10 +58,6 @@ ti,secure-host; }; -&vtt_supply { - bootph-pre-ram; -}; - &memorycontroller { vtt-supply = <&vtt_supply>; }; @@ -92,10 +72,6 @@ clock-names = "clk_xin"; }; -&main_gpio0 { - bootph-pre-ram; -}; - /* UART is initialized before SYSFW is started * so we can't do any power-domain/clock operations. * Delete clock/power-domain properties to avoid diff --git a/arch/arm/dts/k3-am642-r5-sk.dts b/arch/arm/dts/k3-am642-r5-sk.dts index 60d747ddd5f..2186152a0b8 100644 --- a/arch/arm/dts/k3-am642-r5-sk.dts +++ b/arch/arm/dts/k3-am642-r5-sk.dts @@ -49,18 +49,6 @@ }; }; -&main_esm { - bootph-pre-ram; -}; - -&cbass_mcu { - bootph-pre-ram; -}; - -&mcu_esm { - bootph-pre-ram; -}; - &dmsc { mboxes= <&secure_proxy_main 0>, <&secure_proxy_main 1>, diff --git a/arch/arm/dts/k3-am642-sk-u-boot.dtsi b/arch/arm/dts/k3-am642-sk-u-boot.dtsi index 2f93eb6da2a..7e6b2981346 100644 --- a/arch/arm/dts/k3-am642-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-am642-sk-u-boot.dtsi @@ -9,87 +9,21 @@ chosen { tick-timer = &main_timer0; }; - - memory@80000000 { - bootph-all; - }; -}; - -&cbass_main{ - bootph-all; }; &main_timer0 { - bootph-all; clock-frequency = <200000000>; }; -&main_conf { - bootph-all; - chipid@14 { - bootph-all; - }; -}; - -&main_pmx0 { - bootph-all; -}; - -&main_i2c0_pins_default { - bootph-all; -}; - -&main_i2c0 { - bootph-all; -}; - -&main_uart0_pins_default { - bootph-all; -}; - -&main_uart0 { - bootph-all; -}; - -&dmss { - bootph-all; -}; - -&secure_proxy_main { - bootph-all; -}; - &dmsc { - bootph-all; k3_sysreset: sysreset-controller { compatible = "ti,sci-sysreset"; bootph-all; }; }; -&k3_pds { - bootph-all; -}; - -&k3_clks { - bootph-all; -}; - -&k3_reset { - bootph-all; -}; - &sdhci0 { status = "disabled"; - bootph-all; -}; - -&sdhci1 { - bootph-all; -}; - -&main_mmc1_pins_default { - bootph-all; }; &inta_main_dmss { @@ -180,38 +114,10 @@ bootph-all; }; -&main_usb0_pins_default { - bootph-all; -}; - &serdes_ln_ctrl { bootph-all; }; -&usbss0 { - bootph-all; -}; - -&usb0 { - bootph-all; -}; - -&serdes_wiz0 { - bootph-all; -}; - -&serdes0_usb_link { - bootph-all; -}; - -&serdes0 { - bootph-all; -}; - -&serdes_refclk { - bootph-all; -}; - &ospi0_pins_default { bootph-all; }; diff --git a/arch/arm/dts/k3-am642-sk.dts b/arch/arm/dts/k3-am642-sk.dts deleted file mode 100644 index 722fd285a34..00000000000 --- a/arch/arm/dts/k3-am642-sk.dts +++ /dev/null @@ -1,642 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ - */ - -/dts-v1/; - -#include -#include -#include -#include -#include "k3-am642.dtsi" - -#include "k3-serdes.h" - -/ { - compatible = "ti,am642-sk", "ti,am642"; - model = "Texas Instruments AM642 SK"; - - chosen { - stdout-path = &main_uart0; - }; - - aliases { - serial0 = &mcu_uart0; - serial1 = &main_uart1; - serial2 = &main_uart0; - i2c0 = &main_i2c0; - i2c1 = &main_i2c1; - mmc0 = &sdhci0; - mmc1 = &sdhci1; - ethernet0 = &cpsw_port1; - ethernet1 = &cpsw_port2; - }; - - memory@80000000 { - device_type = "memory"; - /* 2G RAM */ - reg = <0x00000000 0x80000000 0x00000000 0x80000000>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - secure_ddr: optee@9e800000 { - reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ - alignment = <0x1000>; - no-map; - }; - - main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa0000000 0x00 0x100000>; - no-map; - }; - - main_r5fss0_core0_memory_region: r5f-memory@a0100000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa0100000 0x00 0xf00000>; - no-map; - }; - - main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa1000000 0x00 0x100000>; - no-map; - }; - - main_r5fss0_core1_memory_region: r5f-memory@a1100000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa1100000 0x00 0xf00000>; - no-map; - }; - - main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa2000000 0x00 0x100000>; - no-map; - }; - - main_r5fss1_core0_memory_region: r5f-memory@a2100000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa2100000 0x00 0xf00000>; - no-map; - }; - - main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa3000000 0x00 0x100000>; - no-map; - }; - - main_r5fss1_core1_memory_region: r5f-memory@a3100000 { - compatible = "shared-dma-pool"; - reg = <0x00 0xa3100000 0x00 0xf00000>; - no-map; - }; - - rtos_ipc_memory_region: ipc-memories@a5000000 { - reg = <0x00 0xa5000000 0x00 0x00800000>; - alignment = <0x1000>; - no-map; - }; - }; - - vusb_main: regulator-0 { - /* USB MAIN INPUT 5V DC */ - compatible = "regulator-fixed"; - regulator-name = "vusb_main5v0"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - regulator-boot-on; - }; - - vcc_3v3_sys: regulator-1 { - /* output of LP8733xx */ - compatible = "regulator-fixed"; - regulator-name = "vcc_3v3_sys"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vusb_main>; - regulator-always-on; - regulator-boot-on; - }; - - vdd_mmc1: regulator-2 { - /* TPS2051BD */ - compatible = "regulator-fixed"; - regulator-name = "vdd_mmc1"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - enable-active-high; - vin-supply = <&vcc_3v3_sys>; - gpio = <&exp1 3 GPIO_ACTIVE_HIGH>; - }; - - com8_ls_en: regulator-3 { - compatible = "regulator-fixed"; - regulator-name = "com8_ls_en"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - pinctrl-0 = <&main_com8_ls_en_pins_default>; - pinctrl-names = "default"; - gpio = <&main_gpio0 62 GPIO_ACTIVE_LOW>; - }; - - wlan_en: regulator-4 { - /* output of SN74AVC4T245RSVR */ - compatible = "regulator-fixed"; - regulator-name = "wlan_en"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - enable-active-high; - pinctrl-0 = <&main_wlan_en_pins_default>; - pinctrl-names = "default"; - vin-supply = <&com8_ls_en>; - gpio = <&main_gpio0 48 GPIO_ACTIVE_HIGH>; - }; - - led-controller { - compatible = "gpio-leds"; - - led-0 { - color = ; - function = LED_FUNCTION_INDICATOR; - function-enumerator = <1>; - gpios = <&exp2 0 GPIO_ACTIVE_HIGH>; - default-state = "off"; - }; - - led-1 { - color = ; - function = LED_FUNCTION_INDICATOR; - function-enumerator = <2>; - gpios = <&exp2 1 GPIO_ACTIVE_HIGH>; - default-state = "off"; - }; - - led-2 { - color = ; - function = LED_FUNCTION_INDICATOR; - function-enumerator = <3>; - gpios = <&exp2 2 GPIO_ACTIVE_HIGH>; - default-state = "off"; - }; - - led-3 { - color = ; - function = LED_FUNCTION_INDICATOR; - function-enumerator = <4>; - gpios = <&exp2 3 GPIO_ACTIVE_HIGH>; - default-state = "off"; - }; - - led-4 { - color = ; - function = LED_FUNCTION_INDICATOR; - function-enumerator = <5>; - gpios = <&exp2 4 GPIO_ACTIVE_HIGH>; - default-state = "off"; - }; - - led-5 { - color = ; - function = LED_FUNCTION_INDICATOR; - function-enumerator = <6>; - gpios = <&exp2 5 GPIO_ACTIVE_HIGH>; - default-state = "off"; - }; - - led-6 { - color = ; - function = LED_FUNCTION_INDICATOR; - function-enumerator = <7>; - gpios = <&exp2 6 GPIO_ACTIVE_HIGH>; - default-state = "off"; - }; - - led-7 { - color = ; - function = LED_FUNCTION_HEARTBEAT; - function-enumerator = <8>; - linux,default-trigger = "heartbeat"; - gpios = <&exp2 7 GPIO_ACTIVE_HIGH>; - }; - }; -}; - -&main_pmx0 { - main_mmc1_pins_default: main-mmc1-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x029c, PIN_INPUT_PULLUP, 0) /* (C20) MMC1_SDWP */ - AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /* (D19) MMC1_SDCD */ - AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */ - AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* (#N/A) MMC1_CLKLB */ - AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */ - AM64X_IOPAD(0x0288, PIN_INPUT_PULLUP, 0) /* (K21) MMC1_DAT0 */ - AM64X_IOPAD(0x0284, PIN_INPUT_PULLUP, 0) /* (L21) MMC1_DAT1 */ - AM64X_IOPAD(0x0280, PIN_INPUT_PULLUP, 0) /* (K19) MMC1_DAT2 */ - AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /* (K18) MMC1_DAT3 */ - >; - }; - - main_uart0_pins_default: main-uart0-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */ - AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */ - AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */ - AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */ - >; - }; - - main_uart1_pins_default: main-uart1-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */ - AM64X_IOPAD(0x024c, PIN_OUTPUT, 0) /* (E16) UART1_RTSn */ - AM64X_IOPAD(0x0240, PIN_INPUT, 0) /* (E15) UART1_RXD */ - AM64X_IOPAD(0x0244, PIN_OUTPUT, 0) /* (E14) UART1_TXD */ - >; - }; - - main_usb0_pins_default: main-usb0-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */ - >; - }; - - main_i2c0_pins_default: main-i2c0-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */ - AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */ - >; - }; - - main_i2c1_pins_default: main-i2c1-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */ - AM64X_IOPAD(0x026c, PIN_INPUT_PULLUP, 0) /* (B19) I2C1_SDA */ - >; - }; - - mdio1_pins_default: mdio1-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */ - AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */ - >; - }; - - rgmii1_pins_default: rgmii1-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x011c, PIN_INPUT, 4) /* (AA13) PRG1_PRU1_GPO5.RGMII1_RD0 */ - AM64X_IOPAD(0x0128, PIN_INPUT, 4) /* (U12) PRG1_PRU1_GPO8.RGMII1_RD1 */ - AM64X_IOPAD(0x0150, PIN_INPUT, 4) /* (Y13) PRG1_PRU1_GPO18.RGMII1_RD2 */ - AM64X_IOPAD(0x0154, PIN_INPUT, 4) /* (V12) PRG1_PRU1_GPO19.RGMII1_RD3 */ - AM64X_IOPAD(0x00d8, PIN_INPUT, 4) /* (W13) PRG1_PRU0_GPO8.RGMII1_RXC */ - AM64X_IOPAD(0x00cc, PIN_INPUT, 4) /* (V13) PRG1_PRU0_GPO5.RGMII1_RX_CTL */ - AM64X_IOPAD(0x0124, PIN_OUTPUT, 4) /* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */ - AM64X_IOPAD(0x012c, PIN_OUTPUT, 4) /* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */ - AM64X_IOPAD(0x0130, PIN_OUTPUT, 4) /* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */ - AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) /* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */ - AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4) /* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */ - AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */ - >; - }; - - rgmii2_pins_default: rgmii2-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x0108, PIN_INPUT, 4) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */ - AM64X_IOPAD(0x010c, PIN_INPUT, 4) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */ - AM64X_IOPAD(0x0110, PIN_INPUT, 4) /* (AA12) PRG1_PRU1_GPO2.RGMII2_RD2 */ - AM64X_IOPAD(0x0114, PIN_INPUT, 4) /* (Y12) PRG1_PRU1_GPO3.RGMII2_RD3 */ - AM64X_IOPAD(0x0120, PIN_INPUT, 4) /* (U11) PRG1_PRU1_GPO6.RGMII2_RXC */ - AM64X_IOPAD(0x0118, PIN_INPUT, 4) /* (W12) PRG1_PRU1_GPO4.RGMII2_RX_CTL */ - AM64X_IOPAD(0x0134, PIN_OUTPUT, 4) /* (AA10) PRG1_PRU1_GPO11.RGMII2_TD0 */ - AM64X_IOPAD(0x0138, PIN_OUTPUT, 4) /* (V10) PRG1_PRU1_GPO12.RGMII2_TD1 */ - AM64X_IOPAD(0x013c, PIN_OUTPUT, 4) /* (U10) PRG1_PRU1_GPO13.RGMII2_TD2 */ - AM64X_IOPAD(0x0140, PIN_OUTPUT, 4) /* (AA11) PRG1_PRU1_GPO14.RGMII2_TD3 */ - AM64X_IOPAD(0x0148, PIN_OUTPUT, 4) /* (Y10) PRG1_PRU1_GPO16.RGMII2_TXC */ - AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */ - >; - }; - - ospi0_pins_default: ospi0-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x0000, PIN_OUTPUT, 0) /* (N20) OSPI0_CLK */ - AM64X_IOPAD(0x002c, PIN_OUTPUT, 0) /* (L19) OSPI0_CSn0 */ - AM64X_IOPAD(0x000c, PIN_INPUT, 0) /* (M19) OSPI0_D0 */ - AM64X_IOPAD(0x0010, PIN_INPUT, 0) /* (M18) OSPI0_D1 */ - AM64X_IOPAD(0x0014, PIN_INPUT, 0) /* (M20) OSPI0_D2 */ - AM64X_IOPAD(0x0018, PIN_INPUT, 0) /* (M21) OSPI0_D3 */ - AM64X_IOPAD(0x001c, PIN_INPUT, 0) /* (P21) OSPI0_D4 */ - AM64X_IOPAD(0x0020, PIN_INPUT, 0) /* (P20) OSPI0_D5 */ - AM64X_IOPAD(0x0024, PIN_INPUT, 0) /* (N18) OSPI0_D6 */ - AM64X_IOPAD(0x0028, PIN_INPUT, 0) /* (M17) OSPI0_D7 */ - AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */ - >; - }; - - main_ecap0_pins_default: main-ecap0-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */ - >; - }; - main_wlan_en_pins_default: main-wlan-en-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x00c4, PIN_OUTPUT_PULLUP, 7) /* (V8) GPIO0_48 */ - >; - }; - - main_com8_ls_en_pins_default: main-com8-ls-en-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x00fc, PIN_OUTPUT, 7) /* (U7) PRG1_PRU0_GPO17.GPIO0_62 */ - >; - }; - - main_wlan_pins_default: main-wlan-default-pins { - pinctrl-single,pins = < - AM64X_IOPAD(0x00bc, PIN_INPUT, 7) /* (U8) GPIO0_46 */ - >; - }; -}; - -&main_uart0 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&main_uart0_pins_default>; - current-speed = <115200>; -}; - -&main_uart1 { - /* main_uart1 is reserved for firmware usage */ - status = "reserved"; - pinctrl-names = "default"; - pinctrl-0 = <&main_uart1_pins_default>; -}; - -&main_i2c0 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&main_i2c0_pins_default>; - clock-frequency = <400000>; - - eeprom@51 { - compatible = "atmel,24c512"; - reg = <0x51>; - }; -}; - -&main_i2c1 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&main_i2c1_pins_default>; - clock-frequency = <400000>; - - exp1: gpio@70 { - compatible = "nxp,pca9538"; - reg = <0x70>; - gpio-controller; - #gpio-cells = <2>; - gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST", - "PRU_DETECT", "MMC1_SD_EN", - "VPP_LDO_EN", "RPI_PS_3V3_En", - "RPI_PS_5V0_En", "RPI_HAT_DETECT"; - }; - - exp2: gpio@60 { - compatible = "ti,tpic2810"; - reg = <0x60>; - gpio-controller; - #gpio-cells = <2>; - gpio-line-names = "LED1","LED2","LED3","LED4","LED5","LED6","LED7","LED8"; - }; -}; - -/* mcu_gpio0 is reserved for mcu firmware usage */ -&mcu_gpio0 { - status = "reserved"; -}; - -&sdhci0 { - vmmc-supply = <&wlan_en>; - bus-width = <4>; - non-removable; - cap-power-off-card; - keep-power-in-suspend; - ti,driver-strength-ohm = <50>; - - #address-cells = <1>; - #size-cells = <0>; - wlcore: wlcore@2 { - compatible = "ti,wl1837"; - reg = <2>; - pinctrl-0 = <&main_wlan_pins_default>; - pinctrl-names = "default"; - interrupt-parent = <&main_gpio0>; - interrupts = <46 IRQ_TYPE_EDGE_FALLING>; - }; -}; - -&sdhci1 { - /* SD/MMC */ - vmmc-supply = <&vdd_mmc1>; - pinctrl-names = "default"; - bus-width = <4>; - pinctrl-0 = <&main_mmc1_pins_default>; - ti,driver-strength-ohm = <50>; - disable-wp; -}; - -&serdes_ln_ctrl { - idle-states = ; -}; - -&serdes0 { - serdes0_usb_link: phy@0 { - reg = <0>; - cdns,num-lanes = <1>; - #phy-cells = <0>; - cdns,phy-type = ; - resets = <&serdes_wiz0 1>; - }; -}; - -&usbss0 { - ti,vbus-divider; -}; - -&usb0 { - dr_mode = "host"; - maximum-speed = "super-speed"; - pinctrl-names = "default"; - pinctrl-0 = <&main_usb0_pins_default>; - phys = <&serdes0_usb_link>; - phy-names = "cdns3,usb3-phy"; -}; - -&cpsw3g { - pinctrl-names = "default"; - pinctrl-0 = <&rgmii1_pins_default>, <&rgmii2_pins_default>; -}; - -&cpsw_port1 { - phy-mode = "rgmii-rxid"; - phy-handle = <&cpsw3g_phy0>; -}; - -&cpsw_port2 { - phy-mode = "rgmii-rxid"; - phy-handle = <&cpsw3g_phy1>; -}; - -&cpsw3g_mdio { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&mdio1_pins_default>; - - cpsw3g_phy0: ethernet-phy@0 { - reg = <0>; - ti,rx-internal-delay = ; - ti,fifo-depth = ; - }; - - cpsw3g_phy1: ethernet-phy@1 { - reg = <1>; - ti,rx-internal-delay = ; - ti,fifo-depth = ; - }; -}; - -&ospi0 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&ospi0_pins_default>; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0x0>; - spi-tx-bus-width = <8>; - spi-rx-bus-width = <8>; - spi-max-frequency = <25000000>; - cdns,tshsl-ns = <60>; - cdns,tsd2d-ns = <60>; - cdns,tchsh-ns = <60>; - cdns,tslch-ns = <60>; - cdns,read-delay = <4>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "ospi.tiboot3"; - reg = <0x0 0x100000>; - }; - - partition@100000 { - label = "ospi.tispl"; - reg = <0x100000 0x200000>; - }; - - partition@300000 { - label = "ospi.u-boot"; - reg = <0x300000 0x400000>; - }; - - partition@700000 { - label = "ospi.env"; - reg = <0x700000 0x40000>; - }; - - partition@740000 { - label = "ospi.env.backup"; - reg = <0x740000 0x40000>; - }; - - partition@800000 { - label = "ospi.rootfs"; - reg = <0x800000 0x37c0000>; - }; - - partition@3fc0000 { - label = "ospi.phypattern"; - reg = <0x3fc0000 0x40000>; - }; - }; - }; -}; - -&mailbox0_cluster2 { - status = "okay"; - - mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 { - ti,mbox-rx = <0 0 2>; - ti,mbox-tx = <1 0 2>; - }; - - mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 { - ti,mbox-rx = <2 0 2>; - ti,mbox-tx = <3 0 2>; - }; -}; - -&mailbox0_cluster4 { - status = "okay"; - - mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 { - ti,mbox-rx = <0 0 2>; - ti,mbox-tx = <1 0 2>; - }; - - mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 { - ti,mbox-rx = <2 0 2>; - ti,mbox-tx = <3 0 2>; - }; -}; - -&mailbox0_cluster6 { - status = "okay"; - - mbox_m4_0: mbox-m4-0 { - ti,mbox-rx = <0 0 2>; - ti,mbox-tx = <1 0 2>; - }; -}; - -&main_r5fss0_core0 { - mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core0>; - memory-region = <&main_r5fss0_core0_dma_memory_region>, - <&main_r5fss0_core0_memory_region>; -}; - -&main_r5fss0_core1 { - mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core1>; - memory-region = <&main_r5fss0_core1_dma_memory_region>, - <&main_r5fss0_core1_memory_region>; -}; - -&main_r5fss1_core0 { - mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core0>; - memory-region = <&main_r5fss1_core0_dma_memory_region>, - <&main_r5fss1_core0_memory_region>; -}; - -&main_r5fss1_core1 { - mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core1>; - memory-region = <&main_r5fss1_core1_dma_memory_region>, - <&main_r5fss1_core1_memory_region>; -}; - -&ecap0 { - status = "okay"; - /* PWM is available on Pin 1 of header J3 */ - pinctrl-names = "default"; - pinctrl-0 = <&main_ecap0_pins_default>; -}; diff --git a/arch/arm/dts/k3-am642.dtsi b/arch/arm/dts/k3-am642.dtsi deleted file mode 100644 index 7a6eedea3aa..00000000000 --- a/arch/arm/dts/k3-am642.dtsi +++ /dev/null @@ -1,66 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for AM642 SoC family in Dual core configuration - * - * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ - */ - -/dts-v1/; - -#include "k3-am64.dtsi" - -/ { - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu-map { - cluster0: cluster0 { - core0 { - cpu = <&cpu0>; - }; - - core1 { - cpu = <&cpu1>; - }; - }; - }; - - cpu0: cpu@0 { - compatible = "arm,cortex-a53"; - reg = <0x000>; - device_type = "cpu"; - enable-method = "psci"; - i-cache-size = <0x8000>; - i-cache-line-size = <64>; - i-cache-sets = <256>; - d-cache-size = <0x8000>; - d-cache-line-size = <64>; - d-cache-sets = <128>; - next-level-cache = <&L2_0>; - }; - - cpu1: cpu@1 { - compatible = "arm,cortex-a53"; - reg = <0x001>; - device_type = "cpu"; - enable-method = "psci"; - i-cache-size = <0x8000>; - i-cache-line-size = <64>; - i-cache-sets = <256>; - d-cache-size = <0x8000>; - d-cache-line-size = <64>; - d-cache-sets = <128>; - next-level-cache = <&L2_0>; - }; - }; - - L2_0: l2-cache0 { - compatible = "cache"; - cache-level = <2>; - cache-unified; - cache-size = <0x40000>; - cache-line-size = <64>; - cache-sets = <256>; - }; -}; diff --git a/arch/arm/dts/k3-am64x-binman.dtsi b/arch/arm/dts/k3-am64x-binman.dtsi index 88df2149545..37817ba60d2 100644 --- a/arch/arm/dts/k3-am64x-binman.dtsi +++ b/arch/arm/dts/k3-am64x-binman.dtsi @@ -118,11 +118,11 @@ #ifdef CONFIG_TARGET_AM642_A53_EVM -#define SPL_AM642_EVM_DTB "spl/dts/k3-am642-evm.dtb" -#define SPL_AM642_SK_DTB "spl/dts/k3-am642-sk.dtb" +#define SPL_AM642_EVM_DTB "spl/dts/ti/k3-am642-evm.dtb" +#define SPL_AM642_SK_DTB "spl/dts/ti/k3-am642-sk.dtb" #define AM642_EVM_DTB "u-boot.dtb" -#define AM642_SK_DTB "arch/arm/dts/k3-am642-sk.dtb" +#define AM642_SK_DTB "dts/upstream/src/arm64/ti/k3-am642-sk.dtb" &binman { ti-spl { diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index ad5472c4571..b7057be3d65 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -16,7 +16,7 @@ CONFIG_SF_DEFAULT_SPEED=25000000 CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y -CONFIG_DEFAULT_DEVICE_TREE="k3-am642-evm" +CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am642-evm" CONFIG_SPL_TEXT_BASE=0x80080000 CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y @@ -74,7 +74,7 @@ CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_LIST="k3-am642-evm k3-am642-sk" +CONFIG_OF_LIST="ti/k3-am642-evm ti/k3-am642-sk" CONFIG_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y @@ -170,3 +170,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_MASS_STORAGE=y CONFIG_SPL_DFU=y CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 +CONFIG_OF_UPSTREAM=y From f56d9a385cbf76d0ef7723faf65ec183c629a7ff Mon Sep 17 00:00:00 2001 From: Masahisa Kojima Date: Wed, 6 Mar 2024 15:11:10 +0900 Subject: [PATCH 12/15] board: developerbox: fix mem_map setup timing The setup of global variable mem_map was moved into enable_caches() by commit a70c75cabae1 ("board: developerbox: move mem_map setup later") since U-Boot was directly booted from NOR flash in XIP and bss is not yet available in dram_init() at that time. This has a problem, mem_map variable is used by the get_page_table_size() to calculate the page table size, but get_page_table_size() is called earlier than enable_caches() which fills mem_map variable. With that, U-Boot fails to boot when 64GB DIMM is installed. Currently U-Boot on the Developerbox board is not booted in XIP and bss is available in dram_init(), let's move mem_map setup in dram_init(). Signed-off-by: Masahisa Kojima --- board/socionext/developerbox/developerbox.c | 60 ++++++++------------- 1 file changed, 21 insertions(+), 39 deletions(-) diff --git a/board/socionext/developerbox/developerbox.c b/board/socionext/developerbox/developerbox.c index ac4415ff3bb..062e4a7b79f 100644 --- a/board/socionext/developerbox/developerbox.c +++ b/board/socionext/developerbox/developerbox.c @@ -125,10 +125,29 @@ int dram_init(void) struct draminfo *synquacer_draminfo = (void *)SQ_DRAMINFO_BASE; struct draminfo_entry *ent = synquacer_draminfo->entry; unsigned long size = 0; - int i; + struct mm_region *mr; + int i, ri; - for (i = 0; i < synquacer_draminfo->nr_regions; i++) + if (synquacer_draminfo->nr_regions < 1) { + log_err("Failed to get correct DRAM information\n"); + return -EINVAL; + } + + for (i = 0; i < synquacer_draminfo->nr_regions; i++) { + if (i >= MAX_DDR_REGIONS) + break; + + ri = DDR_REGION_INDEX(i); + mem_map[ri].phys = ent[i].base; + mem_map[ri].size = ent[i].size; + mem_map[ri].virt = mem_map[ri].phys; size += ent[i].size; + if (i == 0) + continue; + + mr = &mem_map[DDR_REGION_INDEX(0)]; + mem_map[ri].attrs = mr->attrs; + } gd->ram_size = size; gd->ram_base = ent[0].base; @@ -162,43 +181,6 @@ int dram_init_banksize(void) return 0; } -void build_mem_map(void) -{ - struct draminfo *synquacer_draminfo = (void *)SQ_DRAMINFO_BASE; - struct draminfo_entry *ent = synquacer_draminfo->entry; - struct mm_region *mr; - int i, ri; - - if (synquacer_draminfo->nr_regions < 1) { - log_err("Failed to get correct DRAM information\n"); - return; - } - - /* Update memory region maps */ - for (i = 0; i < synquacer_draminfo->nr_regions; i++) { - if (i >= MAX_DDR_REGIONS) - break; - - ri = DDR_REGION_INDEX(i); - mem_map[ri].phys = ent[i].base; - mem_map[ri].size = ent[i].size; - mem_map[ri].virt = mem_map[ri].phys; - if (i == 0) - continue; - - mr = &mem_map[DDR_REGION_INDEX(0)]; - mem_map[ri].attrs = mr->attrs; - } -} - -void enable_caches(void) -{ - build_mem_map(); - - icache_enable(); - dcache_enable(); -} - int print_cpuinfo(void) { printf("CPU: SC2A11:Cortex-A53 MPCore 24cores\n"); From 6d1734f0056720c51a3907ece934a5fbb0fbb0cb Mon Sep 17 00:00:00 2001 From: Maxim Moskalets Date: Fri, 8 Mar 2024 00:29:14 +0300 Subject: [PATCH 13/15] cmd: add FDT setup for bootelf by flag Added the ability to use FDT for ELF applications, required to run some OS. To make FDT setup, you need to set the -d fdt_addr_r cmd option for bootelf command. Enable by selecting CMD_ELF_FDT_SETUP. Signed-off-by: Maxim Moskalets --- cmd/Kconfig | 11 +++++++++++ cmd/elf.c | 39 ++++++++++++++++++++++++++++++++++++--- 2 files changed, 47 insertions(+), 3 deletions(-) diff --git a/cmd/Kconfig b/cmd/Kconfig index bd5464a4989..61e280fb1a4 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -490,6 +490,17 @@ config CMD_ELF help Boot an ELF/vxWorks image from the memory. +config CMD_ELF_FDT_SETUP + bool "Flattened Device Tree setup in bootelf cmd" + default n + depends on CMD_ELF + select LIB_LIBFDT + select LMB + help + Do FDT setup in bootelf command optionally by param -d, which + allows to bring additional system info (e.g. /memory node) to + the Operating System or application. + config CMD_FDT bool "Flattened Device Tree utility commands" default y diff --git a/cmd/elf.c b/cmd/elf.c index b7b9f506a52..df4354d3742 100644 --- a/cmd/elf.c +++ b/cmd/elf.c @@ -38,6 +38,10 @@ static unsigned long do_bootelf_exec(ulong (*entry)(int, char * const[]), /* Interpreter command to boot an arbitrary ELF image from memory */ int do_bootelf(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { +#if CONFIG_IS_ENABLED(CMD_ELF_FDT_SETUP) + struct bootm_headers img = {0}; + unsigned long fdt_addr = 0; /* Address of the FDT */ +#endif unsigned long addr; /* Address of the ELF image */ unsigned long rc; /* Return value from user code */ char *sload = NULL; @@ -46,13 +50,25 @@ int do_bootelf(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) /* Consume 'bootelf' */ argc--; argv++; - /* Check for flag. */ + /* Check for [-p|-s] flag. */ if (argc >= 1 && (argv[0][0] == '-' && \ (argv[0][1] == 'p' || argv[0][1] == 's'))) { sload = argv[0]; /* Consume flag. */ argc--; argv++; } + +#if CONFIG_IS_ENABLED(CMD_ELF_FDT_SETUP) + /* Check for [-d fdt_addr_r] option. */ + if ((argc >= 2) && (argv[0][0] == '-') && (argv[0][1] == 'd')) { + if (strict_strtoul(argv[1], 16, &fdt_addr) != 0) + return CMD_RET_USAGE; + /* Consume option. */ + argc -= 2; + argv += 2; + } +#endif + /* Check for address. */ if (argc >= 1 && strict_strtoul(argv[0], 16, &addr) != -EINVAL) { /* Consume address */ @@ -68,6 +84,16 @@ int do_bootelf(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) else addr = load_elf_image_shdr(addr); +#if CONFIG_IS_ENABLED(CMD_ELF_FDT_SETUP) + if (fdt_addr) { + printf("## Setting up FDT at 0x%08lx ...\n", fdt_addr); + flush(); + + if (image_setup_libfdt(&img, (void *)fdt_addr, NULL)) + return 1; + } +#endif + if (!env_get_autostart()) return rcode; @@ -298,9 +324,16 @@ int do_bootvx(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) U_BOOT_CMD( bootelf, CONFIG_SYS_MAXARGS, 0, do_bootelf, "Boot from an ELF image in memory", - "[-p|-s] [address]\n" + "[-p|-s] " +#if CONFIG_IS_ENABLED(CMD_ELF_FDT_SETUP) + "[-d fdt_addr_r] " +#endif + "[address]\n" "\t- load ELF image at [address] via program headers (-p)\n" - "\t or via section headers (-s)" + "\t or via section headers (-s)\n" +#if CONFIG_IS_ENABLED(CMD_ELF_FDT_SETUP) + "\t- setup FDT image at [fdt_addr_r] (-d)" +#endif ); U_BOOT_CMD( From 56041aa545df550134a97aa172645bd718e4e586 Mon Sep 17 00:00:00 2001 From: Sam Protsenko Date: Thu, 7 Mar 2024 21:38:22 -0600 Subject: [PATCH 14/15] Makefile: Improve generated_defconfig file handling Commit 2027e99e61aa ("Makefile: Run defconfig files through the C preprocessor") adds `generated_defconfig' file, but fails to clean that up. It might be useful to have that file around after `make' is done, but it's better to clean that up on `make clean'. Also we probably want to hide it in `git status' list. This patch makes the described changes, and also adds `-P' parameter to the CPP command that produces the `generated_defconfig' to avoid generating linemarkers. Signed-off-by: Sam Protsenko Fixes: 2027e99e61aa ("Makefile: Run defconfig files through the C preprocessor") Acked-by: Andrew Davis --- .gitignore | 1 + Makefile | 1 + scripts/kconfig/Makefile | 2 +- 3 files changed, 3 insertions(+), 1 deletion(-) diff --git a/.gitignore b/.gitignore index 33014811926..d9a64d742fd 100644 --- a/.gitignore +++ b/.gitignore @@ -63,6 +63,7 @@ fit-dtb.blob* /spl/ /tpl/ /defconfig +/generated_defconfig # # Generated include files diff --git a/Makefile b/Makefile index 28a2a1d98c4..91afee668e3 100644 --- a/Makefile +++ b/Makefile @@ -2233,6 +2233,7 @@ clean: $(clean-dirs) -o -name modules.builtin -o -name '.tmp_*.o.*' \ -o -name 'dsdt_generated.aml' -o -name 'dsdt_generated.asl.tmp' \ -o -name 'dsdt_generated.c' \ + -o -name 'generated_defconfig' \ -o -name '*.efi' -o -name '*.gcno' -o -name '*.so' \) \ -type f -print | xargs rm -f diff --git a/scripts/kconfig/Makefile b/scripts/kconfig/Makefile index 5ce5845e824..079add4d5da 100644 --- a/scripts/kconfig/Makefile +++ b/scripts/kconfig/Makefile @@ -93,7 +93,7 @@ endif endif %_defconfig: $(obj)/conf - $(Q)$(CPP) -nostdinc -I $(srctree) -undef -x assembler-with-cpp $(srctree)/arch/$(SRCARCH)/configs/$@ -o generated_defconfig + $(Q)$(CPP) -nostdinc -P -I $(srctree) -undef -x assembler-with-cpp $(srctree)/arch/$(SRCARCH)/configs/$@ -o generated_defconfig $(Q)$< $(silent) --defconfig=generated_defconfig $(Kconfig) # Added for U-Boot (backward compatibility) From 969ea37dfd04e2800828fe2a26cd354d22569d18 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 8 Mar 2024 14:38:13 -0500 Subject: [PATCH 15/15] stv0991: Remove stv0991 board and architecture code This architecture and related board are unmaintained currently and have been for a long time. Remove them. Signed-off-by: Tom Rini --- MAINTAINERS | 7 - arch/arm/Kconfig | 15 -- arch/arm/cpu/armv7/Makefile | 1 - arch/arm/cpu/armv7/stv0991/Makefile | 7 - arch/arm/cpu/armv7/stv0991/clock.c | 42 ------ arch/arm/cpu/armv7/stv0991/lowlevel.S | 11 -- arch/arm/cpu/armv7/stv0991/pinmux.c | 66 --------- arch/arm/cpu/armv7/stv0991/reset.c | 27 ---- arch/arm/cpu/armv7/stv0991/timer.c | 114 --------------- arch/arm/dts/Makefile | 1 - arch/arm/dts/stv0991.dts | 55 -------- arch/arm/include/asm/arch-stv0991/gpio.h | 21 --- arch/arm/include/asm/arch-stv0991/hardware.h | 72 ---------- .../include/asm/arch-stv0991/stv0991_cgu.h | 130 ------------------ .../include/asm/arch-stv0991/stv0991_creg.h | 103 -------------- .../include/asm/arch-stv0991/stv0991_defs.h | 14 -- .../include/asm/arch-stv0991/stv0991_gpt.h | 41 ------ .../include/asm/arch-stv0991/stv0991_periph.h | 45 ------ .../include/asm/arch-stv0991/stv0991_wdru.h | 27 ---- board/st/stv0991/Kconfig | 15 -- board/st/stv0991/MAINTAINERS | 6 - board/st/stv0991/Makefile | 6 - board/st/stv0991/stv0991.c | 119 ---------------- configs/stv0991_defconfig | 44 ------ include/configs/stv0991.h | 25 ---- 25 files changed, 1014 deletions(-) delete mode 100644 arch/arm/cpu/armv7/stv0991/Makefile delete mode 100644 arch/arm/cpu/armv7/stv0991/clock.c delete mode 100644 arch/arm/cpu/armv7/stv0991/lowlevel.S delete mode 100644 arch/arm/cpu/armv7/stv0991/pinmux.c delete mode 100644 arch/arm/cpu/armv7/stv0991/reset.c delete mode 100644 arch/arm/cpu/armv7/stv0991/timer.c delete mode 100644 arch/arm/dts/stv0991.dts delete mode 100644 arch/arm/include/asm/arch-stv0991/gpio.h delete mode 100644 arch/arm/include/asm/arch-stv0991/hardware.h delete mode 100644 arch/arm/include/asm/arch-stv0991/stv0991_cgu.h delete mode 100644 arch/arm/include/asm/arch-stv0991/stv0991_creg.h delete mode 100644 arch/arm/include/asm/arch-stv0991/stv0991_defs.h delete mode 100644 arch/arm/include/asm/arch-stv0991/stv0991_gpt.h delete mode 100644 arch/arm/include/asm/arch-stv0991/stv0991_periph.h delete mode 100644 arch/arm/include/asm/arch-stv0991/stv0991_wdru.h delete mode 100644 board/st/stv0991/Kconfig delete mode 100644 board/st/stv0991/MAINTAINERS delete mode 100644 board/st/stv0991/Makefile delete mode 100644 board/st/stv0991/stv0991.c delete mode 100644 configs/stv0991_defconfig delete mode 100644 include/configs/stv0991.h diff --git a/MAINTAINERS b/MAINTAINERS index b1c5a9a2707..8b316c8550e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -683,13 +683,6 @@ F: tools/stm32image.c N: stm N: stm32 - -ARM STM STV0991 -M: Vikas Manocha -S: Maintained -F: arch/arm/cpu/armv7/stv0991/ -F: arch/arm/include/asm/arch-stv0991/ - ARM SUNXI M: Jagan Teki M: Andre Przywara diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 2105c1e1307..71c96479147 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -632,20 +632,6 @@ config ARCH_ORION5X select SPL_SEPARATE_BSS if SPL select TIMER -config TARGET_STV0991 - bool "Support stv0991" - select CPU_V7A - select DM - select DM_SERIAL - select DM_SPI - select DM_SPI_FLASH - select GPIO_EXTRA_HEADER - select PL01X_SERIAL - select MTD - select SPI - select SPI_FLASH - imply CMD_DM - config ARCH_BCM283X bool "Broadcom BCM283X family" select DM @@ -2359,7 +2345,6 @@ source "board/samsung/common/Kconfig" source "board/siemens/common/Kconfig" source "board/seeed/npi_imx6ull/Kconfig" source "board/socionext/developerbox/Kconfig" -source "board/st/stv0991/Kconfig" source "board/tcl/sl50/Kconfig" source "board/traverse/ten64/Kconfig" source "board/variscite/dart_6ul/Kconfig" diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 653eef8ad79..99cf9eb515f 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -37,7 +37,6 @@ obj-$(if $(filter bcm281xx,$(SOC)),y) += bcm281xx/ obj-$(if $(filter bcmcygnus,$(SOC)),y) += bcmcygnus/ obj-$(if $(filter bcmnsp,$(SOC)),y) += bcmnsp/ obj-$(if $(filter ls102xa,$(SOC)),y) += ls102xa/ -obj-$(if $(filter stv0991,$(SOC)),y) += stv0991/ obj-$(CONFIG_ARCH_SUNXI) += sunxi/ obj-$(CONFIG_VF610) += vf610/ obj-$(CONFIG_ARCH_S5P4418) += s5p4418/ diff --git a/arch/arm/cpu/armv7/stv0991/Makefile b/arch/arm/cpu/armv7/stv0991/Makefile deleted file mode 100644 index 3be5eba4b12..00000000000 --- a/arch/arm/cpu/armv7/stv0991/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2014, STMicroelectronics - All Rights Reserved -# Author(s): Vikas Manocha, for STMicroelectronics. - -obj-y := timer.o clock.o pinmux.o reset.o -obj-y += lowlevel.o diff --git a/arch/arm/cpu/armv7/stv0991/clock.c b/arch/arm/cpu/armv7/stv0991/clock.c deleted file mode 100644 index 1e35deed353..00000000000 --- a/arch/arm/cpu/armv7/stv0991/clock.c +++ /dev/null @@ -1,42 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2014, STMicroelectronics - All Rights Reserved - * Author(s): Vikas Manocha, for STMicroelectronics. - */ - -#include -#include -#include -#include - -static struct stv0991_cgu_regs *const stv0991_cgu_regs = \ - (struct stv0991_cgu_regs *) (CGU_BASE_ADDR); - -void enable_pll1(void) -{ - /* pll1 already configured for 1000Mhz, just need to enable it */ - writel(readl(&stv0991_cgu_regs->pll1_ctrl) & ~(0x01), - &stv0991_cgu_regs->pll1_ctrl); -} - -void clock_setup(int peripheral) -{ - switch (peripheral) { - case UART_CLOCK_CFG: - writel(UART_CLK_CFG, &stv0991_cgu_regs->uart_freq); - break; - case ETH_CLOCK_CFG: - enable_pll1(); - writel(ETH_CLK_CFG, &stv0991_cgu_regs->eth_freq); - - /* Clock selection for ethernet tx_clk & rx_clk*/ - writel((readl(&stv0991_cgu_regs->eth_ctrl) & ETH_CLK_MASK) - | ETH_CLK_CTRL, &stv0991_cgu_regs->eth_ctrl); - break; - case QSPI_CLOCK_CFG: - writel(QSPI_CLK_CTRL, &stv0991_cgu_regs->qspi_freq); - break; - default: - break; - } -} diff --git a/arch/arm/cpu/armv7/stv0991/lowlevel.S b/arch/arm/cpu/armv7/stv0991/lowlevel.S deleted file mode 100644 index 5733eaa15c0..00000000000 --- a/arch/arm/cpu/armv7/stv0991/lowlevel.S +++ /dev/null @@ -1,11 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2014 STMicroelectronics - */ - -#include -#include - -ENTRY(lowlevel_init) - mov pc, lr -ENDPROC(lowlevel_init) diff --git a/arch/arm/cpu/armv7/stv0991/pinmux.c b/arch/arm/cpu/armv7/stv0991/pinmux.c deleted file mode 100644 index 6c44ffe50e8..00000000000 --- a/arch/arm/cpu/armv7/stv0991/pinmux.c +++ /dev/null @@ -1,66 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2014, STMicroelectronics - All Rights Reserved - * Author(s): Vikas Manocha, for STMicroelectronics. - */ - -#include -#include -#include -#include - -static struct stv0991_creg *const stv0991_creg = \ - (struct stv0991_creg *)CREG_BASE_ADDR; - -int stv0991_pinmux_config(int peripheral) -{ - switch (peripheral) { - case UART_GPIOC_30_31: - /* SSDA/SSCL pad muxing to UART Rx/Dx */ - writel((readl(&stv0991_creg->mux12) & GPIOC_31_MUX_MASK) | - CFG_GPIOC_31_UART_RX, - &stv0991_creg->mux12); - writel((readl(&stv0991_creg->mux12) & GPIOC_30_MUX_MASK) | - CFG_GPIOC_30_UART_TX, - &stv0991_creg->mux12); - /* SSDA/SSCL pad config to push pull*/ - writel((readl(&stv0991_creg->cfg_pad6) & GPIOC_31_MODE_MASK) | - CFG_GPIOC_31_MODE_PP, - &stv0991_creg->cfg_pad6); - writel((readl(&stv0991_creg->cfg_pad6) & GPIOC_30_MODE_MASK) | - CFG_GPIOC_30_MODE_HIGH, - &stv0991_creg->cfg_pad6); - break; - case UART_GPIOB_16_17: - /* ethernet rx_6/7 to UART Rx/Dx */ - writel((readl(&stv0991_creg->mux7) & GPIOB_17_MUX_MASK) | - CFG_GPIOB_17_UART_RX, - &stv0991_creg->mux7); - writel((readl(&stv0991_creg->mux7) & GPIOB_16_MUX_MASK) | - CFG_GPIOB_16_UART_TX, - &stv0991_creg->mux7); - break; - case ETH_GPIOB_10_31_C_0_4: - writel(readl(&stv0991_creg->mux6) & 0x000000FF, - &stv0991_creg->mux6); - writel(0x00000000, &stv0991_creg->mux7); - writel(0x00000000, &stv0991_creg->mux8); - writel(readl(&stv0991_creg->mux9) & 0xFFF00000, - &stv0991_creg->mux9); - /* Ethernet Voltage configuration to 1.8V*/ - writel((readl(&stv0991_creg->vdd_pad1) & VDD_ETH_PS_MASK) | - ETH_VDD_CFG, &stv0991_creg->vdd_pad1); - writel((readl(&stv0991_creg->vdd_pad1) & VDD_ETH_PS_MASK) | - ETH_M_VDD_CFG, &stv0991_creg->vdd_pad1); - - break; - case QSPI_CS_CLK_PAD: - writel((readl(&stv0991_creg->mux13) & FLASH_CS_NC_MASK) | - CFG_FLASH_CS_NC, &stv0991_creg->mux13); - writel((readl(&stv0991_creg->mux13) & FLASH_CLK_MASK) | - CFG_FLASH_CLK, &stv0991_creg->mux13); - default: - break; - } - return 0; -} diff --git a/arch/arm/cpu/armv7/stv0991/reset.c b/arch/arm/cpu/armv7/stv0991/reset.c deleted file mode 100644 index 77d4477c8dc..00000000000 --- a/arch/arm/cpu/armv7/stv0991/reset.c +++ /dev/null @@ -1,27 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2014, STMicroelectronics - All Rights Reserved - * Author(s): Vikas Manocha, for STMicroelectronics. - */ - -#include -#include -#include -#include -#include -void reset_cpu(void) -{ - puts("System is going to reboot ...\n"); - /* - * This 1 second delay will allow the above message - * to be printed before reset - */ - udelay((1000 * 1000)); - - /* Setting bit 1 of the WDRU unit will reset the SoC */ - writel(WDRU_RST_SYS, &stv0991_wd_ru_ptr->wdru_ctrl1); - - /* system will restart */ - while (1) - ; -} diff --git a/arch/arm/cpu/armv7/stv0991/timer.c b/arch/arm/cpu/armv7/stv0991/timer.c deleted file mode 100644 index f7cc45772f9..00000000000 --- a/arch/arm/cpu/armv7/stv0991/timer.c +++ /dev/null @@ -1,114 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2014, STMicroelectronics - All Rights Reserved - * Author(s): Vikas Manocha, for STMicroelectronics. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static struct stv0991_cgu_regs *const stv0991_cgu_regs = \ - (struct stv0991_cgu_regs *) (CGU_BASE_ADDR); - -#define READ_TIMER() (readl(&gpt1_regs_ptr->cnt) & GPT_FREE_RUNNING) -#define GPT_RESOLUTION (CFG_SYS_HZ_CLOCK / CONFIG_SYS_HZ) - -DECLARE_GLOBAL_DATA_PTR; - -#define timestamp gd->arch.tbl -#define lastdec gd->arch.lastinc - -static ulong get_timer_masked(void); - -int timer_init(void) -{ - /* Timer1 clock configuration */ - writel(TIMER1_CLK_CFG, &stv0991_cgu_regs->tim_freq); - writel(readl(&stv0991_cgu_regs->cgu_enable_2) | - TIMER1_CLK_EN, &stv0991_cgu_regs->cgu_enable_2); - - /* Stop the timer */ - writel(readl(&gpt1_regs_ptr->cr1) & ~GPT_CR1_CEN, &gpt1_regs_ptr->cr1); - writel(GPT_PRESCALER_128, &gpt1_regs_ptr->psc); - /* Configure timer for auto-reload */ - writel(readl(&gpt1_regs_ptr->cr1) | GPT_MODE_AUTO_RELOAD, - &gpt1_regs_ptr->cr1); - - /* load value for free running */ - writel(GPT_FREE_RUNNING, &gpt1_regs_ptr->arr); - - /* start timer */ - writel(readl(&gpt1_regs_ptr->cr1) | GPT_CR1_CEN, - &gpt1_regs_ptr->cr1); - - /* Reset the timer */ - lastdec = READ_TIMER(); - timestamp = 0; - - return 0; -} - -/* - * timer without interrupts - */ -ulong get_timer(ulong base) -{ - return (get_timer_masked() / GPT_RESOLUTION) - base; -} - -void __udelay(unsigned long usec) -{ - ulong tmo; - ulong start = get_timer_masked(); - ulong tenudelcnt = CFG_SYS_HZ_CLOCK / (1000 * 100); - ulong rndoff; - - rndoff = (usec % 10) ? 1 : 0; - - /* tenudelcnt timer tick gives 10 microsecconds delay */ - tmo = ((usec / 10) + rndoff) * tenudelcnt; - - while ((ulong) (get_timer_masked() - start) < tmo) - ; -} - -static ulong get_timer_masked(void) -{ - ulong now = READ_TIMER(); - - if (now >= lastdec) { - /* normal mode */ - timestamp += now - lastdec; - } else { - /* we have an overflow ... */ - timestamp += now + GPT_FREE_RUNNING - lastdec; - } - lastdec = now; - - return timestamp; -} - -/* - * This function is derived from PowerPC code (read timebase as long long). - * On ARM it just returns the timer value. - */ -unsigned long long get_ticks(void) -{ - return get_timer(0); -} - -/* - * This function is derived from PowerPC code (timebase clock frequency). - * On ARM it returns the number of timer ticks per second. - */ -ulong get_tbclk(void) -{ - return CONFIG_SYS_HZ; -} diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 51c83efe89b..8a366e5369b 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -569,7 +569,6 @@ dtb-$(CONFIG_TARGET_AM57XX_EVM) += am57xx-beagle-x15.dtb \ am574x-idk.dtb \ am572x-idk.dtb \ am571x-idk.dtb -dtb-$(CONFIG_TARGET_STV0991) += stv0991.dtb dtb-$(CONFIG_ARCH_LS1021A) += ls1021a-qds-duart.dtb \ ls1021a-qds-lpuart.dtb \ diff --git a/arch/arm/dts/stv0991.dts b/arch/arm/dts/stv0991.dts deleted file mode 100644 index b04e89971c7..00000000000 --- a/arch/arm/dts/stv0991.dts +++ /dev/null @@ -1,55 +0,0 @@ -/dts-v1/; - -/ { - model = "ST STV0991 application board"; - compatible = "st,stv0991"; - #address-cells = <1>; - #size-cells = <1>; - - chosen { - stdout-path = &uart0; - }; - - memory { - device_type="memory"; - reg = <0x0 0x198000>; - }; - - uart0: serial@0x80406000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x80406000 0x1000>; - clock = <2700000>; - }; - - aliases { - spi0 = "/spi@80203000"; /* QSPI */ - }; - - qspi: spi@80203000 { - compatible = "cdns,qspi-nor"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x80203000 0x100>, - <0x40000000 0x1000000>; - clocks = <3750000>; - cdns,fifo-depth = <256>; - cdns,fifo-width = <4>; - cdns,trigger-address = <0x40000000>; - status = "okay"; - - flash0: n25q32@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "jedec,spi-nor"; - reg = <0>; /* chip select */ - spi-max-frequency = <50000000>; - m25p,fast-read; - page-size = <256>; - block-size = <16>; /* 2^16, 64KB */ - cdns,tshsl-ns = <50>; - cdns,tsd2d-ns = <50>; - cdns,tchsh-ns = <4>; - cdns,tslch-ns = <4>; - }; - }; -}; diff --git a/arch/arm/include/asm/arch-stv0991/gpio.h b/arch/arm/include/asm/arch-stv0991/gpio.h deleted file mode 100644 index b27f4078582..00000000000 --- a/arch/arm/include/asm/arch-stv0991/gpio.h +++ /dev/null @@ -1,21 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2014, STMicroelectronics - All Rights Reserved - * Author(s): Vikas Manocha, for STMicroelectronics. - */ - -#ifndef __ASM_ARCH_STV0991_GPIO_H -#define __ASM_ARCH_STV0991_GPIO_H - -enum gpio_direction { - GPIO_DIRECTION_IN, - GPIO_DIRECTION_OUT, -}; - -struct gpio_regs { - u32 data; /* offset 0x0 */ - u32 reserved[0xff]; /* 0x4--0x3fc */ - u32 dir; /* offset 0x400 */ -}; - -#endif /* __ASM_ARCH_STV0991_GPIO_H */ diff --git a/arch/arm/include/asm/arch-stv0991/hardware.h b/arch/arm/include/asm/arch-stv0991/hardware.h deleted file mode 100644 index ea8f8206300..00000000000 --- a/arch/arm/include/asm/arch-stv0991/hardware.h +++ /dev/null @@ -1,72 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2014, STMicroelectronics - All Rights Reserved - * Author(s): Vikas Manocha, for STMicroelectronics. - */ - -#ifndef _ASM_ARCH_HARDWARE_H -#define _ASM_ARCH_HARDWARE_H - -/* STV0991 */ -#define SRAM0_BASE_ADDR 0x00000000UL -#define SRAM1_BASE_ADDR 0x00068000UL -#define SRAM2_BASE_ADDR 0x000D0000UL -#define SRAM3_BASE_ADDR 0x00138000UL -#define CFS_SRAM0_BASE_ADDR 0x00198000UL -#define CFS_SRAM1_BASE_ADDR 0x001B8000UL -#define FAST_SRAM_BASE_ADDR 0x001D8000UL -#define FLASH_BASE_ADDR 0x40000000UL -#define PL310_BASE_ADDR 0x70000000UL -#define HSAXIM_BASE_ADDR 0x70100000UL -#define IMGSS_BASE_ADDR 0x70200000UL -#define ADC_BASE_ADDR 0x80000000UL -#define GPIOA_BASE_ADDR 0x80001000UL -#define GPIOB_BASE_ADDR 0x80002000UL -#define GPIOC_BASE_ADDR 0x80003000UL -#define HDM_BASE_ADDR 0x80004000UL -#define THSENS_BASE_ADDR 0x80200000UL -#define GPTIMER2_BASE_ADDR 0x80201000UL -#define GPTIMER1_BASE_ADDR 0x80202000UL -#define QSPI_BASE_ADDR 0x80203000UL -#define CGU_BASE_ADDR 0x80204000UL -#define CREG_BASE_ADDR 0x80205000UL -#define PEC_BASE_ADDR 0x80206000UL -#define WDRU_BASE_ADDR 0x80207000UL -#define BSEC_BASE_ADDR 0x80208000UL -#define DAP_ROM_BASE_ADDR 0x80210000UL -#define SOC_CTI_BASE_ADDR 0x80211000UL -#define TPIU_BASE_ADDR 0x80212000UL -#define TMC_ETF_BASE_ADDR 0x80213000UL -#define R4_ETM_BASE_ADDR 0x80214000UL -#define R4_CTI_BASE_ADDR 0x80215000UL -#define R4_DBG_BASE_ADDR 0x80216000UL -#define GMAC_BASE_ADDR 0x80300000UL -#define RNSS_BASE_ADDR 0x80302000UL -#define CRYP_BASE_ADDR 0x80303000UL -#define HASH_BASE_ADDR 0x80304000UL -#define GPDMA_BASE_ADDR 0x80305000UL -#define ISA_BASE_ADDR 0x8032A000UL -#define HCI_BASE_ADDR 0x80400000UL -#define I2C1_BASE_ADDR 0x80401000UL -#define I2C2_BASE_ADDR 0x80402000UL -#define SAI_BASE_ADDR 0x80403000UL -#define USI_BASE_ADDR 0x80404000UL -#define SPI1_BASE_ADDR 0x80405000UL -#define UART_BASE_ADDR 0x80406000UL -#define SPI2_BASE_ADDR 0x80500000UL -#define CAN_BASE_ADDR 0x80501000UL -#define USART1_BASE_ADDR 0x80502000UL -#define USART2_BASE_ADDR 0x80503000UL -#define USART3_BASE_ADDR 0x80504000UL -#define USART4_BASE_ADDR 0x80505000UL -#define USART5_BASE_ADDR 0x80506000UL -#define USART6_BASE_ADDR 0x80507000UL -#define SDI2_BASE_ADDR 0x80600000UL -#define SDI1_BASE_ADDR 0x80601000UL -#define VICA_BASE_ADDR 0x81000000UL -#define VICB_BASE_ADDR 0x81001000UL -#define STM_CHANNELS_BASE_ADDR 0x81100000UL -#define STM_BASE_ADDR 0x81110000UL -#define SROM_BASE_ADDR 0xFFFF0000UL - -#endif /* _ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/include/asm/arch-stv0991/stv0991_cgu.h b/arch/arm/include/asm/arch-stv0991/stv0991_cgu.h deleted file mode 100644 index df9dd54e5a8..00000000000 --- a/arch/arm/include/asm/arch-stv0991/stv0991_cgu.h +++ /dev/null @@ -1,130 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2014, STMicroelectronics - All Rights Reserved - * Author(s): Vikas Manocha, for STMicroelectronics. - */ - -#ifndef _STV0991_CGU_H -#define _STV0991_CGU_H - -struct stv0991_cgu_regs { - u32 cpu_freq; /* offset 0x0 */ - u32 icn2_freq; /* offset 0x4 */ - u32 dma_freq; /* offset 0x8 */ - u32 isp_freq; /* offset 0xc */ - u32 h264_freq; /* offset 0x10 */ - u32 osif_freq; /* offset 0x14 */ - u32 ren_freq; /* offset 0x18 */ - u32 tim_freq; /* offset 0x1c */ - u32 sai_freq; /* offset 0x20 */ - u32 eth_freq; /* offset 0x24 */ - u32 i2c_freq; /* offset 0x28 */ - u32 spi_freq; /* offset 0x2c */ - u32 uart_freq; /* offset 0x30 */ - u32 qspi_freq; /* offset 0x34 */ - u32 sdio_freq; /* offset 0x38 */ - u32 usi_freq; /* offset 0x3c */ - u32 can_line_freq; /* offset 0x40 */ - u32 debug_freq; /* offset 0x44 */ - u32 trace_freq; /* offset 0x48 */ - u32 stm_freq; /* offset 0x4c */ - u32 eth_ctrl; /* offset 0x50 */ - u32 reserved[3]; /* offset 0x54 */ - u32 osc_ctrl; /* offset 0x60 */ - u32 pll1_ctrl; /* offset 0x64 */ - u32 pll1_freq; /* offset 0x68 */ - u32 pll1_fract; /* offset 0x6c */ - u32 pll1_spread; /* offset 0x70 */ - u32 pll1_status; /* offset 0x74 */ - u32 pll2_ctrl; /* offset 0x78 */ - u32 pll2_freq; /* offset 0x7c */ - u32 pll2_fract; /* offset 0x80 */ - u32 pll2_spread; /* offset 0x84 */ - u32 pll2_status; /* offset 0x88 */ - u32 cgu_enable_1; /* offset 0x8c */ - u32 cgu_enable_2; /* offset 0x90 */ - u32 cgu_isp_pulse; /* offset 0x94 */ - u32 cgu_h264_pulse; /* offset 0x98 */ - u32 cgu_osif_pulse; /* offset 0x9c */ - u32 cgu_ren_pulse; /* offset 0xa0 */ - -}; - -/* CGU Timer */ -#define CLK_TMR_OSC 0 -#define CLK_TMR_MCLK 1 -#define CLK_TMR_PLL1 2 -#define CLK_TMR_PLL2 3 -#define MDIV_SHIFT_TMR 3 -#define DIV_SHIFT_TMR 6 - -#define TIMER1_CLK_CFG (0 << DIV_SHIFT_TMR \ - | 0 << MDIV_SHIFT_TMR | CLK_TMR_MCLK) - -/* Clock Enable/Disable */ - -#define TIMER1_CLK_EN (1 << 15) - -/* CGU Uart config */ -#define CLK_UART_MCLK 0 -#define CLK_UART_PLL1 1 -#define CLK_UART_PLL2 2 - -#define MDIV_SHIFT_UART 3 -#define DIV_SHIFT_UART 6 - -#define UART_CLK_CFG (4 << DIV_SHIFT_UART \ - | 1 << MDIV_SHIFT_UART | CLK_UART_MCLK) - -/* CGU Ethernet clock config */ -#define CLK_ETH_MCLK 0 -#define CLK_ETH_PLL1 1 -#define CLK_ETH_PLL2 2 - -#define MDIV_SHIFT_ETH 3 -#define DIV_SHIFT_ETH 6 -#define DIV_ETH_125 9 -#define DIV_ETH_50 12 -#define DIV_ETH_P2P 15 - -#define ETH_CLK_CFG (4 << DIV_ETH_P2P | 4 << DIV_ETH_50 \ - | 1 << DIV_ETH_125 \ - | 0 << DIV_SHIFT_ETH \ - | 3 << MDIV_SHIFT_ETH | CLK_ETH_PLL1) - /* CGU Ethernet control */ - -#define ETH_CLK_TX_EXT_PHY 0 -#define ETH_CLK_TX_125M 1 -#define ETH_CLK_TX_25M 2 -#define ETH_CLK_TX_2M5 3 -#define ETH_CLK_TX_DIS 7 - -#define ETH_CLK_RX_EXT_PHY 0 -#define ETH_CLK_RX_25M 1 -#define ETH_CLK_RX_2M5 2 -#define ETH_CLK_RX_DIS 3 -#define RX_CLK_SHIFT 3 -#define ETH_CLK_MASK ~(0x1F) - -#define ETH_PHY_MODE_GMII 0 -#define ETH_PHY_MODE_RMII 1 -#define ETH_PHY_CLK_DIS 1 - -#define ETH_CLK_CTRL (ETH_CLK_RX_EXT_PHY << RX_CLK_SHIFT \ - | ETH_CLK_TX_EXT_PHY) -/* CGU qspi clock */ -#define DIV_HCLK1_SHIFT 9 -#define DIV_CRYP_SHIFT 6 -#define MDIV_QSPI_SHIFT 3 - -#define CLK_QSPI_OSC 0 -#define CLK_QSPI_MCLK 1 -#define CLK_QSPI_PLL1 2 -#define CLK_QSPI_PLL2 3 - -#define QSPI_CLK_CTRL (3 << DIV_HCLK1_SHIFT \ - | 1 << DIV_CRYP_SHIFT \ - | 0 << MDIV_QSPI_SHIFT \ - | CLK_QSPI_OSC) - -#endif diff --git a/arch/arm/include/asm/arch-stv0991/stv0991_creg.h b/arch/arm/include/asm/arch-stv0991/stv0991_creg.h deleted file mode 100644 index 4d444a6df16..00000000000 --- a/arch/arm/include/asm/arch-stv0991/stv0991_creg.h +++ /dev/null @@ -1,103 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2014, STMicroelectronics - All Rights Reserved - * Author(s): Vikas Manocha, for STMicroelectronics. - */ - -#ifndef _STV0991_CREG_H -#define _STV0991_CREG_H - -struct stv0991_creg { - u32 version; /* offset 0x0 */ - u32 hdpctl; /* offset 0x4 */ - u32 hdpval; /* offset 0x8 */ - u32 hdpgposet; /* offset 0xc */ - u32 hdpgpoclr; /* offset 0x10 */ - u32 hdpgpoval; /* offset 0x14 */ - u32 stm_mux; /* offset 0x18 */ - u32 sysctrl_1; /* offset 0x1c */ - u32 sysctrl_2; /* offset 0x20 */ - u32 sysctrl_3; /* offset 0x24 */ - u32 sysctrl_4; /* offset 0x28 */ - u32 reserved_1[0x35]; /* offset 0x2C-0xFC */ - u32 mux1; /* offset 0x100 */ - u32 mux2; /* offset 0x104 */ - u32 mux3; /* offset 0x108 */ - u32 mux4; /* offset 0x10c */ - u32 mux5; /* offset 0x110 */ - u32 mux6; /* offset 0x114 */ - u32 mux7; /* offset 0x118 */ - u32 mux8; /* offset 0x11c */ - u32 mux9; /* offset 0x120 */ - u32 mux10; /* offset 0x124 */ - u32 mux11; /* offset 0x128 */ - u32 mux12; /* offset 0x12c */ - u32 mux13; /* offset 0x130 */ - u32 reserved_2[0x33]; /* offset 0x134-0x1FC */ - u32 cfg_pad1; /* offset 0x200 */ - u32 cfg_pad2; /* offset 0x204 */ - u32 cfg_pad3; /* offset 0x208 */ - u32 cfg_pad4; /* offset 0x20c */ - u32 cfg_pad5; /* offset 0x210 */ - u32 cfg_pad6; /* offset 0x214 */ - u32 cfg_pad7; /* offset 0x218 */ - u32 reserved_3[0x39]; /* offset 0x21C-0x2FC */ - u32 vdd_pad1; /* offset 0x300 */ - u32 vdd_pad2; /* offset 0x304 */ - u32 reserved_4[0x3e]; /* offset 0x308-0x3FC */ - u32 vdd_comp1; /* offset 0x400 */ -}; - -/* CREG MUX 13 register */ -#define FLASH_CS_NC_SHIFT 4 -#define FLASH_CS_NC_MASK ~(7 << FLASH_CS_NC_SHIFT) -#define CFG_FLASH_CS_NC (0 << FLASH_CS_NC_SHIFT) - -#define FLASH_CLK_SHIFT 0 -#define FLASH_CLK_MASK ~(7 << FLASH_CLK_SHIFT) -#define CFG_FLASH_CLK (0 << FLASH_CLK_SHIFT) - -/* CREG MUX 12 register */ -#define GPIOC_30_MUX_SHIFT 24 -#define GPIOC_30_MUX_MASK ~(1 << GPIOC_30_MUX_SHIFT) -#define CFG_GPIOC_30_UART_TX (1 << GPIOC_30_MUX_SHIFT) - -#define GPIOC_31_MUX_SHIFT 28 -#define GPIOC_31_MUX_MASK ~(1 << GPIOC_31_MUX_SHIFT) -#define CFG_GPIOC_31_UART_RX (1 << GPIOC_31_MUX_SHIFT) - -/* CREG MUX 7 register */ -#define GPIOB_16_MUX_SHIFT 0 -#define GPIOB_16_MUX_MASK ~(1 << GPIOB_16_MUX_SHIFT) -#define CFG_GPIOB_16_UART_TX (1 << GPIOB_16_MUX_SHIFT) - -#define GPIOB_17_MUX_SHIFT 4 -#define GPIOB_17_MUX_MASK ~(1 << GPIOB_17_MUX_SHIFT) -#define CFG_GPIOB_17_UART_RX (1 << GPIOB_17_MUX_SHIFT) - -/* CREG CFG_PAD6 register */ - -#define GPIOC_31_MODE_SHIFT 30 -#define GPIOC_31_MODE_MASK ~(1 << GPIOC_31_MODE_SHIFT) -#define CFG_GPIOC_31_MODE_OD (0 << GPIOC_31_MODE_SHIFT) -#define CFG_GPIOC_31_MODE_PP (1 << GPIOC_31_MODE_SHIFT) - -#define GPIOC_30_MODE_SHIFT 28 -#define GPIOC_30_MODE_MASK ~(1 << GPIOC_30_MODE_SHIFT) -#define CFG_GPIOC_30_MODE_LOW (0 << GPIOC_30_MODE_SHIFT) -#define CFG_GPIOC_30_MODE_HIGH (1 << GPIOC_30_MODE_SHIFT) - -/* CREG Ethernet pad config */ - -#define VDD_ETH_PS_1V8 0 -#define VDD_ETH_PS_2V5 2 -#define VDD_ETH_PS_3V3 3 -#define VDD_ETH_PS_MASK 0x3 - -#define VDD_ETH_PS_SHIFT 12 -#define ETH_VDD_CFG (VDD_ETH_PS_1V8 << VDD_ETH_PS_SHIFT) - -#define VDD_ETH_M_PS_SHIFT 28 -#define ETH_M_VDD_CFG (VDD_ETH_PS_1V8 << VDD_ETH_M_PS_SHIFT) - -#endif diff --git a/arch/arm/include/asm/arch-stv0991/stv0991_defs.h b/arch/arm/include/asm/arch-stv0991/stv0991_defs.h deleted file mode 100644 index 98d7cde85bc..00000000000 --- a/arch/arm/include/asm/arch-stv0991/stv0991_defs.h +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2014, STMicroelectronics - All Rights Reserved - * Author(s): Vikas Manocha, for STMicroelectronics. - */ - -#ifndef __STV0991_DEFS_H__ -#define __STV0991_DEFS_H__ -#include - -extern int stv0991_pinmux_config(enum periph_id); -extern int clock_setup(enum periph_clock); - -#endif diff --git a/arch/arm/include/asm/arch-stv0991/stv0991_gpt.h b/arch/arm/include/asm/arch-stv0991/stv0991_gpt.h deleted file mode 100644 index eb1ddca6002..00000000000 --- a/arch/arm/include/asm/arch-stv0991/stv0991_gpt.h +++ /dev/null @@ -1,41 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2014, STMicroelectronics - All Rights Reserved - * Author(s): Vikas Manocha, for STMicroelectronics. - */ - -#ifndef _STV0991_GPT_H -#define _STV0991_GPT_H - -#include - -struct gpt_regs { - u32 cr1; - u32 cr2; - u32 reserved_1; - u32 dier; /* dma_int_en */ - u32 sr; /* status reg */ - u32 egr; /* event gen */ - u32 reserved_2[3]; /* offset 0x18--0x20*/ - u32 cnt; - u32 psc; - u32 arr; -}; - -struct gpt_regs *const gpt1_regs_ptr = - (struct gpt_regs *) GPTIMER1_BASE_ADDR; - -/* Timer control1 register */ -#define GPT_CR1_CEN 0x0001 -#define GPT_MODE_AUTO_RELOAD (1 << 7) - -/* Timer prescalar reg */ -#define GPT_PRESCALER_128 0x128 - -/* Auto reload register for free running config */ -#define GPT_FREE_RUNNING 0xFFFF - -/* Timer, HZ specific defines */ -#define CFG_SYS_HZ_CLOCK ((27 * 1000 * 1000) / GPT_PRESCALER_128) - -#endif diff --git a/arch/arm/include/asm/arch-stv0991/stv0991_periph.h b/arch/arm/include/asm/arch-stv0991/stv0991_periph.h deleted file mode 100644 index 7a50be183d4..00000000000 --- a/arch/arm/include/asm/arch-stv0991/stv0991_periph.h +++ /dev/null @@ -1,45 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2014, STMicroelectronics - All Rights Reserved - * Author(s): Vikas Manocha, for STMicroelectronics. - */ - -#ifndef __ASM_ARM_ARCH_PERIPH_H -#define __ASM_ARM_ARCH_PERIPH_H - -/* - * Peripherals required for pinmux configuration. List will - * grow with support for more devices getting added. - * Numbering based on interrupt table. - * - */ -enum periph_id { - UART_GPIOC_30_31 = 0, - UART_GPIOB_16_17, - ETH_GPIOB_10_31_C_0_4, - QSPI_CS_CLK_PAD, - PERIPH_ID_I2C0, - PERIPH_ID_I2C1, - PERIPH_ID_I2C2, - PERIPH_ID_I2C3, - PERIPH_ID_I2C4, - PERIPH_ID_I2C5, - PERIPH_ID_I2C6, - PERIPH_ID_I2C7, - PERIPH_ID_SPI0, - PERIPH_ID_SPI1, - PERIPH_ID_SPI2, - PERIPH_ID_SDMMC0, - PERIPH_ID_SDMMC1, - PERIPH_ID_SDMMC2, - PERIPH_ID_SDMMC3, - PERIPH_ID_I2S1, -}; - -enum periph_clock { - UART_CLOCK_CFG = 0, - ETH_CLOCK_CFG, - QSPI_CLOCK_CFG, -}; - -#endif /* __ASM_ARM_ARCH_PERIPH_H */ diff --git a/arch/arm/include/asm/arch-stv0991/stv0991_wdru.h b/arch/arm/include/asm/arch-stv0991/stv0991_wdru.h deleted file mode 100644 index 8cb8a8a6137..00000000000 --- a/arch/arm/include/asm/arch-stv0991/stv0991_wdru.h +++ /dev/null @@ -1,27 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2014, STMicroelectronics - All Rights Reserved - * Author(s): Vikas Manocha, for STMicroelectronics. - */ - -#ifndef _STV0991_WD_RST_H -#define _STV0991_WD_RST_H -#include - -struct stv0991_wd_ru { - u32 wdru_config; - u32 wdru_ctrl1; - u32 wdru_ctrl2; - u32 wdru_tim; - u32 wdru_count; - u32 wdru_stat; - u32 wdru_wrlock; -}; - -struct stv0991_wd_ru *const stv0991_wd_ru_ptr = \ - (struct stv0991_wd_ru *)WDRU_BASE_ADDR; - -/* Watchdog control register */ -#define WDRU_RST_SYS 0x1 - -#endif diff --git a/board/st/stv0991/Kconfig b/board/st/stv0991/Kconfig deleted file mode 100644 index 007712f9c61..00000000000 --- a/board/st/stv0991/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -if TARGET_STV0991 - -config SYS_BOARD - default "stv0991" - -config SYS_VENDOR - default "st" - -config SYS_SOC - default "stv0991" - -config SYS_CONFIG_NAME - default "stv0991" - -endif diff --git a/board/st/stv0991/MAINTAINERS b/board/st/stv0991/MAINTAINERS deleted file mode 100644 index e7a2ccaa1f2..00000000000 --- a/board/st/stv0991/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -STV0991 APPLICATION BOARD -M: Vikas Manocha -S: Maintained -F: board/st/stv0991/ -F: include/configs/stv0991.h -F: configs/stv0991_defconfig diff --git a/board/st/stv0991/Makefile b/board/st/stv0991/Makefile deleted file mode 100644 index 7f6d719c322..00000000000 --- a/board/st/stv0991/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2014, STMicroelectronics - All Rights Reserved -# Author(s): Vikas Manocha, for STMicroelectronics. - -obj-y := stv0991.o diff --git a/board/st/stv0991/stv0991.c b/board/st/stv0991/stv0991.c deleted file mode 100644 index 57ca9f659c1..00000000000 --- a/board/st/stv0991/stv0991.c +++ /dev/null @@ -1,119 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2014, STMicroelectronics - All Rights Reserved - * Author(s): Vikas Manocha, for STMicroelectronics. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -struct gpio_regs *const gpioa_regs = - (struct gpio_regs *) GPIOA_BASE_ADDR; - -#ifndef CONFIG_OF_CONTROL -static const struct pl01x_serial_plat serial_plat = { - .base = 0x80406000, - .type = TYPE_PL011, - .clock = 2700 * 1000, -}; - -U_BOOT_DRVINFO(stv09911_serials) = { - .name = "serial_pl01x", - .plat = &serial_plat, -}; -#endif - -#if CONFIG_IS_ENABLED(BOOTSTAGE) -void show_boot_progress(int progress) -{ - printf("%i\n", progress); -} -#endif - -void enable_eth_phy(void) -{ - /* Set GPIOA_06 pad HIGH (Appli board)*/ - writel(readl(&gpioa_regs->dir) | 0x40, &gpioa_regs->dir); - writel(readl(&gpioa_regs->data) | 0x40, &gpioa_regs->data); -} -int board_eth_enable(void) -{ - stv0991_pinmux_config(ETH_GPIOB_10_31_C_0_4); - clock_setup(ETH_CLOCK_CFG); - enable_eth_phy(); - return 0; -} - -int board_qspi_enable(void) -{ - stv0991_pinmux_config(QSPI_CS_CLK_PAD); - clock_setup(QSPI_CLOCK_CFG); - return 0; -} - -/* - * Miscellaneous platform dependent initialisations - */ -int board_init(void) -{ - board_eth_enable(); - board_qspi_enable(); - return 0; -} - -int board_uart_init(void) -{ - stv0991_pinmux_config(UART_GPIOC_30_31); - clock_setup(UART_CLOCK_CFG); - return 0; -} - -#ifdef CONFIG_BOARD_EARLY_INIT_F -int board_early_init_f(void) -{ - board_uart_init(); - return 0; -} -#endif - -int dram_init(void) -{ - gd->ram_size = PHYS_SDRAM_1_SIZE; - return 0; -} - -int dram_init_banksize(void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - return 0; -} - -#ifdef CONFIG_CMD_NET -int board_eth_init(struct bd_info *bis) -{ - int ret = 0; - -#if defined(CONFIG_ETH_DESIGNWARE) - u32 interface = PHY_INTERFACE_MODE_MII; - if (designware_initialize(GMAC_BASE_ADDR, interface) >= 0) - ret++; -#endif - return ret; -} -#endif diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig deleted file mode 100644 index e70db42d742..00000000000 --- a/configs/stv0991_defconfig +++ /dev/null @@ -1,44 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_DCACHE_OFF=y -CONFIG_TARGET_STV0991=y -CONFIG_TEXT_BASE=0x00010000 -CONFIG_SYS_MALLOC_LEN=0x14000 -CONFIG_NR_DRAM_BANKS=1 -CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_OFFSET=0x30000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_DEFAULT_DEVICE_TREE="stv0991" -CONFIG_SYS_LOAD_ADDR=0x0 -CONFIG_ENV_ADDR=0x188000 -CONFIG_SYS_MEMTEST_START=0x00000000 -CONFIG_SYS_MEMTEST_END=0x00100000 -CONFIG_BOOTDELAY=3 -CONFIG_AUTOBOOT_KEYED=y -CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" -CONFIG_AUTOBOOT_STOP_STR=" " -CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="go 0x40040000" -CONFIG_SYS_PBSIZE=1050 -# CONFIG_DISPLAY_CPUINFO is not set -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_BOARD_EARLY_INIT_F=y -# CONFIG_AUTO_COMPLETE is not set -CONFIG_SYS_PROMPT="STV0991> " -CONFIG_CMD_MEMTEST=y -CONFIG_CMD_SPI=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_PING=y -CONFIG_OF_CONTROL=y -CONFIG_ENV_IS_IN_SPI_FLASH=y -# CONFIG_MMC is not set -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_WINBOND=y -CONFIG_PHY_MICREL=y -CONFIG_PHY_MICREL_KSZ8XXX=y -CONFIG_PHY_RESET_DELAY=10000 -CONFIG_ETH_DESIGNWARE=y -CONFIG_DW_ALTDESCRIPTOR=y -CONFIG_MII=y -CONFIG_CADENCE_QSPI=y -CONFIG_HAS_CQSPI_REF_CLK=y -CONFIG_CQSPI_REF_CLK=3000000 diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h deleted file mode 100644 index 7eadb6d421e..00000000000 --- a/include/configs/stv0991.h +++ /dev/null @@ -1,25 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2014, STMicroelectronics - All Rights Reserved - * Author(s): Vikas Manocha, for STMicroelectronics. - */ - -#ifndef __CONFIG_STV0991_H -#define __CONFIG_STV0991_H -#define CFG_SYS_EXCEPTION_VECTORS_HIGH - -/* ram memory-related information */ -#define PHYS_SDRAM_1 0x00000000 -#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define PHYS_SDRAM_1_SIZE 0x00198000 - -/* user interface */ - -/* MISC */ -#define CFG_SYS_INIT_RAM_SIZE 0x8000 -#define CFG_SYS_INIT_RAM_ADDR 0x00190000 -/* U-Boot Load Address */ - -/* Misc configuration */ - -#endif /* __CONFIG_H */