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sunxi: clock: H6: Adjust PLL LDO before clock setup
BSP boot0 adjust PLL LDO regulator before clocks are initialized. Let's do that. Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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@ -21,6 +21,13 @@ void clock_init_safe(void)
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clrbits_le32(&prcm->res_cal_ctrl, 1);
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clrbits_le32(&prcm->res_cal_ctrl, 1);
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setbits_le32(&prcm->res_cal_ctrl, 1);
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setbits_le32(&prcm->res_cal_ctrl, 1);
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if (IS_ENABLED(CONFIG_MACH_SUN50I_H6)) {
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/* set key field for ldo enable */
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setbits_le32(&prcm->pll_ldo_cfg, 0xA7000000);
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/* set PLL VDD LDO output to 1.14 V */
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setbits_le32(&prcm->pll_ldo_cfg, 0x60000);
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}
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clock_set_pll1(408000000);
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clock_set_pll1(408000000);
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writel(CCM_PLL6_DEFAULT, &ccm->pll6_cfg);
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writel(CCM_PLL6_DEFAULT, &ccm->pll6_cfg);
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