From c8da6513c054c150640e8ad12185bd53ae1852fc Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 9 Jul 2020 15:57:56 +0200 Subject: [PATCH 01/31] xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek --- board/xilinx/common/board.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index 0469e2e7ac9..3bca3a25a97 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -86,5 +86,8 @@ int board_late_init_xilinx(void) initrd_hi = round_down(initrd_hi, SZ_16M); env_set_addr("initrd_high", (void *)initrd_hi); + env_set_addr("bootm_low", (void *)gd->ram_base); + env_set_addr("bootm_size", (void *)gd->ram_size); + return 0; } From 664e16ce99a0c04ba7ea06892ebafdc2071aefe9 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 6 Aug 2020 15:18:36 +0200 Subject: [PATCH 02/31] xilinx: kconfig: Change Kconfig dependencies for Xilinx drivers Zynq/ZynqMP/Versal IPs should be possible to called also from Microblaze in PL and vice versa. That's why change dependencies and do not limit enabling just for some platforms. Signed-off-by: Michal Simek Reviewed-by: Heiko Schocher --- drivers/gpio/Kconfig | 4 ++-- drivers/i2c/Kconfig | 2 +- drivers/mmc/Kconfig | 1 - drivers/net/Kconfig | 6 +++--- 4 files changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 11e9a17f972..202fcc6f475 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -381,8 +381,8 @@ config MVEBU_GPIO config ZYNQ_GPIO bool "Zynq GPIO driver" - depends on DM_GPIO && (ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL) - default y + depends on DM_GPIO + default y if ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL help Supports GPIO access on Zynq SoC. diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index dec6dc9dfa4..8ae54e1e93b 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -88,7 +88,7 @@ config SYS_I2C_FSL config SYS_I2C_CADENCE tristate "Cadence I2C Controller" - depends on DM_I2C && (ARCH_ZYNQ || ARM64) + depends on DM_I2C help Say yes here to select Cadence I2C Host Controller. This controller is e.g. used by Xilinx Zynq. diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 556b3ac4897..c29d1ea680e 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -653,7 +653,6 @@ config TEGRA124_MMC_DISABLE_EXT_LOOPBACK config MMC_SDHCI_ZYNQ bool "Arasan SDHCI controller support" - depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL depends on DM_MMC && OF_CONTROL && BLK depends on MMC_SDHCI help diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index ecd779d979e..039f9fb0589 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -519,7 +519,7 @@ config TULIP This driver supports DEC DC2114x Fast ethernet chips. config XILINX_AXIEMAC - depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP) + depends on DM_ETH select PHYLIB select MII bool "Xilinx AXI Ethernet" @@ -527,7 +527,7 @@ config XILINX_AXIEMAC This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs. config XILINX_EMACLITE - depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || MIPS) + depends on DM_ETH select PHYLIB select MII bool "Xilinx Ethernetlite" @@ -535,7 +535,7 @@ config XILINX_EMACLITE This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs. config ZYNQ_GEM - depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL) + depends on DM_ETH select PHYLIB bool "Xilinx Ethernet GEM" help From 834de8984241efaa7124358f4aafd2e2cb803b50 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 18 Aug 2020 14:15:01 +0200 Subject: [PATCH 03/31] xilinx: Enable preboot feature for ZynqMP and Versal Enable preboot functionality for ZynqMP and Versal platforms. Signed-off-by: Michal Simek --- configs/xilinx_versal_virt_defconfig | 1 + configs/xilinx_zynqmp_virt_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index 5075cf2f688..49138278f1e 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -9,6 +9,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=5 +CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SYS_PROMPT="Versal> " diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index cf07df8145c..7ed88ae0940 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -15,6 +15,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000000 +CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y From 1b208d59bac12da6f8bd2f7d9e9482fa16340705 Mon Sep 17 00:00:00 2001 From: Igor Lantsman Date: Wed, 24 Jun 2020 14:33:46 +0200 Subject: [PATCH 04/31] arm64: zynqmp: Fix set_fdtfile() not to break u-boots DTB Origin function was calling strsep which replaced delimiter ',' by a null byte ('\0'). Operation was done directly on FDT which ends up with the following behavior: ZynqMP> printenv fdtfile fdtfile=xilinx/zynqmp.dtb ZynqMP> fdt addr $fdtcontroladdr ZynqMP> fdt print / compatible compatible = "xlnx", "zynqmp" As is visible fdtfile was correctly composed but a null byte caused that xlnx was separated from zynqmp. This hasn't been spotted because in all Xilinx DTs there are at least 3 compatible string and only the first one was affected by this issue. But for systems which only had one compatible string "xlnx,zynqmp" it was causing an issue when U-Boot's DT was used by Linux kernel. The patch removes strsep calling and strchr is called instead which just locate the first char after deliminator ',' (variable called "name"). And using this pointer in fdtfile composing. Fixes: 91d7e0c47f51 ("arm64: zynqmp: Create fdtfile from compatible string") Reported-by: Igor Lantsman Signed-off-by: Igor Lantsman Signed-off-by: Michal Simek --- board/xilinx/zynqmp/zynqmp.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index ebb71729081..8a4df6fc1ab 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -541,23 +541,30 @@ static int set_fdtfile(void) char *compatible, *fdtfile; const char *suffix = ".dtb"; const char *vendor = "xilinx/"; + int fdt_compat_len; if (env_get("fdtfile")) return 0; - compatible = (char *)fdt_getprop(gd->fdt_blob, 0, "compatible", NULL); - if (compatible) { + compatible = (char *)fdt_getprop(gd->fdt_blob, 0, "compatible", + &fdt_compat_len); + if (compatible && fdt_compat_len) { + char *name; + debug("Compatible: %s\n", compatible); - /* Discard vendor prefix */ - strsep(&compatible, ","); + name = strchr(compatible, ','); + if (!name) + return -EINVAL; - fdtfile = calloc(1, strlen(vendor) + strlen(compatible) + + name++; + + fdtfile = calloc(1, strlen(vendor) + strlen(name) + strlen(suffix) + 1); if (!fdtfile) return -ENOMEM; - sprintf(fdtfile, "%s%s%s", vendor, compatible, suffix); + sprintf(fdtfile, "%s%s%s", vendor, name, suffix); env_set("fdtfile", fdtfile); free(fdtfile); From 526a67eb35cb1b6cea2b269c9690550dee232b74 Mon Sep 17 00:00:00 2001 From: T Karthik Reddy Date: Wed, 24 Jun 2020 03:23:57 -0600 Subject: [PATCH 05/31] xilinx: versal: Add new versal loadpdi command Versal loadpdi command is used for loading secure & non-secure pdi images. Signed-off-by: T Karthik Reddy Signed-off-by: Michal Simek --- arch/arm/Kconfig | 1 + board/xilinx/versal/Kconfig | 14 +++++ board/xilinx/versal/Makefile | 1 + board/xilinx/versal/cmds.c | 105 +++++++++++++++++++++++++++++++++++ 4 files changed, 121 insertions(+) create mode 100644 board/xilinx/versal/Kconfig create mode 100644 board/xilinx/versal/cmds.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 84018516668..a3930b57141 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1962,6 +1962,7 @@ source "board/vscom/baltos/Kconfig" source "board/xilinx/Kconfig" source "board/xilinx/zynq/Kconfig" source "board/xilinx/zynqmp/Kconfig" +source "board/xilinx/versal/Kconfig" source "board/phytium/durian/Kconfig" source "board/xen/xenguest_arm64/Kconfig" diff --git a/board/xilinx/versal/Kconfig b/board/xilinx/versal/Kconfig new file mode 100644 index 00000000000..c0cccc2068b --- /dev/null +++ b/board/xilinx/versal/Kconfig @@ -0,0 +1,14 @@ +# Copyright (c) 2020, Xilinx, Inc. +# +# SPDX-License-Identifier: GPL-2.0 + +if ARCH_VERSAL + +config CMD_VERSAL + bool "Enable Versal specific commands" + default y + depends on ZYNQMP_FIRMWARE + help + Enable Versal specific commands. + +endif diff --git a/board/xilinx/versal/Makefile b/board/xilinx/versal/Makefile index e9307d7fa69..90e03431540 100644 --- a/board/xilinx/versal/Makefile +++ b/board/xilinx/versal/Makefile @@ -5,4 +5,5 @@ # obj-y := board.o +obj-$(CONFIG_CMD_VERSAL) += cmds.o obj-y += ../common/board.o diff --git a/board/xilinx/versal/cmds.c b/board/xilinx/versal/cmds.c new file mode 100644 index 00000000000..981c80ee474 --- /dev/null +++ b/board/xilinx/versal/cmds.c @@ -0,0 +1,105 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * (C) Copyright 2020 Xilinx, Inc. + * Michal Simek + */ + +#include +#include +#include +#include +#include +#include +#include + +static int do_versal_load_pdi(struct cmd_tbl *cmdtp, int flag, int argc, + char * const argv[]) +{ + u32 buf_lo, buf_hi; + u32 ret_payload[5]; + ulong addr, *pdi_buf; + size_t len; + int ret; + + if (argc != cmdtp->maxargs) { + debug("pdi_load: incorrect parameters passed\n"); + return CMD_RET_USAGE; + } + + addr = simple_strtol(argv[2], NULL, 16); + if (!addr) { + debug("pdi_load: zero pdi_data address\n"); + return CMD_RET_USAGE; + } + + len = simple_strtoul(argv[3], NULL, 16); + if (!len) { + debug("pdi_load: zero size\n"); + return CMD_RET_USAGE; + } + + pdi_buf = (ulong *)ALIGN((ulong)addr, ARCH_DMA_MINALIGN); + if ((ulong)addr != (ulong)pdi_buf) { + memcpy((void *)pdi_buf, (void *)addr, len); + debug("Pdi addr:0x%lx aligned to 0x%lx\n", + addr, (ulong)pdi_buf); + } + + flush_dcache_range((ulong)pdi_buf, (ulong)pdi_buf + len); + + buf_lo = lower_32_bits((ulong)pdi_buf); + buf_hi = upper_32_bits((ulong)pdi_buf); + + ret = xilinx_pm_request(VERSAL_PM_LOAD_PDI, VERSAL_PM_PDI_TYPE, buf_lo, + buf_hi, 0, ret_payload); + if (ret) + printf("PDI load failed with err: 0x%08x\n", ret); + + return ret; +} + +static struct cmd_tbl cmd_versal_sub[] = { + U_BOOT_CMD_MKENT(loadpdi, 4, 1, do_versal_load_pdi, "", ""), +}; + +/** + * do_versal - Handle the "versal" command-line command + * @cmdtp: Command data struct pointer + * @flag: Command flag + * @argc: Command-line argument count + * @argv: Array of command-line arguments + * + * Processes the versal specific commands + * + * Return: return 0 on success, Error value if command fails. + * CMD_RET_USAGE incase of incorrect/missing parameters. + */ +static int do_versal(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + struct cmd_tbl *c; + int ret = CMD_RET_USAGE; + + if (argc < 2) + return CMD_RET_USAGE; + + c = find_cmd_tbl(argv[1], &cmd_versal_sub[0], + ARRAY_SIZE(cmd_versal_sub)); + if (c) + ret = c->cmd(c, flag, argc, argv); + + return cmd_process_error(c, ret); +} + +#ifdef CONFIG_SYS_LONGHELP +static char versal_help_text[] = + "loadpdi addr len - Load pdi image\n" + "load pdi image at ddr address 'addr' with pdi image size 'len'\n" +; +#endif + +U_BOOT_CMD(versal, 4, 1, do_versal, + "versal sub-system", + versal_help_text +) + From 11b1dcec09f035e3b70a2fc63913ab00991ecba7 Mon Sep 17 00:00:00 2001 From: Ibai Erkiaga Date: Thu, 2 Jul 2020 00:10:58 +0100 Subject: [PATCH 06/31] versal: fix versal PM ret payload size The PM return payload size is defined as 4 bytes for Versal arquitecture while the PM calls implemented both in the Versal clock driver and ZynqMP firmware driver expects 5 bytes length. Signed-off-by: Ibai Erkiaga Signed-off-by: Michal Simek --- arch/arm/mach-versal/include/mach/sys_proto.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-versal/include/mach/sys_proto.h b/arch/arm/mach-versal/include/mach/sys_proto.h index 31af049a21c..cfd480bec17 100644 --- a/arch/arm/mach-versal/include/mach/sys_proto.h +++ b/arch/arm/mach-versal/include/mach/sys_proto.h @@ -8,7 +8,7 @@ enum { TCM_SPLIT, }; -#define PAYLOAD_ARG_CNT 4U +#define PAYLOAD_ARG_CNT 5U void tcm_init(u8 mode); void mem_map_fill(void); From 7fce7396659c162f55b1747d84599d822b11c6a7 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 9 Jul 2020 14:09:52 +0200 Subject: [PATCH 07/31] lib: fdt: Introduce fdtdec_setup_mem_size_base_lowest() New function should be called from board dram_init() because it initialized gd->ram_base/ram_size. It finds the lowest available memory. On systems with multiple memory nodes finding out the first memory node by fdtdec_setup_mem_size_base() is not enough because this memory can be above actual U-Boot VA mapping. Currently only mapping till 39bit is supported (Full 44bit mapping was removed by commit 7985cdf74b28 ("arm64: Remove non-full-va map code")). If DT starts with the first memory node above 39bit address then system can be unpredictable. The function is available only when multiple memory bank support is enabled. Calling fdtdec_setup_memory_banksize() from dram_init() is not possible because fdtdec_setup_memory_banksize() is saving dram information to bd structure which is placed on stack but not initialized at this time. Also stack is placed at location setup in dram_init(). Signed-off-by: Michal Simek Reviewed-by: Simon Glass --- include/fdtdec.h | 17 +++++++++++++++++ lib/fdtdec.c | 45 +++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 62 insertions(+) diff --git a/include/fdtdec.h b/include/fdtdec.h index 760b392bdfb..bc79389260a 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -926,6 +926,23 @@ int fdtdec_decode_display_timing(const void *blob, int node, int index, */ int fdtdec_setup_mem_size_base(void); +/** + * fdtdec_setup_mem_size_base_lowest() - decode and setup gd->ram_size and + * gd->ram_start by lowest available memory base + * + * Decode the /memory 'reg' property to determine the lowest start of the memory + * bank bank and populate the global data with it. + * + * This function should be called from a boards dram_init(). This helper + * function allows for boards to query the device tree for DRAM size and start + * address instead of hard coding the value in the case where the memory size + * and start address cannot be detected automatically. + * + * @return 0 if OK, -EINVAL if the /memory node or reg property is missing or + * invalid + */ +int fdtdec_setup_mem_size_base_lowest(void); + /** * fdtdec_setup_memory_banksize() - decode and populate gd->bd->bi_dram * diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 78576b530fd..da94bc5e15a 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -1106,6 +1106,51 @@ int fdtdec_setup_memory_banksize(void) return 0; } + +int fdtdec_setup_mem_size_base_lowest(void) +{ + int bank, ret, mem, reg = 0; + struct fdt_resource res; + unsigned long base; + phys_size_t size; + const void *blob = gd->fdt_blob; + + gd->ram_base = (unsigned long)~0; + + mem = get_next_memory_node(blob, -1); + if (mem < 0) { + debug("%s: Missing /memory node\n", __func__); + return -EINVAL; + } + + for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { + ret = fdt_get_resource(blob, mem, "reg", reg++, &res); + if (ret == -FDT_ERR_NOTFOUND) { + reg = 0; + mem = get_next_memory_node(blob, mem); + if (mem == -FDT_ERR_NOTFOUND) + break; + + ret = fdt_get_resource(blob, mem, "reg", reg++, &res); + if (ret == -FDT_ERR_NOTFOUND) + break; + } + if (ret != 0) + return -EINVAL; + + base = (unsigned long)res.start; + size = (phys_size_t)(res.end - res.start + 1); + + if (gd->ram_base > base && size) { + gd->ram_base = base; + gd->ram_size = size; + debug("%s: Initial DRAM base %lx size %lx\n", + __func__, base, (unsigned long)size); + } + } + + return 0; +} #endif #if CONFIG_IS_ENABLED(MULTI_DTB_FIT) From c2f0950c33ef9d89573609b6352a9964af8833a1 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 10 Jul 2020 13:34:44 +0200 Subject: [PATCH 08/31] lib: fdt: Convert fdtdes_setup_mem..() to livetree API Convert fdtdec_setup_mem_size_base(), get_next_memory_node(), fdtdec_setup_memory_banksize() and fdtdec_setup_mem_size_base_lowest() to livetree API. Tested on ZynqMP zcu104 board. Signed-off-by: Michal Simek Reviewed-by: Simon Glass --- lib/fdtdec.c | 67 +++++++++++++++++++++++++++------------------------- 1 file changed, 35 insertions(+), 32 deletions(-) diff --git a/lib/fdtdec.c b/lib/fdtdec.c index da94bc5e15a..30a1c6a217b 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -24,6 +24,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -1032,16 +1033,17 @@ int fdtdec_decode_display_timing(const void *blob, int parent, int index, int fdtdec_setup_mem_size_base(void) { - int ret, mem; - struct fdt_resource res; + int ret; + ofnode mem; + struct resource res; - mem = fdt_path_offset(gd->fdt_blob, "/memory"); - if (mem < 0) { + mem = ofnode_path("/memory"); + if (!ofnode_valid(mem)) { debug("%s: Missing /memory node\n", __func__); return -EINVAL; } - ret = fdt_get_resource(gd->fdt_blob, mem, "reg", 0, &res); + ret = ofnode_read_resource(mem, 0, &res); if (ret != 0) { debug("%s: Unable to decode first memory bank\n", __func__); return -EINVAL; @@ -1057,42 +1059,42 @@ int fdtdec_setup_mem_size_base(void) #if defined(CONFIG_NR_DRAM_BANKS) -static int get_next_memory_node(const void *blob, int mem) +ofnode get_next_memory_node(ofnode mem) { do { - mem = fdt_node_offset_by_prop_value(gd->fdt_blob, mem, - "device_type", "memory", 7); - } while (!fdtdec_get_is_enabled(blob, mem)); + mem = ofnode_by_prop_value(mem, "device_type", "memory", 7); + } while (!ofnode_is_available(mem)); return mem; } int fdtdec_setup_memory_banksize(void) { - int bank, ret, mem, reg = 0; - struct fdt_resource res; + int bank, ret, reg = 0; + struct resource res; + ofnode mem = ofnode_null(); - mem = get_next_memory_node(gd->fdt_blob, -1); - if (mem < 0) { + mem = get_next_memory_node(mem); + if (!ofnode_valid(mem)) { debug("%s: Missing /memory node\n", __func__); return -EINVAL; } for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { - ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res); - if (ret == -FDT_ERR_NOTFOUND) { + ret = ofnode_read_resource(mem, reg++, &res); + if (ret < 0) { reg = 0; - mem = get_next_memory_node(gd->fdt_blob, mem); - if (mem == -FDT_ERR_NOTFOUND) + mem = get_next_memory_node(mem); + if (ofnode_valid(mem)) break; - ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res); - if (ret == -FDT_ERR_NOTFOUND) + ret = ofnode_read_resource(mem, reg++, &res); + if (ret < 0) break; } - if (ret != 0) { + + if (ret != 0) return -EINVAL; - } gd->bd->bi_dram[bank].start = (phys_addr_t)res.start; gd->bd->bi_dram[bank].size = @@ -1109,32 +1111,33 @@ int fdtdec_setup_memory_banksize(void) int fdtdec_setup_mem_size_base_lowest(void) { - int bank, ret, mem, reg = 0; - struct fdt_resource res; + int bank, ret, reg = 0; + struct resource res; unsigned long base; phys_size_t size; - const void *blob = gd->fdt_blob; + ofnode mem = ofnode_null(); gd->ram_base = (unsigned long)~0; - mem = get_next_memory_node(blob, -1); - if (mem < 0) { + mem = get_next_memory_node(mem); + if (!ofnode_valid(mem)) { debug("%s: Missing /memory node\n", __func__); return -EINVAL; } for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { - ret = fdt_get_resource(blob, mem, "reg", reg++, &res); - if (ret == -FDT_ERR_NOTFOUND) { + ret = ofnode_read_resource(mem, reg++, &res); + if (ret < 0) { reg = 0; - mem = get_next_memory_node(blob, mem); - if (mem == -FDT_ERR_NOTFOUND) + mem = get_next_memory_node(mem); + if (ofnode_valid(mem)) break; - ret = fdt_get_resource(blob, mem, "reg", reg++, &res); - if (ret == -FDT_ERR_NOTFOUND) + ret = ofnode_read_resource(mem, reg++, &res); + if (ret < 0) break; } + if (ret != 0) return -EINVAL; From 22b6bb6ccd65e9d57b284895401de6b35d3b5ed9 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 10 Jul 2020 12:42:09 +0200 Subject: [PATCH 09/31] xilinx: versal: Use lowest memory for U-Boot Find and use the lowest memory for Versal to make sure that we keep u-boot as low as possible and never use memory above u-boot's maximum VA mapping. Signed-off-by: Michal Simek --- board/xilinx/versal/board.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c index 45cf1d2d0ca..3dc7044b213 100644 --- a/board/xilinx/versal/board.c +++ b/board/xilinx/versal/board.c @@ -229,7 +229,7 @@ int dram_init_banksize(void) int dram_init(void) { - if (fdtdec_setup_mem_size_base() != 0) + if (fdtdec_setup_mem_size_base_lowest() != 0) return -EINVAL; return 0; From 8d00d224c97b3c871afa12ce53249fef99ee403a Mon Sep 17 00:00:00 2001 From: Ashok Reddy Soma Date: Mon, 6 Apr 2020 07:58:32 -0600 Subject: [PATCH 10/31] arm64: zynqmp: Reduce malloc memory for mini QSPI configuration Mini U-boot runs on lower foot print of 256KB OCM. Hence 8K memory for malloc may not be required. Reduce it by 1.5K. Signed-off-by: Ashok Reddy Soma Signed-off-by: Michal Simek --- include/configs/xilinx_zynqmp_mini_qspi.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/xilinx_zynqmp_mini_qspi.h b/include/configs/xilinx_zynqmp_mini_qspi.h index 129af6e9329..205ddb4ae09 100644 --- a/include/configs/xilinx_zynqmp_mini_qspi.h +++ b/include/configs/xilinx_zynqmp_mini_qspi.h @@ -13,6 +13,6 @@ #include #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x20000) -#define CONFIG_SYS_MALLOC_LEN 0x2000 +#define CONFIG_SYS_MALLOC_LEN 0x1a00 #endif /* __CONFIG_ZYNQMP_MINI_QSPI_H */ From 9643000e1402b7f1bb2961166d4ab03785893b7a Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 15 Jul 2020 15:43:52 +0200 Subject: [PATCH 11/31] xilinx: Align dfu ram with booti command Image should be loaded to 0x80000 address and not to $kernel_addr_r. Also kernel_addr, fdt_addr and fdt_size in zynqmp case are not defined that's why define it to be aligned with Versal. Signed-off-by: Michal Simek --- include/configs/xilinx_versal.h | 2 +- include/configs/xilinx_zynqmp.h | 6 ++++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index 804525dcad2..32cd5b21f7b 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -54,7 +54,7 @@ #define DFU_ALT_INFO_RAM \ "dfu_ram_info=" \ "setenv dfu_alt_info " \ - "Image ram $kernel_addr_r $kernel_size_r\\\\;" \ + "Image ram 80000 $kernel_size_r\\\\;" \ "system.dtb ram $fdt_addr_r $fdt_size_r\0" \ "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ "thor_ram=run dfu_ram_info && thordown 0 ram 0\0" diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 72aea1285f9..bbcdc48c749 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -58,8 +58,8 @@ #define DFU_ALT_INFO_RAM \ "dfu_ram_info=" \ "setenv dfu_alt_info " \ - "Image ram $kernel_addr $kernel_size\\\\;" \ - "system.dtb ram $fdt_addr $fdt_size\0" \ + "Image ram 80000 $kernel_size_r\\\\;" \ + "system.dtb ram $fdt_addr_r $fdt_size_r\0" \ "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ "thor_ram=run dfu_ram_info && thordown 0 ram 0\0" @@ -101,8 +101,10 @@ #define ENV_MEM_LAYOUT_SETTINGS \ "fdt_high=10000000\0" \ "fdt_addr_r=0x40000000\0" \ + "fdt_size_r=0x400000\0" \ "pxefile_addr_r=0x10000000\0" \ "kernel_addr_r=0x18000000\0" \ + "kernel_size_r=0x10000000\0" \ "scriptaddr=0x20000000\0" \ "ramdisk_addr_r=0x02100000\0" \ "script_size_f=0x80000\0" \ From 2d06361a11e88e6ca5bbd11e3ed5717d7715bfe1 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 15 Jul 2020 14:20:34 +0200 Subject: [PATCH 12/31] xilinx: zynqmp: Enable DFU tftp support Enable DFU tftp support for firmware update. Fill dfu_ram_tftp variable to have command present for showing how to use it. boot FIT image has been created from below fragment. Key part is that type of image has to be firmware. Also based on experiment load property is completely ignored and base addresses are taken from dfu_alt_info variable. $ cat update_uboot.its /dts-v1/; / { description = "Automatic U-Boot update"; #address-cells = <1>; images { Image { description = "Kernel"; data = /incbin/("/tftpboot/Image"); compression = "none"; arch = "arm64"; type = "firmware"; os = "linux"; load = <0x80000>; entry = <0x80000>; hash-1 { algo = "sha1"; }; }; system.dtb { description = "DTB"; data = /incbin/("/tftpboot/system.dtb"); compression = "none"; arch = "arm64"; type = "firmware"; load = <0>; hash-1 { algo = "sha1"; }; }; }; }; $ mkimage -f update_uboot.its /tftpboot/boot When U-Boot starts get IP address and server IP. dhcp setenv serverip 192.168.0.105 And then run prepared command. run dfu_ram_tftp Signed-off-by: Michal Simek --- configs/xilinx_zynqmp_virt_defconfig | 1 + include/configs/xilinx_zynqmp.h | 4 +++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 7ed88ae0940..a0984c80453 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -66,6 +66,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_CLK_ZYNQMP=y +CONFIG_DFU_TFTP=y CONFIG_DFU_RAM=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_FLASH=y diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index bbcdc48c749..7c24bf632e3 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -61,7 +61,9 @@ "Image ram 80000 $kernel_size_r\\\\;" \ "system.dtb ram $fdt_addr_r $fdt_size_r\0" \ "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ - "thor_ram=run dfu_ram_info && thordown 0 ram 0\0" + "thor_ram=run dfu_ram_info && thordown 0 ram 0\0" \ + "dfu_ram_tftp=run dfu_ram_info && setenv updatefile boot && " \ + "setenv loadaddr 10000000 && dfu tftp ram 0\0" #define DFU_ALT_INFO \ DFU_ALT_INFO_RAM From f692b479f02d9b2689b0686f1f6ff2f06c6ecc59 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 28 May 2020 11:48:55 +0200 Subject: [PATCH 13/31] i2c: eeprom: Use reg property instead of offset and size Remove adhoc dt binding for fixed-partition definition for i2c eeprom. fixed-partition are using reg property instead of offset/size pair. Signed-off-by: Michal Simek Reviewed-by: Simon Glass --- arch/arm/dts/imx53-ppd-uboot.dtsi | 12 ++++++------ arch/arm/dts/imx6q-bx50v3-uboot.dtsi | 10 +++++----- arch/sandbox/dts/test.dts | 13 +++++++++++++ configs/sandbox_defconfig | 1 + drivers/misc/i2c_eeprom.c | 15 ++++++++------- test/dm/bootcount.c | 8 ++++++++ 6 files changed, 41 insertions(+), 18 deletions(-) diff --git a/arch/arm/dts/imx53-ppd-uboot.dtsi b/arch/arm/dts/imx53-ppd-uboot.dtsi index d38a1bc264c..d61b7cb8764 100644 --- a/arch/arm/dts/imx53-ppd-uboot.dtsi +++ b/arch/arm/dts/imx53-ppd-uboot.dtsi @@ -24,15 +24,15 @@ &eeprom { partitions { compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - vpd { - offset = <0>; - size = <1022>; + vpd@0 { + reg = <0 1022>; }; - bootcount: bootcount { - offset = <1022>; - size = <2>; + bootcount: bootcount@1022 { + reg = <1022 2>; }; }; }; diff --git a/arch/arm/dts/imx6q-bx50v3-uboot.dtsi b/arch/arm/dts/imx6q-bx50v3-uboot.dtsi index df446e0ed14..01321cab781 100644 --- a/arch/arm/dts/imx6q-bx50v3-uboot.dtsi +++ b/arch/arm/dts/imx6q-bx50v3-uboot.dtsi @@ -23,15 +23,15 @@ &eeprom { partitions { compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - vpd { - offset = <0>; - size = <1022>; + vpd@0 { + reg = <0 1022>; }; bootcount: bootcount { - offset = <1022>; - size = <2>; + reg = <1022 2>; }; }; }; diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 491893a17dc..692c3775dde 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -415,6 +415,14 @@ reg = <0x2c>; compatible = "i2c-eeprom"; sandbox,emul = <&emul_eeprom>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + bootcount_i2c: bootcount@10 { + reg = <10 2>; + }; + }; }; rtc_0: rtc@43 { @@ -462,6 +470,11 @@ offset = <0x13>; }; + bootcount { + compatible = "u-boot,bootcount-i2c-eeprom"; + i2c-eeprom = <&bootcount_i2c>; + }; + adc@0 { compatible = "sandbox,adc"; vdd-supply = <&buck2>; diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index fe111289049..acd70933359 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -119,6 +119,7 @@ CONFIG_DM_BOOTCOUNT=y CONFIG_DM_BOOTCOUNT_RTC=y CONFIG_BUTTON=y CONFIG_BUTTON_GPIO=y +CONFIG_DM_BOOTCOUNT_I2C_EEPROM=y CONFIG_CLK=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_SANDBOX_CLK_CCF=y diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c index 45c34d388c8..3651ba4871e 100644 --- a/drivers/misc/i2c_eeprom.c +++ b/drivers/misc/i2c_eeprom.c @@ -301,19 +301,20 @@ static int i2c_eeprom_partition_probe(struct udevice *dev) static int i2c_eeprom_partition_ofdata_to_platdata(struct udevice *dev) { struct i2c_eeprom_partition *priv = dev_get_priv(dev); - u32 offset, size; + u32 reg[2]; int ret; - ret = dev_read_u32(dev, "offset", &offset); + ret = dev_read_u32_array(dev, "reg", reg, 2); if (ret) return ret; - ret = dev_read_u32(dev, "size", &size); - if (ret) - return ret; + if (!reg[1]) + return -EINVAL; - priv->offset = offset; - priv->size = size; + priv->offset = reg[0]; + priv->size = reg[1]; + + debug("%s: base %x, size %x\n", __func__, priv->offset, priv->size); return 0; } diff --git a/test/dm/bootcount.c b/test/dm/bootcount.c index f911984698d..e0c47b5d7a6 100644 --- a/test/dm/bootcount.c +++ b/test/dm/bootcount.c @@ -25,6 +25,14 @@ static int dm_test_bootcount(struct unit_test_state *uts) ut_assertok(dm_bootcount_get(dev, &val)); ut_assert(val == 0xab); + ut_assertok(uclass_get_device(UCLASS_BOOTCOUNT, 1, &dev)); + ut_assertok(dm_bootcount_set(dev, 0)); + ut_assertok(dm_bootcount_get(dev, &val)); + ut_assert(val == 0); + ut_assertok(dm_bootcount_set(dev, 0xab)); + ut_assertok(dm_bootcount_get(dev, &val)); + ut_assert(val == 0xab); + return 0; } From 01a6da166102f5751985efef4504ac3c2c094d61 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 22 Jul 2020 17:42:43 +0200 Subject: [PATCH 14/31] xilinx: Fix xlnx,mio_bank property s/xlnx,mio_bank/xlnx,mio-bank/g DT binding is describing mio-bank not mio_bank that's why fix all DTSes and also driver itself. Signed-off-by: Michal Simek Acked-by: Peng Fan --- arch/arm/dts/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dts | 2 +- arch/arm/dts/avnet-ultrazedev-som-v1.0.dtsi | 2 +- arch/arm/dts/versal-mini-emmc0.dts | 2 +- arch/arm/dts/versal-mini-emmc1.dts | 2 +- arch/arm/dts/zynqmp-e-a2197-00-revA.dts | 2 +- arch/arm/dts/zynqmp-g-a2197-00-revA.dts | 2 +- arch/arm/dts/zynqmp-m-a2197-01-revA.dts | 4 ++-- arch/arm/dts/zynqmp-m-a2197-02-revA.dts | 4 ++-- arch/arm/dts/zynqmp-m-a2197-03-revA.dts | 4 ++-- arch/arm/dts/zynqmp-p-a2197-00-revA.dts | 4 ++-- arch/arm/dts/zynqmp-topic-miamimp-xilinx-xdp-v1r1.dts | 4 ++-- arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 4 ++-- arch/arm/dts/zynqmp-zcu100-revC.dts | 4 ++-- arch/arm/dts/zynqmp-zcu102-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu104-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu104-revC.dts | 2 +- arch/arm/dts/zynqmp-zcu106-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu111-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu1275-revB.dts | 2 +- arch/arm/dts/zynqmp-zcu1285-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu208-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu216-revA.dts | 2 +- drivers/mmc/zynq_sdhci.c | 2 +- 23 files changed, 30 insertions(+), 30 deletions(-) diff --git a/arch/arm/dts/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dts b/arch/arm/dts/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dts index ac641ff1a58..85ab9e9e29a 100644 --- a/arch/arm/dts/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dts +++ b/arch/arm/dts/avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dts @@ -51,7 +51,7 @@ /* microSD card slot */ &sdhci1 { status = "okay"; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; clock-frequency = <199998000>; max-frequency = <50000000>; no-1-8-v; diff --git a/arch/arm/dts/avnet-ultrazedev-som-v1.0.dtsi b/arch/arm/dts/avnet-ultrazedev-som-v1.0.dtsi index b635db649f4..cbcb290a5c8 100644 --- a/arch/arm/dts/avnet-ultrazedev-som-v1.0.dtsi +++ b/arch/arm/dts/avnet-ultrazedev-som-v1.0.dtsi @@ -51,6 +51,6 @@ /* Micron MTFC8GAKAJCN-4M 8 GB eMMC */ &sdhci0 { status = "okay"; - xlnx,mio_bank = <0>; + xlnx,mio-bank = <0>; clock-frequency = <199998000>; }; diff --git a/arch/arm/dts/versal-mini-emmc0.dts b/arch/arm/dts/versal-mini-emmc0.dts index 7f57d232b7f..7826a282134 100644 --- a/arch/arm/dts/versal-mini-emmc0.dts +++ b/arch/arm/dts/versal-mini-emmc0.dts @@ -43,7 +43,7 @@ clocks = <&clk25 &clk25>; xlnx,device_id = <0>; no-1-8-v; - xlnx,mio_bank = <0>; + xlnx,mio-bank = <0>; #stream-id-cells = <1>; }; }; diff --git a/arch/arm/dts/versal-mini-emmc1.dts b/arch/arm/dts/versal-mini-emmc1.dts index 4e0758f6189..2f28f856a6a 100644 --- a/arch/arm/dts/versal-mini-emmc1.dts +++ b/arch/arm/dts/versal-mini-emmc1.dts @@ -43,7 +43,7 @@ clocks = <&clk25 &clk25>; xlnx,device_id = <1>; no-1-8-v; - xlnx,mio_bank = <0>; + xlnx,mio-bank = <0>; #stream-id-cells = <1>; }; }; diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts index c260411d757..a8bbb14f6cd 100644 --- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts @@ -131,7 +131,7 @@ status = "okay"; no-1-8-v; disable-wp; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; &gem0 { diff --git a/arch/arm/dts/zynqmp-g-a2197-00-revA.dts b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts index 09da60b1007..9468dc574fd 100644 --- a/arch/arm/dts/zynqmp-g-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts @@ -70,7 +70,7 @@ non-removable; disable-wp; bus-width = <8>; - xlnx,mio_bank = <0>; + xlnx,mio-bank = <0>; }; &uart0 { /* uart0 MIO38-39 */ diff --git a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts index e295bac128c..66ea02e5be7 100644 --- a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts @@ -89,7 +89,7 @@ non-removable; disable-wp; bus-width = <8>; - xlnx,mio_bank = <0>; /* FIXME tap delay */ + xlnx,mio-bank = <0>; /* FIXME tap delay */ }; &uart0 { /* uart0 MIO38-39 */ @@ -106,7 +106,7 @@ status = "disable"; no-1-8-v; disable-wp; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; &gem0 { diff --git a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts index bd2c1a46bd8..46ec427648f 100644 --- a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts @@ -85,7 +85,7 @@ non-removable; disable-wp; bus-width = <8>; - xlnx,mio_bank = <0>; /* FIXME tap delay */ + xlnx,mio-bank = <0>; /* FIXME tap delay */ }; &uart0 { /* uart0 MIO38-39 */ @@ -102,7 +102,7 @@ status = "disable"; no-1-8-v; disable-wp; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; &gem0 { diff --git a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts index 700197c1f3e..6eb58e6701a 100644 --- a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts @@ -85,7 +85,7 @@ non-removable; disable-wp; bus-width = <8>; - xlnx,mio_bank = <0>; /* FIXME tap delay */ + xlnx,mio-bank = <0>; /* FIXME tap delay */ }; &uart0 { /* uart0 MIO38-39 */ @@ -102,7 +102,7 @@ status = "disable"; no-1-8-v; disable-wp; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; &gem0 { diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts index d49b632a1d3..4f7824ae400 100644 --- a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts @@ -50,7 +50,7 @@ non-removable; disable-wp; bus-width = <8>; - xlnx,mio_bank = <0>; + xlnx,mio-bank = <0>; }; &uart0 { /* uart0 MIO38-39 */ @@ -67,7 +67,7 @@ status = "okay"; no-1-8-v; disable-wp; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; &gem0 { diff --git a/arch/arm/dts/zynqmp-topic-miamimp-xilinx-xdp-v1r1.dts b/arch/arm/dts/zynqmp-topic-miamimp-xilinx-xdp-v1r1.dts index 0ee8c62f6b9..a377f27c50d 100644 --- a/arch/arm/dts/zynqmp-topic-miamimp-xilinx-xdp-v1r1.dts +++ b/arch/arm/dts/zynqmp-topic-miamimp-xilinx-xdp-v1r1.dts @@ -97,13 +97,13 @@ non-removable; disable-wp; /* We don't have a write-protect detection */ bus-width = <8>; - xlnx,mio_bank = <0>; + xlnx,mio-bank = <0>; }; /* SD1 with level shifter */ &sdhci1 { status = "okay"; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; disable-wp; /* We don't have a write-protect detection */ bus-width = <4>; }; diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index 0805b93c4ac..e2428ec974a 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -148,7 +148,7 @@ &sdhci0 { status = "okay"; bus-width = <8>; - xlnx,mio_bank = <0>; + xlnx,mio-bank = <0>; }; /* SD1 with level shifter */ @@ -158,7 +158,7 @@ * This property should be removed for supporting UHS mode */ no-1-8-v; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; &uart0 { diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts index 1726edf78ed..d6c914c917f 100644 --- a/arch/arm/dts/zynqmp-zcu100-revC.dts +++ b/arch/arm/dts/zynqmp-zcu100-revC.dts @@ -259,13 +259,13 @@ status = "okay"; no-1-8-v; disable-wp; - xlnx,mio_bank = <0>; + xlnx,mio-bank = <0>; }; &sdhci1 { status = "okay"; bus-width = <0x4>; - xlnx,mio_bank = <0>; + xlnx,mio-bank = <0>; non-removable; disable-wp; cap-power-off-card; diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index d250681600a..ed036e68f5e 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -660,7 +660,7 @@ * removed for supporting UHS mode */ no-1-8-v; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; &serdes { diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts index a4bd6b800a1..cb8ffdff977 100644 --- a/arch/arm/dts/zynqmp-zcu104-revA.dts +++ b/arch/arm/dts/zynqmp-zcu104-revA.dts @@ -249,7 +249,7 @@ &sdhci1 { status = "okay"; no-1-8-v; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; disable-wp; }; diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts index d4b3769a27c..e203280f0ec 100644 --- a/arch/arm/dts/zynqmp-zcu104-revC.dts +++ b/arch/arm/dts/zynqmp-zcu104-revC.dts @@ -262,7 +262,7 @@ &sdhci1 { status = "okay"; no-1-8-v; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; disable-wp; }; diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts index 221685fd23b..1dff845ceeb 100644 --- a/arch/arm/dts/zynqmp-zcu106-revA.dts +++ b/arch/arm/dts/zynqmp-zcu106-revA.dts @@ -657,7 +657,7 @@ * This property should be removed for supporting UHS mode */ no-1-8-v; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; &serdes { diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts index 63e285fe9a9..82e6c8d3cdf 100644 --- a/arch/arm/dts/zynqmp-zcu111-revA.dts +++ b/arch/arm/dts/zynqmp-zcu111-revA.dts @@ -568,7 +568,7 @@ * This property should be removed for supporting UHS mode */ no-1-8-v; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; &serdes { diff --git a/arch/arm/dts/zynqmp-zcu1275-revB.dts b/arch/arm/dts/zynqmp-zcu1275-revB.dts index 430fc5adb42..b612215f40e 100644 --- a/arch/arm/dts/zynqmp-zcu1275-revB.dts +++ b/arch/arm/dts/zynqmp-zcu1275-revB.dts @@ -80,5 +80,5 @@ * removed for supporting UHS mode */ no-1-8-v; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; diff --git a/arch/arm/dts/zynqmp-zcu1285-revA.dts b/arch/arm/dts/zynqmp-zcu1285-revA.dts index d8b9cb1a9e1..f041df83dab 100644 --- a/arch/arm/dts/zynqmp-zcu1285-revA.dts +++ b/arch/arm/dts/zynqmp-zcu1285-revA.dts @@ -245,5 +245,5 @@ * This property should be removed for supporting UHS mode */ no-1-8-v; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts index 118a2de96b3..124219314b8 100644 --- a/arch/arm/dts/zynqmp-zcu208-revA.dts +++ b/arch/arm/dts/zynqmp-zcu208-revA.dts @@ -565,7 +565,7 @@ * This property should be removed for supporting UHS mode */ no-1-8-v; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; &serdes { diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts index e454bfcba79..511727fa955 100644 --- a/arch/arm/dts/zynqmp-zcu216-revA.dts +++ b/arch/arm/dts/zynqmp-zcu216-revA.dts @@ -569,7 +569,7 @@ * This property should be removed for supporting UHS mode */ no-1-8-v; - xlnx,mio_bank = <1>; + xlnx,mio-bank = <1>; }; &serdes { diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 43b9f215229..6505527616d 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -276,7 +276,7 @@ static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev) return PTR_ERR(priv->host->ioaddr); priv->deviceid = dev_read_u32_default(dev, "xlnx,device_id", -1); - priv->bank = dev_read_u32_default(dev, "xlnx,mio_bank", -1); + priv->bank = dev_read_u32_default(dev, "xlnx,mio-bank", -1); return 0; } From e8deb2218509ffe686601b7e51091407fda58fbf Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 22 Jul 2020 17:46:31 +0200 Subject: [PATCH 15/31] mmc: zynq: Fix default value for xlnx,mio-bank DT binding is saying that default value is 0 not -1 that's why fix it. Signed-off-by: Michal Simek Acked-by: Peng Fan --- drivers/mmc/zynq_sdhci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 6505527616d..e9381b94930 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -276,7 +276,7 @@ static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev) return PTR_ERR(priv->host->ioaddr); priv->deviceid = dev_read_u32_default(dev, "xlnx,device_id", -1); - priv->bank = dev_read_u32_default(dev, "xlnx,mio-bank", -1); + priv->bank = dev_read_u32_default(dev, "xlnx,mio-bank", 0); return 0; } From f6cccbb5f24ff7a19be84fb755d8566aee647244 Mon Sep 17 00:00:00 2001 From: Ibai Erkiaga Date: Tue, 4 Aug 2020 23:17:26 +0100 Subject: [PATCH 16/31] xilinx: zynqmp: synchronize firmware call return payload Removes duplicated definition of PAYLOAD_ARG_CNT and define it in the firmware driver. Additionally fixes payload buffer declarations without macro usage Signed-off-by: Ibai Erkiaga Signed-off-by: Michal Simek --- arch/arm/mach-versal/include/mach/sys_proto.h | 2 -- arch/arm/mach-zynqmp/include/mach/sys_proto.h | 2 -- board/xilinx/versal/cmds.c | 2 +- drivers/fpga/versalpl.c | 2 +- include/zynqmp_firmware.h | 9 +++++++++ 5 files changed, 11 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-versal/include/mach/sys_proto.h b/arch/arm/mach-versal/include/mach/sys_proto.h index cfd480bec17..05934c28d67 100644 --- a/arch/arm/mach-versal/include/mach/sys_proto.h +++ b/arch/arm/mach-versal/include/mach/sys_proto.h @@ -8,7 +8,5 @@ enum { TCM_SPLIT, }; -#define PAYLOAD_ARG_CNT 5U - void tcm_init(u8 mode); void mem_map_fill(void); diff --git a/arch/arm/mach-zynqmp/include/mach/sys_proto.h b/arch/arm/mach-zynqmp/include/mach/sys_proto.h index 2974ffbc2f5..4078f958fc6 100644 --- a/arch/arm/mach-zynqmp/include/mach/sys_proto.h +++ b/arch/arm/mach-zynqmp/include/mach/sys_proto.h @@ -7,8 +7,6 @@ #ifndef _ASM_ARCH_SYS_PROTO_H #define _ASM_ARCH_SYS_PROTO_H -#define PAYLOAD_ARG_CNT 5 - #define ZYNQMP_CSU_SILICON_VER_MASK 0xF #define KEY_PTR_LEN 32 diff --git a/board/xilinx/versal/cmds.c b/board/xilinx/versal/cmds.c index 981c80ee474..f5735d0c62c 100644 --- a/board/xilinx/versal/cmds.c +++ b/board/xilinx/versal/cmds.c @@ -16,7 +16,7 @@ static int do_versal_load_pdi(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]) { u32 buf_lo, buf_hi; - u32 ret_payload[5]; + u32 ret_payload[PAYLOAD_ARG_CNT]; ulong addr, *pdi_buf; size_t len; int ret; diff --git a/drivers/fpga/versalpl.c b/drivers/fpga/versalpl.c index 8e2ef4f0da9..c44a7d34557 100644 --- a/drivers/fpga/versalpl.c +++ b/drivers/fpga/versalpl.c @@ -32,7 +32,7 @@ static int versal_load(xilinx_desc *desc, const void *buf, size_t bsize, ulong bin_buf; int ret; u32 buf_lo, buf_hi; - u32 ret_payload[5]; + u32 ret_payload[PAYLOAD_ARG_CNT]; bin_buf = versal_align_dma_buffer((ulong *)buf, bsize); diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h index 93d771ece26..2c44951f861 100644 --- a/include/zynqmp_firmware.h +++ b/include/zynqmp_firmware.h @@ -77,6 +77,15 @@ enum pm_api_id { #define PMUFW_V1_0 ((1 << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | 0) +/* + * Return payload size + * Not every firmware call expects the same amount of return bytes, however the + * firmware driver always copies 5 bytes from RX buffer to the ret_payload + * buffer. Therefore allocating with this defined value is recommended to avoid + * overflows. + */ +#define PAYLOAD_ARG_CNT 5U + unsigned int zynqmp_firmware_version(void); void zynqmp_pmufw_load_config_object(const void *cfg_obj, size_t size); int xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2, From 2eabb6bfeac791e44b1900fbe86977fd8638e16e Mon Sep 17 00:00:00 2001 From: Ibai Erkiaga Date: Tue, 4 Aug 2020 23:17:27 +0100 Subject: [PATCH 17/31] xilinx: zynqmp: merge firmware calls for EL2 and EL3 This patch merges ZynqMP firmware calls under xilinx_pm_request in order to make trainsparent the EL. Calls at EL3 are send through IPI messages and EL2 through SMC calls. The EL2 call uses fixed payload and arg size as the EL3 call. The firmware is capable to handle PMUFW_PAYLOAD_ARG_CNT bytes but the firmware API is limited by the SMC call size. Signed-off-by: Ibai Erkiaga Signed-off-by: Michal Simek --- drivers/firmware/firmware-zynqmp.c | 86 +++++++++++++++--------------- 1 file changed, 44 insertions(+), 42 deletions(-) diff --git a/drivers/firmware/firmware-zynqmp.c b/drivers/firmware/firmware-zynqmp.c index 66edc169301..903a8f58782 100644 --- a/drivers/firmware/firmware-zynqmp.c +++ b/drivers/firmware/firmware-zynqmp.c @@ -37,6 +37,7 @@ static int ipi_req(const u32 *req, size_t req_len, u32 *res, size_t res_maxlen) if (!(zynqmp_power.tx_chan.dev) || !(&zynqmp_power.rx_chan.dev)) return -EINVAL; + debug("%s, Sending IPI message with ID: 0x%0x\n", __func__, req[0]); msg.buf = (u32 *)req; msg.len = req_len; ret = mbox_send(&zynqmp_power.tx_chan, &msg); @@ -54,14 +55,6 @@ static int ipi_req(const u32 *req, size_t req_len, u32 *res, size_t res_maxlen) return ret; } -static int send_req(const u32 *req, size_t req_len, u32 *res, size_t res_maxlen) -{ - if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3) - return ipi_req(req, req_len, res, res_maxlen); - - return xilinx_pm_request(req[0], 0, 0, 0, 0, res); -} - unsigned int zynqmp_firmware_version(void) { int ret; @@ -74,9 +67,9 @@ unsigned int zynqmp_firmware_version(void) * asking PMUFW again. **/ if (pm_api_version == ZYNQMP_PM_VERSION_INVALID) { - const u32 request[] = { PM_GET_API_VERSION }; - ret = send_req(request, ARRAY_SIZE(request), ret_payload, 2); + ret = xilinx_pm_request(PM_GET_API_VERSION, 0, 0, 0, 0, + ret_payload); if (ret) panic("PMUFW is not found - Please load it!\n"); @@ -97,16 +90,13 @@ unsigned int zynqmp_firmware_version(void) */ void zynqmp_pmufw_load_config_object(const void *cfg_obj, size_t size) { - const u32 request[] = { - PM_SET_CONFIGURATION, - (u32)((u64)cfg_obj) - }; - u32 response = 0; int err; + u32 ret_payload[PAYLOAD_ARG_CNT]; printf("Loading new PMUFW cfg obj (%ld bytes)\n", size); - err = send_req(request, ARRAY_SIZE(request), &response, 1); + err = xilinx_pm_request(PM_SET_CONFIGURATION, (u32)(u64)cfg_obj, 0, 0, + 0, ret_payload); if (err == XST_PM_NO_ACCESS) { printf("PMUFW no permission to change config object\n"); return; @@ -115,10 +105,10 @@ void zynqmp_pmufw_load_config_object(const void *cfg_obj, size_t size) if (err) printf("Cannot load PMUFW configuration object (%d)\n", err); - if (response) - printf("PMUFW returned 0x%08x status!\n", response); + if (ret_payload[0]) + printf("PMUFW returned 0x%08x status!\n", ret_payload[0]); - if ((err || response) && IS_ENABLED(CONFIG_SPL_BUILD)) + if ((err || ret_payload[0]) && IS_ENABLED(CONFIG_SPL_BUILD)) panic("PMUFW config object loading failed in EL3\n"); } @@ -164,32 +154,44 @@ U_BOOT_DRIVER(zynqmp_power) = { int __maybe_unused xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2, u32 arg3, u32 *ret_payload) { - /* - * Added SIP service call Function Identifier - * Make sure to stay in x0 register - */ - struct pt_regs regs; + debug("%s at EL%d, API ID: 0x%0x\n", __func__, current_el(), api_id); - if (current_el() == 3) { - printf("%s: Can't call SMC from EL3 context\n", __func__); + if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3) { +#if defined(CONFIG_ZYNQMP_IPI) + /* + * Use fixed payload and arg size as the EL2 call. The firmware + * is capable to handle PMUFW_PAYLOAD_ARG_CNT bytes but the + * firmware API is limited by the SMC call size + */ + u32 regs[] = {api_id, arg0, arg1, arg2, arg3}; + + ipi_req(regs, PAYLOAD_ARG_CNT, ret_payload, PAYLOAD_ARG_CNT); +#else return -EPERM; +#endif + } else { + /* + * Added SIP service call Function Identifier + * Make sure to stay in x0 register + */ + struct pt_regs regs; + + regs.regs[0] = PM_SIP_SVC | api_id; + regs.regs[1] = ((u64)arg1 << 32) | arg0; + regs.regs[2] = ((u64)arg3 << 32) | arg2; + + smc_call(®s); + + if (ret_payload) { + ret_payload[0] = (u32)regs.regs[0]; + ret_payload[1] = upper_32_bits(regs.regs[0]); + ret_payload[2] = (u32)regs.regs[1]; + ret_payload[3] = upper_32_bits(regs.regs[1]); + ret_payload[4] = (u32)regs.regs[2]; + } + } - - regs.regs[0] = PM_SIP_SVC | api_id; - regs.regs[1] = ((u64)arg1 << 32) | arg0; - regs.regs[2] = ((u64)arg3 << 32) | arg2; - - smc_call(®s); - - if (ret_payload) { - ret_payload[0] = (u32)regs.regs[0]; - ret_payload[1] = upper_32_bits(regs.regs[0]); - ret_payload[2] = (u32)regs.regs[1]; - ret_payload[3] = upper_32_bits(regs.regs[1]); - ret_payload[4] = (u32)regs.regs[2]; - } - - return regs.regs[0]; + return (ret_payload) ? ret_payload[0] : 0; } static const struct udevice_id zynqmp_firmware_ids[] = { From 21c2fc7c6a685aa2c1f95d3d23dd7494b5c2dd43 Mon Sep 17 00:00:00 2001 From: Ibai Erkiaga Date: Tue, 4 Aug 2020 23:17:28 +0100 Subject: [PATCH 18/31] xilinx: zynqmp: get chip ID using firmware driver Current implementation for getting chip ID uses either raw access on EL3 or a SMC call to get the silicon information. Following change simplifies the code using always the firmware driver. Signed-off-by: Ibai Erkiaga Signed-off-by: Michal Simek --- board/xilinx/zynqmp/zynqmp.c | 77 ++++++++++++------------------------ 1 file changed, 26 insertions(+), 51 deletions(-) diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 8a4df6fc1ab..cf5febc4c41 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -199,60 +199,34 @@ static const struct { int chip_id(unsigned char id) { - struct pt_regs regs; int val = -EINVAL; + u32 ret_payload[PAYLOAD_ARG_CNT]; - if (current_el() != 3) { - regs.regs[0] = ZYNQMP_SIP_SVC_CSU_DMA_CHIPID; - regs.regs[1] = 0; - regs.regs[2] = 0; - regs.regs[3] = 0; + xilinx_pm_request(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload); - smc_call(®s); - - /* - * SMC returns: - * regs[0][31:0] = status of the operation - * regs[0][63:32] = CSU.IDCODE register - * regs[1][31:0] = CSU.version register - * regs[1][63:32] = CSU.IDCODE2 register - */ - switch (id) { - case IDCODE: - regs.regs[0] = upper_32_bits(regs.regs[0]); - regs.regs[0] &= ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK | - ZYNQMP_CSU_IDCODE_SVD_MASK; - regs.regs[0] >>= ZYNQMP_CSU_IDCODE_SVD_SHIFT; - val = regs.regs[0]; - break; - case VERSION: - regs.regs[1] = lower_32_bits(regs.regs[1]); - regs.regs[1] &= ZYNQMP_CSU_SILICON_VER_MASK; - val = regs.regs[1]; - break; - case IDCODE2: - regs.regs[1] = lower_32_bits(regs.regs[1]); - regs.regs[1] >>= ZYNQMP_CSU_VERSION_EMPTY_SHIFT; - val = regs.regs[1]; - break; - default: - printf("%s, Invalid Req:0x%x\n", __func__, id); - } - } else { - switch (id) { - case IDCODE: - val = readl(ZYNQMP_CSU_IDCODE_ADDR); - val &= ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK | - ZYNQMP_CSU_IDCODE_SVD_MASK; - val >>= ZYNQMP_CSU_IDCODE_SVD_SHIFT; - break; - case VERSION: - val = readl(ZYNQMP_CSU_VER_ADDR); - val &= ZYNQMP_CSU_SILICON_VER_MASK; - break; - default: - printf("%s, Invalid Req:0x%x\n", __func__, id); - } + /* + * Firmware returns: + * payload[0][31:0] = status of the operation + * payload[1]] = IDCODE + * payload[2][19:0] = Version + * payload[2][28:20] = EXTENDED_IDCODE + * payload[2][29] = PL_INIT + */ + switch (id) { + case IDCODE: + val = ret_payload[1]; + val &= ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK | + ZYNQMP_CSU_IDCODE_SVD_MASK; + val >>= ZYNQMP_CSU_IDCODE_SVD_SHIFT; + break; + case VERSION: + val = ret_payload[2] & ZYNQMP_CSU_SILICON_VER_MASK; + break; + case IDCODE2: + val = ret_payload[2] >> ZYNQMP_CSU_VERSION_EMPTY_SHIFT; + break; + default: + printf("%s, Invalid Req:0x%x\n", __func__, id); } return val; @@ -277,6 +251,7 @@ static char *zynqmp_get_silicon_idcode_name(void) id = chip_id(IDCODE); ver = chip_id(IDCODE2); + debug("%s, ID: 0x%0X, Ver: 0x%0X\r\n", __func__, id, ver); for (i = 0; i < ARRAY_SIZE(zynqmp_devices); i++) { if (zynqmp_devices[i].id == id) { From 4b2ad7b1111fe05e7e0b68922048210a5dfd04b0 Mon Sep 17 00:00:00 2001 From: Ibai Erkiaga Date: Tue, 4 Aug 2020 23:17:29 +0100 Subject: [PATCH 19/31] xilinx: zynqmp: get chip ID at EL3 Modify the board init function to allow getting the chip ID when U-Boot proper is executed at EL3. Signed-off-by: Ibai Erkiaga Signed-off-by: Michal Simek --- board/xilinx/zynqmp/zynqmp.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index cf5febc4c41..2b95a61dd0a 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -362,12 +362,10 @@ int board_init(void) #if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \ !defined(CONFIG_SPL_BUILD) || (defined(CONFIG_SPL_FPGA_SUPPORT) && \ defined(CONFIG_SPL_BUILD)) - if (current_el() != 3) { - zynqmppl.name = zynqmp_get_silicon_idcode_name(); - printf("Chip ID:\t%s\n", zynqmppl.name); - fpga_init(); - fpga_add(fpga_xilinx, &zynqmppl); - } + zynqmppl.name = zynqmp_get_silicon_idcode_name(); + printf("Chip ID:\t%s\n", zynqmppl.name); + fpga_init(); + fpga_add(fpga_xilinx, &zynqmppl); #endif if (current_el() == 3) From 050f10f103cdf88704af962262f1131870894367 Mon Sep 17 00:00:00 2001 From: Ibai Erkiaga Date: Tue, 4 Aug 2020 23:17:30 +0100 Subject: [PATCH 20/31] xilinx: zynqmp: remove chip_id function Remove chip_id function and integrate the firmware call in the zynqmp_get_silicon_idcode_name function. The change avoids querying the firmware twice and makes the code bit more clear. Signed-off-by: Ibai Erkiaga Signed-off-by: Michal Simek --- arch/arm/mach-zynqmp/include/mach/sys_proto.h | 1 - board/xilinx/zynqmp/zynqmp.c | 57 +++++++------------ 2 files changed, 20 insertions(+), 38 deletions(-) diff --git a/arch/arm/mach-zynqmp/include/mach/sys_proto.h b/arch/arm/mach-zynqmp/include/mach/sys_proto.h index 4078f958fc6..f2b3ceab135 100644 --- a/arch/arm/mach-zynqmp/include/mach/sys_proto.h +++ b/arch/arm/mach-zynqmp/include/mach/sys_proto.h @@ -49,7 +49,6 @@ int zynqmp_mmio_read(const u32 address, u32 *value); void initialize_tcm(bool mode); void mem_map_fill(void); -int chip_id(unsigned char id); #if defined(CONFIG_SYS_MEM_RSVD_FOR_MMU) || defined(CONFIG_DEFINE_TCM_OCM_MMAP) void tcm_init(u8 mode); #endif diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 2b95a61dd0a..2a430a9e463 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -197,41 +197,6 @@ static const struct { }; #endif -int chip_id(unsigned char id) -{ - int val = -EINVAL; - u32 ret_payload[PAYLOAD_ARG_CNT]; - - xilinx_pm_request(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload); - - /* - * Firmware returns: - * payload[0][31:0] = status of the operation - * payload[1]] = IDCODE - * payload[2][19:0] = Version - * payload[2][28:20] = EXTENDED_IDCODE - * payload[2][29] = PL_INIT - */ - switch (id) { - case IDCODE: - val = ret_payload[1]; - val &= ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK | - ZYNQMP_CSU_IDCODE_SVD_MASK; - val >>= ZYNQMP_CSU_IDCODE_SVD_SHIFT; - break; - case VERSION: - val = ret_payload[2] & ZYNQMP_CSU_SILICON_VER_MASK; - break; - case IDCODE2: - val = ret_payload[2] >> ZYNQMP_CSU_VERSION_EMPTY_SHIFT; - break; - default: - printf("%s, Invalid Req:0x%x\n", __func__, id); - } - - return val; -} - #define ZYNQMP_VERSION_SIZE 9 #define ZYNQMP_PL_STATUS_BIT 9 #define ZYNQMP_IPDIS_VCU_BIT 8 @@ -248,9 +213,27 @@ static char *zynqmp_get_silicon_idcode_name(void) u32 i, id, ver, j; char *buf; static char name[ZYNQMP_VERSION_SIZE]; + u32 ret_payload[PAYLOAD_ARG_CNT]; + + xilinx_pm_request(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload); + + /* + * Firmware returns: + * payload[0][31:0] = status of the operation + * payload[1]] = IDCODE + * payload[2][19:0] = Version + * payload[2][28:20] = EXTENDED_IDCODE + * payload[2][29] = PL_INIT + */ + + /* Get IDCODE field */ + id = ret_payload[1]; + id &= ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK | ZYNQMP_CSU_IDCODE_SVD_MASK; + id >>= ZYNQMP_CSU_IDCODE_SVD_SHIFT; + + /* Shift silicon version info */ + ver = ret_payload[2] >> ZYNQMP_CSU_VERSION_EMPTY_SHIFT; - id = chip_id(IDCODE); - ver = chip_id(IDCODE2); debug("%s, ID: 0x%0X, Ver: 0x%0X\r\n", __func__, id, ver); for (i = 0; i < ARRAY_SIZE(zynqmp_devices); i++) { From de4f748ef5b834b3e7cea24449b7e74341a9111a Mon Sep 17 00:00:00 2001 From: Ibai Erkiaga Date: Tue, 4 Aug 2020 23:17:32 +0100 Subject: [PATCH 21/31] xilinx: zynqmp: fix incorrect map not align with IPI HW Current IPI module register description is not align with IPI HW. The registers with the wrong offset are not used so it does not cause real issues. This patch aligns the register description. Additionally comments added to explain why recv function does not check any flag prior copying rx data. Fixes: 660b0c77d816 ("mailbox: zynqmp: ipi mailbox driver") Signed-off-by: Ibai Erkiaga Signed-off-by: Michal Simek --- drivers/mailbox/zynqmp-ipi.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/mailbox/zynqmp-ipi.c b/drivers/mailbox/zynqmp-ipi.c index f206a27a79e..746377e557c 100644 --- a/drivers/mailbox/zynqmp-ipi.c +++ b/drivers/mailbox/zynqmp-ipi.c @@ -24,10 +24,12 @@ struct ipi_int_regs { u32 trig; /* 0x0 */ u32 obs; /* 0x4 */ - u32 ist; /* 0x8 */ - u32 imr; /* 0xC */ - u32 ier; /* 0x10 */ - u32 idr; /* 0x14 */ + u32 dummy0; + u32 dummy1; + u32 isr; /* 0x10 */ + u32 imr; /* 0x14 */ + u32 ier; /* 0x18 */ + u32 idr; /* 0x1C */ }; #define ipi_int_apu ((struct ipi_int_regs *)IPI_INT_REG_BASE_APU) @@ -66,6 +68,10 @@ static int zynqmp_ipi_recv(struct mbox_chan *chan, void *data) struct zynqmp_ipi *zynqmp = dev_get_priv(chan->dev); u32 *mbx = (u32 *)zynqmp->local_res_regs; + /* + * PMU Firmware does not trigger IPI interrupt for API call responses so + * there is no need to check ISR flags + */ for (size_t i = 0; i < msg->len; i++) msg->buf[i] = readl(&mbx[i]); From d5c42ec31b004218666b60ab990c1b56d5b09050 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 3 Aug 2020 15:14:24 +0200 Subject: [PATCH 22/31] xilinx: versal: Enable i2c misc eeprom driver Enable this driver to be able to work with i2c based eeproms on Versal. Signed-off-by: Michal Simek --- configs/xilinx_versal_virt_defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index 49138278f1e..4c463f48eed 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -44,6 +44,9 @@ CONFIG_FPGA_VERSALPL=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_CADENCE=y CONFIG_MISC=y +CONFIG_I2C_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR=0x0 +CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0 CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y From 62b96262b6dad1000b1ed2fec8664c2757585061 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 28 Jul 2020 12:45:47 +0200 Subject: [PATCH 23/31] xilinx: Add support for ENV_VARS_UBOOT_RUNTIME_CONFIG Start to use ENV_VARS_UBOOT_RUNTIME_CONFIG to enable/disable updating variables with run time information. Signed-off-by: Michal Simek --- arch/arm/Kconfig | 3 +++ board/xilinx/versal/board.c | 3 +++ board/xilinx/zynq/board.c | 9 +++++++++ board/xilinx/zynqmp/zynqmp.c | 3 +++ 4 files changed, 18 insertions(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a3930b57141..9b8dadce837 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1085,6 +1085,7 @@ config ARCH_VERSAL select DM_SERIAL select OF_CONTROL imply BOARD_LATE_INIT + imply ENV_VARS_UBOOT_RUNTIME_CONFIG config ARCH_VF610 bool "Freescale Vybrid" @@ -1120,6 +1121,7 @@ config ARCH_ZYNQ imply CMD_CLK imply CMD_DM imply CMD_SPL + imply ENV_VARS_UBOOT_RUNTIME_CONFIG imply FAT_WRITE config ARCH_ZYNQMP_R5 @@ -1159,6 +1161,7 @@ config ARCH_ZYNQMP select ZYNQMP_IPI imply BOARD_LATE_INIT imply CMD_DM + imply ENV_VARS_UBOOT_RUNTIME_CONFIG imply FAT_WRITE imply MP imply DM_USB_GADGET diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c index 3dc7044b213..a5ca4ca8740 100644 --- a/board/xilinx/versal/board.c +++ b/board/xilinx/versal/board.c @@ -116,6 +116,9 @@ int board_late_init(void) return 0; } + if (!CONFIG_IS_ENABLED(ENV_VARS_UBOOT_RUNTIME_CONFIG)) + return 0; + bootmode = versal_get_bootmode(); puts("Bootmode: "); diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index 2164eac8d51..7ac069aaafd 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -6,6 +6,7 @@ #include #include +#include #include #include #include @@ -33,6 +34,14 @@ int board_late_init(void) char *new_targets; char *env_targets; + if (!(gd->flags & GD_FLG_ENV_DEFAULT)) { + debug("Saved variables - Skipping\n"); + return 0; + } + + if (!CONFIG_IS_ENABLED(ENV_VARS_UBOOT_RUNTIME_CONFIG)) + return 0; + switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) { case ZYNQ_BM_QSPI: mode = "qspi"; diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 2a430a9e463..b4e7301d509 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -568,6 +568,9 @@ int board_late_init(void) return 0; } + if (!CONFIG_IS_ENABLED(ENV_VARS_UBOOT_RUNTIME_CONFIG)) + return 0; + ret = set_fdtfile(); if (ret) return ret; From 9fea3b18d65d412c386319360d641c9c47122ec2 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 3 Aug 2020 12:59:28 +0200 Subject: [PATCH 24/31] xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek --- board/xilinx/common/board.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index 3bca3a25a97..0782d08ee3f 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -13,11 +13,10 @@ #include #include "board.h" +#if defined(CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET) int zynq_board_read_rom_ethaddr(unsigned char *ethaddr) { int ret = -EINVAL; - -#if defined(CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET) struct udevice *dev; ofnode eeprom; @@ -37,10 +36,10 @@ int zynq_board_read_rom_ethaddr(unsigned char *ethaddr) debug("%s: I2C EEPROM MAC address read failed\n", __func__); else debug("%s: I2C EEPROM MAC %pM\n", __func__, ethaddr); -#endif return ret; } +#endif #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE) void *board_fdt_blob_setup(void) From 0bfb43dfc14ec4ca5a07f5d22063f1869c45de45 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 12 Aug 2020 12:04:50 +0200 Subject: [PATCH 25/31] xilinx: common: Get rid of fdt_high variable There is no need to setup this variable if bootm_low and bootm_size variable are properly setup. If fdt_high variable is missing U-Boot is asking LMB to return free memory which is not used. Signed-off-by: Michal Simek --- include/configs/xilinx_versal.h | 1 - include/configs/xilinx_zynqmp.h | 1 - include/configs/zynq-common.h | 1 - 3 files changed, 3 deletions(-) diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index 32cd5b21f7b..d7255a05dff 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -79,7 +79,6 @@ #define CONFIG_CLOCKS #define ENV_MEM_LAYOUT_SETTINGS \ - "fdt_high=10000000\0" \ "fdt_addr_r=0x40000000\0" \ "fdt_size_r=0x400000\0" \ "pxefile_addr_r=0x10000000\0" \ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 7c24bf632e3..15ad4198a6b 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -101,7 +101,6 @@ #define CONFIG_CLOCKS #define ENV_MEM_LAYOUT_SETTINGS \ - "fdt_high=10000000\0" \ "fdt_addr_r=0x40000000\0" \ "fdt_size_r=0x400000\0" \ "pxefile_addr_r=0x10000000\0" \ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 79c75784f2b..1607a8d0651 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -196,7 +196,6 @@ /* Default environment */ #ifndef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ - "fdt_high=0x20000000\0" \ "scriptaddr=0x20000\0" \ "script_size_f=0x40000\0" \ "fdt_addr_r=0x1f00000\0" \ From 653809f43f4d1872825ca281e488b1e7b56b9e95 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 12 Aug 2020 12:11:06 +0200 Subject: [PATCH 26/31] xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek --- board/xilinx/common/board.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index 0782d08ee3f..901591ba2a8 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -77,14 +77,8 @@ void *board_fdt_blob_setup(void) int board_late_init_xilinx(void) { - ulong initrd_hi; - env_set_hex("script_offset_f", CONFIG_BOOT_SCRIPT_OFFSET); - initrd_hi = gd->start_addr_sp - CONFIG_STACK_SIZE; - initrd_hi = round_down(initrd_hi, SZ_16M); - env_set_addr("initrd_high", (void *)initrd_hi); - env_set_addr("bootm_low", (void *)gd->ram_base); env_set_addr("bootm_size", (void *)gd->ram_size); From ca0f616530316f324516fd91a2d90e0449f1e526 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 12 Aug 2020 12:16:49 +0200 Subject: [PATCH 27/31] xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek --- board/xilinx/common/board.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index 901591ba2a8..581c88ad49a 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -77,10 +77,15 @@ void *board_fdt_blob_setup(void) int board_late_init_xilinx(void) { - env_set_hex("script_offset_f", CONFIG_BOOT_SCRIPT_OFFSET); + u32 ret = 0; - env_set_addr("bootm_low", (void *)gd->ram_base); - env_set_addr("bootm_size", (void *)gd->ram_size); + ret |= env_set_hex("script_offset_f", CONFIG_BOOT_SCRIPT_OFFSET); + + ret |= env_set_addr("bootm_low", (void *)gd->ram_base); + ret |= env_set_addr("bootm_size", (void *)gd->ram_size); + + if (ret) + printf("%s: Saving run time variables FAILED\n", __func__); return 0; } From 2570cc6430cf191b2b0f71b9dcfed46c94a645dc Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 12 Aug 2020 12:17:53 +0200 Subject: [PATCH 28/31] xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek --- board/xilinx/common/board.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index 581c88ad49a..eab389d049f 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -78,11 +78,15 @@ void *board_fdt_blob_setup(void) int board_late_init_xilinx(void) { u32 ret = 0; + phys_size_t bootm_size = gd->ram_size; + + if (CONFIG_IS_ENABLED(ARCH_ZYNQ)) + bootm_size = min(bootm_size, (phys_size_t)(SZ_512M + SZ_256M)); ret |= env_set_hex("script_offset_f", CONFIG_BOOT_SCRIPT_OFFSET); ret |= env_set_addr("bootm_low", (void *)gd->ram_base); - ret |= env_set_addr("bootm_size", (void *)gd->ram_size); + ret |= env_set_addr("bootm_size", (void *)bootm_size); if (ret) printf("%s: Saving run time variables FAILED\n", __func__); From 620bb46eaddd8f8ee361b47e56d57fd50a29b005 Mon Sep 17 00:00:00 2001 From: Faiz Abbas Date: Thu, 23 Jul 2020 09:42:19 +0530 Subject: [PATCH 29/31] mmc: sdhci: Enable high speed conditional on the corresponding bit The capabilities register has a field to indicate whether the host supports high speed mode or not. Add high speed host_caps based on this bit instead of enabling it by default. Signed-off-by: Faiz Abbas Reviewed-by: Michal Simek Tested-by: Michal Simek (zcu104 with sdhci-caps-mask = <0 0x200000>;) --- drivers/mmc/sdhci.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index ff871f82523..fe3d677bcfa 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -843,7 +843,10 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE) cfg->voltages |= host->voltages; - cfg->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT; + if (caps & SDHCI_CAN_DO_HISPD) + cfg->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz; + + cfg->host_caps |= MMC_MODE_4BIT; /* Since Host Controller Version3.0 */ if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) { From b5a3387dc163dbb958c362d95ddc7415bebdca61 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 29 Jul 2020 15:42:26 +0200 Subject: [PATCH 30/31] mmc: sdhci: Use upper/lower_32_bits macros Instead of recasting and shifting use macros which are designed for taking upper/lower 32bit value from 64bit variable. Signed-off-by: Michal Simek --- drivers/mmc/sdhci.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index fe3d677bcfa..7673219fb33 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -748,9 +748,9 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, "sdhci-caps-mask", 0); dt_caps = dev_read_u64_default(host->mmc->dev, "sdhci-caps", 0); - caps = ~(u32)dt_caps_mask & + caps = ~lower_32_bits(dt_caps_mask) & sdhci_readl(host, SDHCI_CAPABILITIES); - caps |= (u32)dt_caps; + caps |= lower_32_bits(dt_caps); #else caps = sdhci_readl(host, SDHCI_CAPABILITIES); #endif @@ -793,9 +793,9 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, /* Check whether the clock multiplier is supported or not */ if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) { #if CONFIG_IS_ENABLED(DM_MMC) - caps_1 = ~(u32)(dt_caps_mask >> 32) & + caps_1 = ~upper_32_bits(dt_caps_mask) & sdhci_readl(host, SDHCI_CAPABILITIES_1); - caps_1 |= (u32)(dt_caps >> 32); + caps_1 |= upper_32_bits(dt_caps); #else caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1); #endif From 29af2ac48c8f910cc2efc8099323f9d619fb2bd5 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 23 Jul 2020 09:24:06 +0200 Subject: [PATCH 31/31] clk: versal: Move pm_query_id out of clock driver There is no reason to have firmware specific structure in clock driver. Move it to generic location and also initialize enum values which is based on https://lore.kernel.org/linux-arm-kernel/20200318125003.GA2727094@kroah.com/ recommended way to go to make sure that values guaranteed by compiler. Signed-off-by: Michal Simek --- drivers/clk/clk_versal.c | 17 ----------------- include/zynqmp_firmware.h | 17 +++++++++++++++++ 2 files changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c index 6f82b60f04d..d93b860aed3 100644 --- a/drivers/clk/clk_versal.c +++ b/drivers/clk/clk_versal.c @@ -68,23 +68,6 @@ #define CLOCK_NODE_TYPE_DIV 4 #define CLOCK_NODE_TYPE_GATE 6 -enum pm_query_id { - PM_QID_INVALID, - PM_QID_CLOCK_GET_NAME, - PM_QID_CLOCK_GET_TOPOLOGY, - PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS, - PM_QID_CLOCK_GET_PARENTS, - PM_QID_CLOCK_GET_ATTRIBUTES, - PM_QID_PINCTRL_GET_NUM_PINS, - PM_QID_PINCTRL_GET_NUM_FUNCTIONS, - PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS, - PM_QID_PINCTRL_GET_FUNCTION_NAME, - PM_QID_PINCTRL_GET_FUNCTION_GROUPS, - PM_QID_PINCTRL_GET_PIN_GROUPS, - PM_QID_CLOCK_GET_NUM_CLOCKS, - PM_QID_CLOCK_GET_MAX_DIVISOR, -}; - enum clk_type { CLK_TYPE_OUTPUT, CLK_TYPE_EXTERNAL, diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h index 2c44951f861..f6f82bf8828 100644 --- a/include/zynqmp_firmware.h +++ b/include/zynqmp_firmware.h @@ -62,6 +62,23 @@ enum pm_api_id { PM_API_MAX, }; +enum pm_query_id { + PM_QID_INVALID = 0, + PM_QID_CLOCK_GET_NAME = 1, + PM_QID_CLOCK_GET_TOPOLOGY = 2, + PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS = 3, + PM_QID_CLOCK_GET_PARENTS = 4, + PM_QID_CLOCK_GET_ATTRIBUTES = 5, + PM_QID_PINCTRL_GET_NUM_PINS = 6, + PM_QID_PINCTRL_GET_NUM_FUNCTIONS = 7, + PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS = 8, + PM_QID_PINCTRL_GET_FUNCTION_NAME = 9, + PM_QID_PINCTRL_GET_FUNCTION_GROUPS = 10, + PM_QID_PINCTRL_GET_PIN_GROUPS = 11, + PM_QID_CLOCK_GET_NUM_CLOCKS = 12, + PM_QID_CLOCK_GET_MAX_DIVISOR = 13, +}; + #define PM_SIP_SVC 0xc2000000 #define ZYNQMP_PM_VERSION_MAJOR 1