mirrors/u-boot
1
0
Fork 0
mirror of https://source.denx.de/u-boot/u-boot.git synced 2025-12-24 19:02:14 +01:00
Code Issues Actions Packages Projects Releases Wiki Activity

sunxi: H6: Remove useless DRAM timings parameter

Browse Source 
This is just cosmetic fix for later easier rework.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
This commit is contained in:
Jernej Skrabec 2025-04-11 18:14:36 +02:00 committed by Andre Przywara
parent 5a0a93a768
commit 2bee17dcaa
4 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h
View File

@ -330,6 +330,6 @@ static inline int ns_to_t(int nanoseconds)
return DIV_ROUND_UP(ctrl_freq * nanoseconds, 1000);
}
void mctl_set_timing_params(struct dram_para *para);
void mctl_set_timing_params(void);
#endif /* _SUNXI_DRAM_SUN50I_H6_H */

2
arch/arm/mach-sunxi/dram_sun50i_h6.c
View File

@ -45,7 +45,7 @@ static bool mctl_core_init(struct dram_para *para)
switch (para->type) {
case SUNXI_DRAM_TYPE_LPDDR3:
case SUNXI_DRAM_TYPE_DDR3:
mctl_set_timing_params(para);
mctl_set_timing_params();
break;
default:
panic("Unsupported DRAM type!");

2
arch/arm/mach-sunxi/dram_timings/h6_ddr3_1333.c
View File

@ -37,7 +37,7 @@ static u32 mr_ddr3[7] = {
};
/* TODO: flexible timing */
void mctl_set_timing_params(struct dram_para *para)
void mctl_set_timing_params(void)
{
struct sunxi_mctl_ctl_reg * const mctl_ctl =
(struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE;

2
arch/arm/mach-sunxi/dram_timings/h6_lpddr3.c
View File

@ -16,7 +16,7 @@ static u32 mr_lpddr3[12] = {
};
/* TODO: flexible timing */
void mctl_set_timing_params(struct dram_para *para)
void mctl_set_timing_params(void)
{
struct sunxi_mctl_ctl_reg * const mctl_ctl =
(struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE;