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configs: rockchip: reduce diff for rk3308, rk3328, rk3399, rk3568, and rk3588

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this is cosmetic change. no functional change is intended.

- remove redundant white spaces
- replace white spaces with tab
- align position of last letter/word
- sort lines in CFG_EXTRA_ENV_SETTINGS
- add comment after #endif

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
FUKAUMI Naoki 2024-07-17 13:47:24 +09:00 committed by Kever Yang
parent 9a48ec3e91
commit 29de9ab9af
5 changed files with 60 additions and 60 deletions
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26
include/configs/rk3308_common.h
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@ -8,24 +8,24 @@
#include "rockchip-common.h" #include "rockchip-common.h"
#define CFG_IRAM_BASE 0xfff80000 #define CFG_IRAM_BASE 0xfff80000
#define CFG_SYS_SDRAM_BASE 0 #define CFG_SYS_SDRAM_BASE 0
#define SDRAM_MAX_SIZE 0xff000000 #define SDRAM_MAX_SIZE 0xff000000
#define ENV_MEM_LAYOUT_SETTINGS \ #define ENV_MEM_LAYOUT_SETTINGS \
"scriptaddr=0x00500000\0" \ "scriptaddr=0x00500000\0" \
"pxefile_addr_r=0x00600000\0" \ "pxefile_addr_r=0x00600000\0" \
"fdt_addr_r=0x03e00000\0" \ "fdt_addr_r=0x03e00000\0" \
"fdtoverlay_addr_r=0x03f00000\0" \ "fdtoverlay_addr_r=0x03f00000\0" \
"kernel_addr_r=0x00680000\0" \ "kernel_addr_r=0x00680000\0" \
"ramdisk_addr_r=0x04000000\0" "ramdisk_addr_r=0x04000000\0"
#define CFG_EXTRA_ENV_SETTINGS \ #define CFG_EXTRA_ENV_SETTINGS \
"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
ENV_MEM_LAYOUT_SETTINGS \ "partitions=" PARTS_DEFAULT \
"partitions=" PARTS_DEFAULT \ ENV_MEM_LAYOUT_SETTINGS \
ROCKCHIP_DEVICE_SETTINGS \ ROCKCHIP_DEVICE_SETTINGS \
"boot_targets=" BOOT_TARGETS "\0" "boot_targets=" BOOT_TARGETS "\0"
#endif #endif /* __CONFIG_RK3308_COMMON_H */

28
include/configs/rk3328_common.h
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@ -8,25 +8,25 @@
#include "rockchip-common.h" #include "rockchip-common.h"
#define CFG_IRAM_BASE 0xff090000 #define CFG_IRAM_BASE 0xff090000
#define CFG_SYS_SDRAM_BASE 0 #define CFG_SYS_SDRAM_BASE 0
#define SDRAM_MAX_SIZE 0xff000000 #define SDRAM_MAX_SIZE 0xff000000
#define ENV_MEM_LAYOUT_SETTINGS \ #define ENV_MEM_LAYOUT_SETTINGS \
"scriptaddr=0x00500000\0" \ "scriptaddr=0x00500000\0" \
"pxefile_addr_r=0x00600000\0" \ "pxefile_addr_r=0x00600000\0" \
"fdt_addr_r=0x01f00000\0" \ "fdt_addr_r=0x01f00000\0" \
"kernel_addr_r=0x02080000\0" \ "kernel_addr_r=0x02080000\0" \
"ramdisk_addr_r=0x06000000\0" \ "ramdisk_addr_r=0x06000000\0" \
"kernel_comp_addr_r=0x08000000\0" \ "kernel_comp_addr_r=0x08000000\0" \
"kernel_comp_size=0x2000000\0" "kernel_comp_size=0x2000000\0"
#define CFG_EXTRA_ENV_SETTINGS \ #define CFG_EXTRA_ENV_SETTINGS \
ENV_MEM_LAYOUT_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "partitions=" PARTS_DEFAULT \
"partitions=" PARTS_DEFAULT \ ENV_MEM_LAYOUT_SETTINGS \
ROCKCHIP_DEVICE_SETTINGS \ ROCKCHIP_DEVICE_SETTINGS \
"boot_targets=" BOOT_TARGETS "\0" "boot_targets=" BOOT_TARGETS "\0"
#endif #endif /* __CONFIG_RK3328_COMMON_H */

40
include/configs/rk3399_common.h
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@ -8,36 +8,36 @@
#include "rockchip-common.h" #include "rockchip-common.h"
#define CFG_IRAM_BASE 0xff8c0000 #define CFG_IRAM_BASE 0xff8c0000
#define CFG_SYS_SDRAM_BASE 0 #define CFG_SYS_SDRAM_BASE 0
#define SDRAM_MAX_SIZE 0xf8000000 #define SDRAM_MAX_SIZE 0xf8000000
#ifndef CONFIG_SPL_BUILD #ifndef CONFIG_SPL_BUILD
#define ENV_MEM_LAYOUT_SETTINGS \
"scriptaddr=0x00500000\0" \
"script_offset_f=0xffe000\0" \
"script_size_f=0x2000\0" \
"pxefile_addr_r=0x00600000\0" \
"fdt_addr_r=0x01f00000\0" \
"fdtoverlay_addr_r=0x02000000\0" \
"kernel_addr_r=0x02080000\0" \
"ramdisk_addr_r=0x06000000\0" \
"kernel_comp_addr_r=0x08000000\0" \
"kernel_comp_size=0x2000000\0"
#ifndef ROCKCHIP_DEVICE_SETTINGS #ifndef ROCKCHIP_DEVICE_SETTINGS
#define ROCKCHIP_DEVICE_SETTINGS #define ROCKCHIP_DEVICE_SETTINGS
#endif #endif
#define CFG_EXTRA_ENV_SETTINGS \ #define ENV_MEM_LAYOUT_SETTINGS \
ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x00500000\0" \
"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "script_offset_f=0xffe000\0" \
"partitions=" PARTS_DEFAULT \ "script_size_f=0x2000\0" \
ROCKCHIP_DEVICE_SETTINGS \ "pxefile_addr_r=0x00600000\0" \
"fdt_addr_r=0x01f00000\0" \
"fdtoverlay_addr_r=0x02000000\0" \
"kernel_addr_r=0x02080000\0" \
"ramdisk_addr_r=0x06000000\0" \
"kernel_comp_addr_r=0x08000000\0" \
"kernel_comp_size=0x2000000\0"
#define CFG_EXTRA_ENV_SETTINGS \
"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
"partitions=" PARTS_DEFAULT \
ENV_MEM_LAYOUT_SETTINGS \
ROCKCHIP_DEVICE_SETTINGS \
"boot_targets=" BOOT_TARGETS "\0" "boot_targets=" BOOT_TARGETS "\0"
#endif #endif /* CONFIG_SPL_BUILD */
#endif #endif /* __CONFIG_RK3399_COMMON_H */

14
include/configs/rk3568_common.h
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@ -1,4 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0+ */ /* SPDX-License-Identifier: GPL-2.0+ */
/* /*
* (C) Copyright 2021 Rockchip Electronics Co., Ltd * (C) Copyright 2021 Rockchip Electronics Co., Ltd
*/ */
@ -10,7 +10,7 @@
#include "rockchip-common.h" #include "rockchip-common.h"
#define CFG_IRAM_BASE 0xfdcc0000 #define CFG_IRAM_BASE 0xfdcc0000
#define CFG_SYS_SDRAM_BASE 0 #define CFG_SYS_SDRAM_BASE 0
#define SDRAM_MAX_SIZE 0xf0000000 #define SDRAM_MAX_SIZE 0xf0000000
@ -28,10 +28,10 @@
"kernel_comp_size=0x8000000\0" "kernel_comp_size=0x8000000\0"
#define CFG_EXTRA_ENV_SETTINGS \ #define CFG_EXTRA_ENV_SETTINGS \
ENV_MEM_LAYOUT_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "partitions=" PARTS_DEFAULT \
"partitions=" PARTS_DEFAULT \ ENV_MEM_LAYOUT_SETTINGS \
ROCKCHIP_DEVICE_SETTINGS \ ROCKCHIP_DEVICE_SETTINGS \
"boot_targets=" BOOT_TARGETS "\0" "boot_targets=" BOOT_TARGETS "\0"
#endif #endif /* __CONFIG_RK3568_COMMON_H */

12
include/configs/rk3588_common.h
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@ -1,4 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0+ */ /* SPDX-License-Identifier: GPL-2.0+ */
/* /*
* (C) Copyright 2021 Rockchip Electronics Co., Ltd * (C) Copyright 2021 Rockchip Electronics Co., Ltd
* Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd. * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd.
@ -26,11 +26,11 @@
"ramdisk_addr_r=0x12180000\0" \ "ramdisk_addr_r=0x12180000\0" \
"kernel_comp_size=0x8000000\0" "kernel_comp_size=0x8000000\0"
#define CFG_EXTRA_ENV_SETTINGS \ #define CFG_EXTRA_ENV_SETTINGS \
"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
"partitions=" PARTS_DEFAULT \ "partitions=" PARTS_DEFAULT \
ENV_MEM_LAYOUT_SETTINGS \ ENV_MEM_LAYOUT_SETTINGS \
ROCKCHIP_DEVICE_SETTINGS \ ROCKCHIP_DEVICE_SETTINGS \
"boot_targets=" BOOT_TARGETS "\0" "boot_targets=" BOOT_TARGETS "\0"
#endif /* __CONFIG_RK3588_COMMON_H */ #endif /* __CONFIG_RK3588_COMMON_H */