arm64: renesas: Add Renesas R-Car Gen4 SCIF/HSCIF loader SREC generation

Add Renesas R-Car Gen4 SCIF/HSCIF loader compatible SREC generation.
This is a regular U-Boot SPL SREC augmented with a short header which
describes where to store the received data and how much data to store.
This header is interpreted by the R-Car Gen4 BootROM SCIF/HSCIF loader.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
This commit is contained in:
Marek Vasut 2025-06-15 12:51:08 +02:00
parent f85d97b26c
commit 26758c24b9
2 changed files with 11 additions and 1 deletions

View File

@ -34,6 +34,15 @@ else
srec_cat_le_cmd := "-l-e-constant"
endif
ifneq ($(CONFIG_RCAR_GEN4),)
quiet_cmd_srec_cat = SRECCAT $@
cmd_srec_cat = srec_cat -output $@ -M 8 $< -M 8 \
-Output_Block_Size 16 \
-generate 0xeb203000 0xeb203154 $(srec_cat_le_cmd) 0x0 4 \
-generate 0xeb203154 0xeb203158 $(srec_cat_le_cmd) $(CONFIG_SPL_TEXT_BASE) 4 \
-generate 0xeb203158 0xeb203264 $(srec_cat_le_cmd) 0x0 4 \
-generate 0xeb203264 0xeb203268 $(srec_cat_le_cmd) $$(( ( $2 + 4 ) / 4 )) 4
else
ifneq ($(CONFIG_R8A774C0)$(CONFIG_R8A77990)$(CONFIG_R8A77995),)
#
# The first 6 generate statements generate the R-Car Gen3 SCIF loader header.
@ -90,6 +99,7 @@ quiet_cmd_srec_cat = SRECCAT $@
-generate 0xe6301154 0xe6301158 $(srec_cat_le_cmd) $(CONFIG_SPL_TEXT_BASE) 4 \
-generate 0xe6301264 0xe6301268 $(srec_cat_le_cmd) $2 4
endif
endif
spl/u-boot-spl.scif: spl/u-boot-spl.srec spl/u-boot-spl.bin
$(call cmd,srec_cat,$(shell wc -c spl/u-boot-spl.bin | awk '{printf("0x%08x\n",$$1)}'))

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@ -1598,7 +1598,7 @@ config SPL_OPENSBI_SCRATCH_OPTIONS
config SPL_TARGET
string "Addtional build targets for 'make'"
default "spl/u-boot-spl.srec" if RCAR_GEN2
default "spl/u-boot-spl.scif" if RCAR_GEN3
default "spl/u-boot-spl.scif" if RCAR_64
default ""
help
On some platforms we need to have 'make' run additional build target