mirrors/u-boot
1
0
Fork 0
mirror of https://source.denx.de/u-boot/u-boot.git synced 2025-08-15 11:46:59 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity

ARM: stm32mp: Fix dram_bank_mmu_setup() for LMB located above ram_top

Browse Source 
Previously, all LMB marked with LMB_NOMAP (above and below ram_top)
are considered as invalid entry in TLB.

Since commit 1a48b0be93 ("lmb: prohibit allocations above ram_top
 even from same bank") all LMB located above ram_top are now marked
LMB_NOOVERWRITE and no more LMB_MAP.

This area above ram_top is reserved for OPTEE and must not be cacheable,
otherwise this leads to a Panic on some boards (Issue on STM32MP135F-DK).

Restore previous behavior by marking invalid entry all TLB above ram_top.

Fixes: 1a48b0be93 ("lmb: prohibit allocations above ram_top even from same bank")

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
cc: Sughosh Ganu <sughosh.ganu@linaro.org>
Acked-by: Sughosh Ganu <sughosh.ganu@linaro.org>
This commit is contained in:
Patrice Chotard 2024-12-13 14:26:55 +01:00 committed by Tom Rini
parent 1cde96bee5
commit 25fb58e88a
1 changed files with 6 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
arch/arm/mach-stm32mp/stm32mp1/cpu.c
View File

@ -53,6 +53,7 @@ void dram_bank_mmu_setup(int bank)
struct bd_info *bd = gd->bd; struct bd_info *bd = gd->bd;
int i; int i;
phys_addr_t start; phys_addr_t start;
phys_addr_t addr;
phys_size_t size; phys_size_t size;
bool use_lmb = false; bool use_lmb = false;
enum dcache_option option; enum dcache_option option;
@ -77,8 +78,12 @@ void dram_bank_mmu_setup(int bank)
for (i = start >> MMU_SECTION_SHIFT; for (i = start >> MMU_SECTION_SHIFT;
i < (start >> MMU_SECTION_SHIFT) + (size >> MMU_SECTION_SHIFT); i < (start >> MMU_SECTION_SHIFT) + (size >> MMU_SECTION_SHIFT);
i++) { i++) {
addr = i << MMU_SECTION_SHIFT;
option = DCACHE_DEFAULT_OPTION; option = DCACHE_DEFAULT_OPTION;
if (use_lmb && lmb_is_reserved_flags(i << MMU_SECTION_SHIFT, LMB_NOMAP)) if (use_lmb &&
(lmb_is_reserved_flags(i << MMU_SECTION_SHIFT, LMB_NOMAP) ||
addr >= gd->ram_top)
)
option = 0; /* INVALID ENTRY in TLB */ option = 0; /* INVALID ENTRY in TLB */
set_section_dcache(i, option); set_section_dcache(i, option);
} }