memory: ti-aemif: Make AEMIF driver architecture agnostic

AEMIF controller is present on other SoCs than the Keystone ones.

Remove Keystone specificities from the driver to be able to use it from
other architectures.
Adapt the ks2_evm/board.c to fit the new driver.

Signed-off-by: Bastien Curutchet <bastien.curutchet@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Bastien Curutchet 2024-10-21 17:13:26 +02:00 committed by Tom Rini
parent 7a7b13838f
commit 1ba44c8eed
3 changed files with 14 additions and 11 deletions

View File

@ -16,6 +16,7 @@
#define AEMIF_PRESERVE -1
struct aemif_config {
void *base;
unsigned mode;
unsigned select_strobe;
unsigned extend_wait;

View File

@ -49,8 +49,10 @@ int dram_init(void)
gd->ram_size = get_ram_size((long *)CFG_SYS_SDRAM_BASE,
CFG_MAX_RAM_BANK_SIZE);
#if defined(CONFIG_TI_AEMIF)
if (!(board_is_k2g_ice() || board_is_k2g_i1()))
if (!(board_is_k2g_ice() || board_is_k2g_i1())) {
aemif_configs->base = (void *)KS2_AEMIF_CNTRL_BASE;
aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs);
}
#endif
if (!(board_is_k2g_ice() || board_is_k2g_i1())) {

View File

@ -9,10 +9,10 @@
#include <asm/arch/hardware.h>
#include <asm/ti-common/ti-aemif.h>
#define AEMIF_WAITCYCLE_CONFIG (KS2_AEMIF_CNTRL_BASE + 0x4)
#define AEMIF_NAND_CONTROL (KS2_AEMIF_CNTRL_BASE + 0x60)
#define AEMIF_ONENAND_CONTROL (KS2_AEMIF_CNTRL_BASE + 0x5c)
#define AEMIF_CONFIG(cs) (KS2_AEMIF_CNTRL_BASE + 0x10 + ((cs) * 4))
#define AEMIF_WAITCYCLE_CONFIG (0x4)
#define AEMIF_NAND_CONTROL (0x60)
#define AEMIF_ONENAND_CONTROL (0x5c)
#define AEMIF_CONFIG(cs) (0x10 + ((cs) * 4))
#define AEMIF_CFG_SELECT_STROBE(v) ((v) ? 1 << 31 : 0)
#define AEMIF_CFG_EXTEND_WAIT(v) ((v) ? 1 << 30 : 0)
@ -38,17 +38,17 @@ static void aemif_configure(int cs, struct aemif_config *cfg)
unsigned long tmp;
if (cfg->mode == AEMIF_MODE_NAND) {
tmp = __raw_readl(AEMIF_NAND_CONTROL);
tmp = __raw_readl(cfg->base + AEMIF_NAND_CONTROL);
tmp |= (1 << cs);
__raw_writel(tmp, AEMIF_NAND_CONTROL);
__raw_writel(tmp, cfg->base + AEMIF_NAND_CONTROL);
} else if (cfg->mode == AEMIF_MODE_ONENAND) {
tmp = __raw_readl(AEMIF_ONENAND_CONTROL);
tmp = __raw_readl(cfg->base + AEMIF_ONENAND_CONTROL);
tmp |= (1 << cs);
__raw_writel(tmp, AEMIF_ONENAND_CONTROL);
__raw_writel(tmp, cfg->base + AEMIF_ONENAND_CONTROL);
}
tmp = __raw_readl(AEMIF_CONFIG(cs));
tmp = __raw_readl(cfg->base + AEMIF_CONFIG(cs));
set_config_field(tmp, SELECT_STROBE, cfg->select_strobe);
set_config_field(tmp, EXTEND_WAIT, cfg->extend_wait);
@ -61,7 +61,7 @@ static void aemif_configure(int cs, struct aemif_config *cfg)
set_config_field(tmp, TURN_AROUND, cfg->turn_around);
set_config_field(tmp, WIDTH, cfg->width);
__raw_writel(tmp, AEMIF_CONFIG(cs));
__raw_writel(tmp, cfg->base + AEMIF_CONFIG(cs));
}
void aemif_init(int num_cs, struct aemif_config *config)