Merge tag 'u-boot-imx-master-20240224' of https://source.denx.de/u-boot/custodians/u-boot-imx

- Enable the thermal driver for the imx8m phycore boards.
- Convert imx53-qsb to watchdog driver to fix the 'reset' command.
- Remove multiline string from imx6dl-sielaff.
- Add SPI boot support for imxrt1050-evk.
- Convert opos6uldev to watchdog driver to fix the 'reset' command.

arch/arm/dts/imx53-qsb-u-boot.dtsi

@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/ {
+	wdt-reboot {
+		compatible = "wdt-reboot";
+		wdt = <&wdog1>;
+		bootph-pre-ram;
+	};
+};
+
+&wdog1 {
+	bootph-pre-ram;
+};

arch/arm/dts/imx6ul-opos6ul-u-boot.dtsi

@@ -9,6 +9,12 @@
 	soc {
 		bootph-pre-ram;
 	};
+
+	wdt-reboot {
+		compatible = "wdt-reboot";
+		wdt = <&wdog1>;
+		bootph-pre-ram;
+	};
 };
 
 &aips2 {
@@ -26,3 +32,7 @@
 &usdhc1 {
 	bootph-pre-ram;
 };
+
+&wdog1 {
+	bootph-pre-ram;
+};

arch/arm/dts/imx93-var-som-symphony.dts

@@ -285,6 +285,24 @@
 	status = "okay";
 };
 
+&usbotg1 {
+	dr_mode = "otg";
+	hnp-disable;
+	srp-disable;
+	adp-disable;
+	disable-over-current;
+	status = "okay";
+};
+
+&usbotg2 {
+	dr_mode = "host";
+	hnp-disable;
+	srp-disable;
+	adp-disable;
+	disable-over-current;
+	status = "okay";
+};
+
 /* SD */
 &usdhc2 {
 	pinctrl-names = "default", "state_100mhz", "state_200mhz";

arch/arm/dts/imx93.dtsi

@@ -149,6 +149,20 @@
 		};
 	};
 
+	usbphynop1: usbphynop1 {
+		compatible = "usb-nop-xceiv";
+		#phy-cells = <0>;
+		clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>;
+		clock-names = "main_clk";
+	};
+
+	usbphynop2: usbphynop2 {
+		compatible = "usb-nop-xceiv";
+		#phy-cells = <0>;
+		clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>;
+		clock-names = "main_clk";
+	};
+
 	soc@0 {
 		compatible = "simple-bus";
 		#address-cells = <1>;
@@ -844,5 +858,49 @@
 			#power-domain-cells = <1>;
 			status = "disabled";
 		};
+
+		usbotg1: usb@4c100000 {
+			compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
+			reg = <0x4c100000 0x200>;
+			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>,
+				 <&clk IMX93_CLK_HSIO_32K_GATE>;
+			clock-names = "usb_ctrl_root_clk", "usb_wakeup";
+			assigned-clocks = <&clk IMX93_CLK_HSIO>;
+			assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
+			assigned-clock-rates = <133000000>;
+			phys = <&usbphynop1>;
+			fsl,usbmisc = <&usbmisc1 0>;
+			status = "disabled";
+		};
+
+		usbmisc1: usbmisc@4c100200 {
+			compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
+				     "fsl,imx6q-usbmisc";
+			reg = <0x4c100200 0x200>;
+			#index-cells = <1>;
+		};
+
+		usbotg2: usb@4c200000 {
+			compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
+			reg = <0x4c200000 0x200>;
+			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>,
+				 <&clk IMX93_CLK_HSIO_32K_GATE>;
+			clock-names = "usb_ctrl_root_clk", "usb_wakeup";
+			assigned-clocks = <&clk IMX93_CLK_HSIO>;
+			assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
+			assigned-clock-rates = <133000000>;
+			phys = <&usbphynop2>;
+			fsl,usbmisc = <&usbmisc2 0>;
+			status = "disabled";
+		};
+
+		usbmisc2: usbmisc@4c200200 {
+			compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
+				     "fsl,imx6q-usbmisc";
+			reg = <0x4c200200 0x200>;
+			#index-cells = <1>;
+		};
 	};
 };

arch/arm/dts/imxrt1020-evk-u-boot.dtsi

@@ -5,6 +5,10 @@
  */
 
 / {
+	binman: binman {
+		multiple-images;
+	};
+
 	chosen {
 		bootph-pre-ram;
 	};

arch/arm/dts/imxrt1050-evk-u-boot.dtsi

@@ -8,6 +8,10 @@
 #include "imxrt1050-pinfunc.h"
 
 / {
+	binman: binman {
+		multiple-images;
+	};
+
 	aliases {
 		display0 = &lcdif;
 		usbphy0 = &usbphy1;
@@ -113,6 +117,33 @@
 	};
 };
 
+&binman {
+#ifdef CONFIG_FSPI_CONF_HEADER
+	imx-boot {
+		filename = "flash.bin";
+		pad-byte = <0x00>;
+
+		fspi_conf_block {
+			filename = CONFIG_FSPI_CONF_FILE;
+			type = "blob-ext";
+			offset = <0x0>;
+		};
+
+		spl {
+			filename = "SPL";
+			offset = <0x1000>;
+			type = "blob-ext";
+		};
+
+		binman_uboot: uboot {
+			filename = "u-boot.img";
+			offset = <0x10000>;
+			type = "blob-ext";
+		};
+	};
+#endif
+};
+
 &osc {
 	bootph-pre-ram;
 };

arch/arm/dts/imxrt1170-evk-u-boot.dtsi

@@ -6,6 +6,10 @@
  */
 
 / {
+	binman: binman {
+		multiple-images;
+	};
+
 	chosen {
 		bootph-pre-ram;
 	};

arch/arm/mach-imx/imxrt/Kconfig

@@ -2,6 +2,7 @@ if ARCH_IMXRT
 
 config IMXRT
 	bool
+	select BINMAN
 	select SYS_FSL_ERRATUM_ESDHC135
 
 config IMXRT1020

board/freescale/imxrt1050-evk/MAINTAINERS

@@ -4,3 +4,4 @@ S:	Maintained
 F:	board/freescale/imxrt1050-evk
 F:	include/configs/imxrt1050-evk.h
 F:	configs/imxrt1050-evk_defconfig
+F:	configs/imxrt1050-evk_fspi_defconfig

board/freescale/imxrt1050-evk/imximage-nor.cfg

@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2024
+ * Author(s): Jesse Taube <Mr.Bossman075@gmail.com>
+ */
+
+#include <config.h>
+
+/* image version */
+
+IMAGE_VERSION 2
+
+/*
+ * Boot Device : one of
+ * spi/sd/nand/onenand, qspi/nor
+ */
+
+BOOT_FROM	nor
+
+/*
+ * Device Configuration Data (DCD)
+ *
+ * Each entry must have the format:
+ * Addr-type           Address        Value
+ *
+ * where:
+ *	Addr-type register length (1,2 or 4 bytes)
+ *	Address	  absolute address of the register
+ *	value	  value to be stored in the register
+ */
+
+/*
+ * 0x400AC044 is used to configure the flexram.
+ * Unfortunately setting all to OCRAM only works for MMC
+ * and setting all to DTCM only works for FLEXSPI NOR.
+ * This configuration fortunately works for both SPI and MMC.
+*/
+/* Set first two banks FlexRAM as OCRAM(01b) and the rest to DTCM(10b) */
+DATA 4 0x400AC044 0x55aaaaaa
+/* Use FLEXRAM_BANK_CFG to config FlexRAM */
+SET_BIT 4 0x400AC040 0x4

board/freescale/imxrt1050-evk/imximage.cfg

@@ -29,7 +29,13 @@ BOOT_FROM	sd
  *	value	  value to be stored in the register
  */
 
-/* Set all FlexRAM as OCRAM(01b) */
+/*
-DATA 4 0x400AC044 0x55555555
+ * 0x400AC044 is used to configure the flexram.
+ * Unfortunately setting all to OCRAM only works for MMC
+ * and setting all to DTCM only works for FLEXSPI NOR.
+ * This configuration fortunately works for both SPI and MMC.
+*/
+/* Set first two banks FlexRAM as OCRAM(01b) and the rest to DTCM(10b) */
+DATA 4 0x400AC044 0x55aaaaaa
 /* Use FLEXRAM_BANK_CFG to config FlexRAM */
 SET_BIT 4 0x400AC040 0x4

board/freescale/imxrt1050-evk/imxrt1050-evk.c

@@ -68,7 +68,12 @@ void spl_board_init(void)
 
 u32 spl_boot_device(void)
 {
+	/* There is no way to find the boot device so look if there is a valid IVT in RAM for MMC */
+	u32 nor_ivt = *(u32 *)(CONFIG_SYS_LOAD_ADDR - 0xC00);
+
+	if (nor_ivt == 0x402000d1)
 		return BOOT_DEVICE_MMC1;
+	return BOOT_DEVICE_NOR;
 }
 #endif
 

board/sielaff/imx6dl-sielaff/spl.c

@@ -93,8 +93,8 @@ int board_mmc_init(struct bd_info *bis)
 			usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
 			break;
 		default:
-			printf("Warning: you configured more USDHC controllers \
+			printf("Warning: you configured more USDHC controllers (%d) than supported by the board\n",
-				(%d) than supported by the board\n", i + 1);
+			       i + 1);
 			return -EINVAL;
 		}
 

configs/imx8mm-phygate-tauri-l_defconfig

@@ -112,4 +112,5 @@ CONFIG_SPL_SYSRESET=y
 CONFIG_SYSRESET_PSCI=y
 CONFIG_SYSRESET_WATCHDOG=y
 CONFIG_DM_THERMAL=y
+CONFIG_IMX_TMU=y
 CONFIG_IMX_WATCHDOG=y

configs/imx93_var_som_defconfig

@@ -69,6 +69,7 @@ CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_POWEROFF=y
 CONFIG_CMD_READ=y
+CONFIG_CMD_USB=y
 CONFIG_CMD_WDT=y
 CONFIG_BOOTP_PREFER_SERVERIP=y
 CONFIG_CMD_SNTP=y
@@ -95,6 +96,12 @@ CONFIG_SPL_CLK_IMX93=y
 CONFIG_CLK_IMX93=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x82800000
+CONFIG_FASTBOOT_BUF_SIZE=0x20000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_UUU_SUPPORT=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_GPIO_HOG=y
 CONFIG_IMX_RGPIO2P=y
 CONFIG_DM_PCA953X=y
@@ -131,6 +138,14 @@ CONFIG_DM_SERIAL=y
 CONFIG_FSL_LPUART=y
 CONFIG_DM_THERMAL=y
 CONFIG_IMX_TMU=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1fc9
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0152
+CONFIG_CI_UDC=y
+CONFIG_USB_PORT_AUTO=y
 CONFIG_ULP_WATCHDOG=y
 CONFIG_WDT=y
 CONFIG_LZO=y

configs/imxrt1050-evk_defconfig

@@ -10,21 +10,22 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20280000
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20020000
 CONFIG_ENV_OFFSET=0x80000
 CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="imxrt1050-evk"
-CONFIG_SPL_TEXT_BASE=0x20209000
+CONFIG_SPL_TEXT_BASE=0x20002000
 CONFIG_TARGET_IMXRT1050_EVK=y
 CONFIG_SPL_MMC=y
 CONFIG_SPL_SERIAL=y
 CONFIG_SPL_SIZE_LIMIT=0x20000
 CONFIG_SPL=y
-CONFIG_SYS_LOAD_ADDR=0x20209000
+CONFIG_SYS_LOAD_ADDR=0x20002000
 CONFIG_HAVE_SYS_UBOOT_START=y
 CONFIG_SYS_UBOOT_START=0x800023FD
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_SD_BOOT=y
+CONFIG_SPI_BOOT=y
 # CONFIG_USE_BOOTCOMMAND is not set
 CONFIG_SYS_CBSIZE=256
 CONFIG_SYS_PBSIZE=276
@@ -36,6 +37,7 @@ CONFIG_SPL_BOARD_INIT=y
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x100
+CONFIG_SPL_NOR_SUPPORT=y
 # CONFIG_BOOTM_NETBSD is not set
 # CONFIG_BOOTM_PLAN9 is not set
 # CONFIG_BOOTM_RTEMS is not set

configs/imxrt1050-evk_fspi_defconfig

@@ -0,0 +1,100 @@
+CONFIG_ARM=y
+CONFIG_SYS_DCACHE_OFF=y
+# CONFIG_SPL_SYS_DCACHE_OFF is not set
+CONFIG_ARCH_IMXRT=y
+CONFIG_TEXT_BASE=0x80002000
+CONFIG_SYS_MALLOC_LEN=0x40000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL_GPIO=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20020000
+CONFIG_ENV_OFFSET=0x80000
+CONFIG_IMX_CONFIG="board/freescale/imxrt1050-evk/imximage-nor.cfg"
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="imxrt1050-evk"
+CONFIG_SPL_TEXT_BASE=0x20002000
+CONFIG_TARGET_IMXRT1050_EVK=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_SIZE_LIMIT=0x20000
+CONFIG_SPL=y
+CONFIG_SYS_LOAD_ADDR=0x20002000
+CONFIG_HAVE_SYS_UBOOT_START=y
+CONFIG_SYS_UBOOT_START=0x800023FD
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SD_BOOT=y
+CONFIG_SPI_BOOT=y
+# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
+CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_NO_BSS_LIMIT=y
+CONFIG_SPL_BOARD_INIT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x100
+CONFIG_SPL_NOR_SUPPORT=y
+# CONFIG_BOOTM_NETBSD is not set
+# CONFIG_BOOTM_PLAN9 is not set
+# CONFIG_BOOTM_RTEMS is not set
+# CONFIG_BOOTM_VXWORKS is not set
+CONFIG_CMD_USB=y
+# CONFIG_CMD_MII is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_TFTP_BLOCKSIZE=512
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+# CONFIG_OF_TRANSLATE is not set
+CONFIG_SPL_CLK_IMXRT1050=y
+CONFIG_CLK_IMXRT1050=y
+# CONFIG_SPL_DM_GPIO is not set
+CONFIG_MXC_GPIO=y
+# CONFIG_INPUT is not set
+CONFIG_FSL_USDHC=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_IMXRT=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_IMXRT_SDRAM=y
+CONFIG_FSL_LPUART=y
+CONFIG_TIMER=y
+CONFIG_SPL_TIMER=y
+CONFIG_IMX_GPT_TIMER=y
+CONFIG_USB=y
+# CONFIG_SPL_DM_USB is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_VIDEO=y
+CONFIG_VIDEO_LOGO=y
+CONFIG_BACKLIGHT_GPIO=y
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_VIDEO_MXS=y
+CONFIG_SPLASH_SCREEN=y
+CONFIG_SPLASH_SCREEN_ALIGN=y
+CONFIG_BMP_16BPP=y
+CONFIG_SHA1=y
+CONFIG_SHA256=y
+CONFIG_HEXDUMP=y
+CONFIG_FSPI_CONF_HEADER=y
+CONFIG_FSPI_CONF_FILE="fspi_header.bin"
+CONFIG_READ_CLK_SOURCE=0x03
+CONFIG_DEVICE_TYPE=0x00
+CONFIG_FLASH_PAD_TYPE=0x08
+CONFIG_SERIAL_CLK_FREQUENCY=0x07
+CONFIG_FSPI_COL_ADDR_W=0x03
+CONFIG_FSPI_CONTROLLER_MISC=0x00000059
+CONFIG_FSPI_FLASH_A1_SIZE=0x04000000
+CONFIG_LUT_SEQUENCE="0xa0, 0x87, 0x18, 0x8b, 0x10, 0x8f, 0x06, 0xb3, 0x04, 0xa7"

configs/mx53loco_defconfig

@@ -60,6 +60,8 @@ CONFIG_POWER_FSL=y
 CONFIG_POWER_I2C=y
 CONFIG_DM_SERIAL=y
 CONFIG_MXC_UART=y
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_WATCHDOG=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_MX5=y
 CONFIG_USB_STORAGE=y
@@ -67,3 +69,4 @@ CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_MCS7830=y
 CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_IMX_WATCHDOG=y

configs/opos6uldev_defconfig

@@ -102,6 +102,8 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_DM_SERIAL=y
 CONFIG_MXC_UART=y
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_WATCHDOG=y
 CONFIG_IMX_THERMAL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
@@ -123,4 +125,5 @@ CONFIG_SPLASH_SOURCE=y
 CONFIG_BMP_16BPP=y
 CONFIG_BMP_24BPP=y
 CONFIG_BMP_32BPP=y
+CONFIG_IMX_WATCHDOG=y
 # CONFIG_EFI_LOADER is not set

configs/phycore-imx8mm_defconfig

@@ -128,4 +128,5 @@ CONFIG_SPL_SYSRESET=y
 CONFIG_SYSRESET_PSCI=y
 CONFIG_SYSRESET_WATCHDOG=y
 CONFIG_DM_THERMAL=y
+CONFIG_IMX_TMU=y
 CONFIG_IMX_WATCHDOG=y

configs/phycore-imx8mp_defconfig

@@ -138,6 +138,7 @@ CONFIG_SPL_SYSRESET=y
 CONFIG_SYSRESET_PSCI=y
 CONFIG_SYSRESET_WATCHDOG=y
 CONFIG_DM_THERMAL=y
+CONFIG_IMX_TMU=y
 CONFIG_USB=y
 CONFIG_DM_USB_GADGET=y
 CONFIG_USB_XHCI_HCD=y

doc/board/nxp/imxrt1050-evk.rst

@@ -39,3 +39,33 @@ switch label numbers reference).
   The USB console connector is the one close the ethernet connector
 
 - Insert the micro SD card in the board, power it up and U-Boot messages should come up.
+
+
+How to use U-Boot with SPI flash on NXP i.MXRT1050 EVK
+------------------------------------------------------
+
+- Build U-Boot for i.MXRT1050 EVK:
+
+.. code-block:: bash
+
+   $ make mrproper
+   $ make imxrt1050-evk_fspi_defconfig
+   $ make
+
+This will generate SPL, uboot.img, fspi_header.bin, and the final image (flash.bin).
+
+To boot from SPI flash on other boards, you may need to change the flash header config,
+which is specific to your flash chip, in Kconfig.
+The flash config is 4K in size and is documented on page 217 of the imxrt1050 RM.
+The default flash chip on the i.MXRT1050 EVK is the S26KS512SDPBHI02 HYPERFLASH.
+
+- Jumper settings::
+
+   SW7: 0 1 1 0
+
+where 0 means bottom position and 1 means top position (from the
+switch label numbers reference).
+
+- Connect the USB cable between the EVK and the PC for the console.
+
+- Use either JTAG or SWD to write `flash.bin` to the NOR. I used Mcuexpresso IDE's GUI flash tool.

include/configs/imxrt1050-evk.h

@@ -25,4 +25,10 @@
 		"stderr=serial,vidconsole\0"
 #endif
 
+/*
+ * Address of U-Boot for SPI NOR boot
+ */
+
+#define CFG_SYS_UBOOT_BASE			0x60010000
+
 #endif /* __IMXRT1050_EVK_H */