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Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq

Browse Source 
- Bug fixes related to FSL-IFC, watchdog
- layerscape-pcie, flexspi, T2080rdb.
This commit is contained in:
Tom Rini 2021-03-24 08:11:30 -04:00
commit 1886e9d0c3
23 changed files with 45 additions and 35 deletions
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8
arch/powerpc/dts/t2080rdb.dts
View File

@ -30,3 +30,11 @@
spi-max-frequency = <10000000>; /* input clock */ spi-max-frequency = <10000000>; /* input clock */
}; };
}; };
&i2c0 {
status = "okay";
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
};
};

5
board/freescale/t208xrdb/README
View File

@ -34,6 +34,11 @@ T2080 includes the following functions and features:
- Support for hardware virtualization and partitioning enforcement - Support for hardware virtualization and partitioning enforcement
- QorIQ Platform's Trust Architecture 2.0 - QorIQ Platform's Trust Architecture 2.0
User Guide
----------
The T2080RDB User Guide is available on the web at
https://www.nxp.com/docs/en/user-guide/T2080RDBPCUG.pdf
Differences between T2080 and T2081 Differences between T2080 and T2081
----------------------------------- -----------------------------------
Feature T2080 T2081 Feature T2080 T2081

2
configs/T2080RDB_NAND_defconfig
View File

@ -77,6 +77,8 @@ CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_NAND=y CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
CONFIG_DM_RTC=y
CONFIG_RTC_DS1307=y
CONFIG_SYS_NS16550=y CONFIG_SYS_NS16550=y
CONFIG_SPI=y CONFIG_SPI=y
CONFIG_DM_SPI=y CONFIG_DM_SPI=y

2
configs/T2080RDB_SDCARD_defconfig
View File

@ -74,6 +74,8 @@ CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
CONFIG_DM_RTC=y
CONFIG_RTC_DS1307=y
CONFIG_SYS_NS16550=y CONFIG_SYS_NS16550=y
CONFIG_SPI=y CONFIG_SPI=y
CONFIG_DM_SPI=y CONFIG_DM_SPI=y

2
configs/T2080RDB_SPIFLASH_defconfig
View File

@ -76,6 +76,8 @@ CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
CONFIG_DM_RTC=y
CONFIG_RTC_DS1307=y
CONFIG_SYS_NS16550=y CONFIG_SYS_NS16550=y
CONFIG_SPI=y CONFIG_SPI=y
CONFIG_DM_SPI=y CONFIG_DM_SPI=y

2
configs/T2080RDB_defconfig
View File

@ -61,6 +61,8 @@ CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
CONFIG_DM_RTC=y
CONFIG_RTC_DS1307=y
CONFIG_SYS_NS16550=y CONFIG_SYS_NS16550=y
CONFIG_SPI=y CONFIG_SPI=y
CONFIG_DM_SPI=y CONFIG_DM_SPI=y

3
configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
View File

@ -49,8 +49,9 @@ CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y CONFIG_FSL_ESDHC=y
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_AQUANTIA=y CONFIG_PHY_AQUANTIA=y

5
configs/ls1028aqds_tfa_defconfig
View File

@ -8,7 +8,7 @@ CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_FSPI_AHB_EN_4BYTE=y
CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
@ -55,8 +55,9 @@ CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y CONFIG_FSL_ESDHC=y
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_AQUANTIA=y CONFIG_PHY_AQUANTIA=y

5
configs/ls1028aqds_tfa_lpuart_defconfig
View File

@ -7,7 +7,7 @@ CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_FSPI_AHB_EN_4BYTE=y
CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
@ -55,8 +55,9 @@ CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y CONFIG_FSL_ESDHC=y
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_AQUANTIA=y CONFIG_PHY_AQUANTIA=y

1
configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
View File

@ -48,7 +48,6 @@ CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y CONFIG_FSL_ESDHC=y
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_PHYLIB=y CONFIG_PHYLIB=y

3
configs/ls1028ardb_tfa_defconfig
View File

@ -8,7 +8,7 @@ CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_FSPI_AHB_EN_4BYTE=y
CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
@ -54,7 +54,6 @@ CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y CONFIG_FSL_ESDHC=y
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_PHYLIB=y CONFIG_PHYLIB=y

1
configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
View File

@ -50,7 +50,6 @@ CONFIG_FSL_ESDHC=y
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_SST=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set

1
configs/lx2160aqds_tfa_defconfig
View File

@ -57,7 +57,6 @@ CONFIG_FSL_ESDHC=y
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_SST=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set

1
configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
View File

@ -46,7 +46,6 @@ CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_ESDHC=y CONFIG_FSL_ESDHC=y
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_PHYLIB=y CONFIG_PHYLIB=y

1
configs/lx2160ardb_tfa_defconfig
View File

@ -55,7 +55,6 @@ CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_ESDHC=y CONFIG_FSL_ESDHC=y
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_PHYLIB=y CONFIG_PHYLIB=y

1
configs/lx2160ardb_tfa_stmm_defconfig
View File

@ -55,7 +55,6 @@ CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_ESDHC=y CONFIG_FSL_ESDHC=y
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_PHYLIB=y CONFIG_PHYLIB=y

17
drivers/mtd/nand/raw/fsl_ifc_nand.c
View File

@ -411,9 +411,16 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command,
/* READID must read all possible bytes while CEB is active */ /* READID must read all possible bytes while CEB is active */
case NAND_CMD_READID: case NAND_CMD_READID:
case NAND_CMD_PARAM: { case NAND_CMD_PARAM: {
/*
* For READID, read 8 bytes that are currently used.
* For PARAM, read all 3 copies of 256-bytes pages.
*/
int len = 8;
int timing = IFC_FIR_OP_RB; int timing = IFC_FIR_OP_RB;
if (command == NAND_CMD_PARAM) if (command == NAND_CMD_PARAM) {
timing = IFC_FIR_OP_RBCD; timing = IFC_FIR_OP_RBCD;
len = 256 * 3;
}
ifc_out32(&ifc->ifc_nand.nand_fir0, ifc_out32(&ifc->ifc_nand.nand_fir0,
(IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) | (IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
@ -423,12 +430,8 @@ static void fsl_ifc_cmdfunc(struct mtd_info *mtd, unsigned int command,
command << IFC_NAND_FCR0_CMD0_SHIFT); command << IFC_NAND_FCR0_CMD0_SHIFT);
ifc_out32(&ifc->ifc_nand.row3, column); ifc_out32(&ifc->ifc_nand.row3, column);
/* ifc_out32(&ifc->ifc_nand.nand_fbcr, len);
* although currently it's 8 bytes for READID, we always read ctrl->read_bytes = len;
* the maximum 256 bytes(for PARAM)
*/
ifc_out32(&ifc->ifc_nand.nand_fbcr, 256);
ctrl->read_bytes = 256;
set_addr(mtd, 0, 0, 0); set_addr(mtd, 0, 0, 0);
fsl_ifc_run_command(mtd); fsl_ifc_run_command(mtd);

2
drivers/pci/pcie_layerscape_ep.c
View File

@ -244,7 +244,7 @@ static int ls_pcie_ep_probe(struct udevice *dev)
int ret; int ret;
u32 svr; u32 svr;
pcie = devm_kmalloc(dev, sizeof(*pcie), GFP_KERNEL); pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
if (!pcie) if (!pcie)
return -ENOMEM; return -ENOMEM;

2
drivers/pci/pcie_layerscape_rc.c
View File

@ -254,7 +254,7 @@ static int ls_pcie_probe(struct udevice *dev)
pcie_rc->bus = dev; pcie_rc->bus = dev;
pcie = devm_kmalloc(dev, sizeof(*pcie), GFP_KERNEL); pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
if (!pcie) if (!pcie)
return -ENOMEM; return -ENOMEM;

2
drivers/rtc/ds1307.c
View File

@ -23,6 +23,7 @@
enum ds_type { enum ds_type {
ds_1307, ds_1307,
ds_1337, ds_1337,
ds_1339,
ds_1340, ds_1340,
m41t11, m41t11,
mcp794xx, mcp794xx,
@ -344,6 +345,7 @@ static const struct rtc_ops ds1307_rtc_ops = {
static const struct udevice_id ds1307_rtc_ids[] = { static const struct udevice_id ds1307_rtc_ids[] = {
{ .compatible = "dallas,ds1307", .data = ds_1307 }, { .compatible = "dallas,ds1307", .data = ds_1307 },
{ .compatible = "dallas,ds1337", .data = ds_1337 }, { .compatible = "dallas,ds1337", .data = ds_1337 },
{ .compatible = "dallas,ds1339", .data = ds_1339 },
{ .compatible = "dallas,ds1340", .data = ds_1340 }, { .compatible = "dallas,ds1340", .data = ds_1340 },
{ .compatible = "microchip,mcp7941x", .data = mcp794xx }, { .compatible = "microchip,mcp7941x", .data = mcp794xx },
{ .compatible = "st,m41t11", .data = m41t11 }, { .compatible = "st,m41t11", .data = m41t11 },

6
include/configs/ls1028aqds.h
View File

@ -81,12 +81,6 @@
#define CONFIG_SYS_SCSI_MAX_LUN 1 #define CONFIG_SYS_SCSI_MAX_LUN 1
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
CONFIG_SYS_SCSI_MAX_LUN) CONFIG_SYS_SCSI_MAX_LUN)
/* DSPI */
#ifdef CONFIG_FSL_DSPI
#define CONFIG_SPI_FLASH_SST
#define CONFIG_SPI_FLASH_EON
#endif
#ifndef SPL_NO_ENV #ifndef SPL_NO_ENV
#undef CONFIG_EXTRA_ENV_SETTINGS #undef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS \ #define CONFIG_EXTRA_ENV_SETTINGS \

6
include/configs/lx2160a_common.h
View File

@ -154,12 +154,6 @@
#endif #endif
#endif #endif
/* FlexSPI */
#ifdef CONFIG_NXP_FSPI
#define NXP_FSPI_FLASH_SIZE SZ_64M
#define NXP_FSPI_FLASH_NUM 1
#endif
/* GPIO */ /* GPIO */
#ifdef CONFIG_DM_GPIO #ifdef CONFIG_DM_GPIO
#ifndef CONFIG_MPC8XXX_GPIO #ifndef CONFIG_MPC8XXX_GPIO

2
include/fsl_ifc.h
View File

@ -140,7 +140,7 @@
#define CSOR_NOR_ADM_SHIFT_SHIFT 13 #define CSOR_NOR_ADM_SHIFT_SHIFT 13
#define CSOR_NOR_ADM_SHIFT(n) ((n) << CSOR_NOR_ADM_SHIFT_SHIFT) #define CSOR_NOR_ADM_SHIFT(n) ((n) << CSOR_NOR_ADM_SHIFT_SHIFT)
/* Type of the NOR device hooked */ /* Type of the NOR device hooked */
#define CSOR_NOR_NOR_MODE_AYSNC_NOR 0x00000000 #define CSOR_NOR_NOR_MODE_ASYNC_NOR 0x00000000
#define CSOR_NOR_NOR_MODE_AVD_NOR 0x00000020 #define CSOR_NOR_NOR_MODE_AVD_NOR 0x00000020
/* Time for Read Enable High to Output High Impedance */ /* Time for Read Enable High to Output High Impedance */
#define CSOR_NOR_TRHZ_MASK 0x0000001C #define CSOR_NOR_TRHZ_MASK 0x0000001C