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microblaze: exception: migrate MICROBLAZE_V5 to Kconfig
Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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@ -40,7 +40,7 @@ void _hw_exception_handler (void)
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case 0x7:
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case 0x7:
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puts("Priviledged or stack protection violation exception\n");
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puts("Priviledged or stack protection violation exception\n");
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break;
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break;
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#ifdef MICROBLAZE_V5
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#if CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP)
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case 0x1000:
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case 0x1000:
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puts("Exception in delay slot\n");
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puts("Exception in delay slot\n");
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break;
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break;
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@ -47,6 +47,15 @@ config XILINX_MICROBLAZE0_USR_EXCEP
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the exception vector table. The user exception vector is located at
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the exception vector table. The user exception vector is located at
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C_BASE_VECTORS + 0x8 address.
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C_BASE_VECTORS + 0x8 address.
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config XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP
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bool "MicroBlaze delay slot exception support"
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default y
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help
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Enable this option if the MicroBlaze processor supports exceptions
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caused by delay slot instructions (processor version >= v5.00). When
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enabled, the hw exception handler will print a message indicating
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whether the exception was triggered by a delay slot instruction.
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config XILINX_MICROBLAZE0_VECTOR_BASE_ADDR
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config XILINX_MICROBLAZE0_VECTOR_BASE_ADDR
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hex "Location of MicroBlaze vectors"
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hex "Location of MicroBlaze vectors"
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default 0x0
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default 0x0
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@ -11,9 +11,6 @@
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/* Microblaze is microblaze_0 */
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/* Microblaze is microblaze_0 */
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#define XILINX_FSL_NUMBER 3
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#define XILINX_FSL_NUMBER 3
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/* MicroBlaze CPU */
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#define MICROBLAZE_V5 1
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#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
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#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
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/* uart */
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/* uart */
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