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arm: dts: sunxi: h6: Update DT files

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Update the H6 DT files from the Linux 5.12 release.

The changes are minimal (many LED node renames), but also help to enable
USB port 0 in U-Boot (later), enable the RSB device (not yet used in
U-Boot), and also introduce an MMC frequency limit.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This commit is contained in:
Andre Przywara 2021-05-25 01:20:25 +01:00
parent fd075f77ca
commit 127e57c671
6 changed files with 45 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
arch/arm/dts/sun50i-h6-beelink-gs1.dts
View File

@ -43,7 +43,7 @@
leds { leds {
compatible = "gpio-leds"; compatible = "gpio-leds";
power { led {
label = "beelink:white:power"; label = "beelink:white:power";
gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
default-state = "on"; default-state = "on";
@ -289,10 +289,6 @@
vcc-pm-supply = <&reg_aldo1>; vcc-pm-supply = <&reg_aldo1>;
}; };
&rtc {
clocks = <&ext_osc32k>;
};
&spdif { &spdif {
status = "okay"; status = "okay";
}; };

20
arch/arm/dts/sun50i-h6-cpu-opp.dtsi
View File

@ -8,7 +8,7 @@
nvmem-cells = <&cpu_speed_grade>; nvmem-cells = <&cpu_speed_grade>;
opp-shared; opp-shared;
opp@480000000 { opp-480000000 {
clock-latency-ns = <244144>; /* 8 32k periods */ clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <480000000>; opp-hz = /bits/ 64 <480000000>;
@ -17,7 +17,7 @@
opp-microvolt-speed2 = <820000 820000 1200000>; opp-microvolt-speed2 = <820000 820000 1200000>;
}; };
opp@720000000 { opp-720000000 {
clock-latency-ns = <244144>; /* 8 32k periods */ clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <720000000>; opp-hz = /bits/ 64 <720000000>;
@ -26,7 +26,7 @@
opp-microvolt-speed2 = <820000 820000 1200000>; opp-microvolt-speed2 = <820000 820000 1200000>;
}; };
opp@816000000 { opp-816000000 {
clock-latency-ns = <244144>; /* 8 32k periods */ clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <816000000>; opp-hz = /bits/ 64 <816000000>;
@ -35,7 +35,7 @@
opp-microvolt-speed2 = <820000 820000 1200000>; opp-microvolt-speed2 = <820000 820000 1200000>;
}; };
opp@888000000 { opp-888000000 {
clock-latency-ns = <244144>; /* 8 32k periods */ clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <888000000>; opp-hz = /bits/ 64 <888000000>;
@ -44,7 +44,7 @@
opp-microvolt-speed2 = <820000 820000 1200000>; opp-microvolt-speed2 = <820000 820000 1200000>;
}; };
opp@1080000000 { opp-1080000000 {
clock-latency-ns = <244144>; /* 8 32k periods */ clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1080000000>; opp-hz = /bits/ 64 <1080000000>;
@ -53,7 +53,7 @@
opp-microvolt-speed2 = <880000 880000 1200000>; opp-microvolt-speed2 = <880000 880000 1200000>;
}; };
opp@1320000000 { opp-1320000000 {
clock-latency-ns = <244144>; /* 8 32k periods */ clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1320000000>; opp-hz = /bits/ 64 <1320000000>;
@ -62,7 +62,7 @@
opp-microvolt-speed2 = <940000 940000 1200000>; opp-microvolt-speed2 = <940000 940000 1200000>;
}; };
opp@1488000000 { opp-1488000000 {
clock-latency-ns = <244144>; /* 8 32k periods */ clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1488000000>; opp-hz = /bits/ 64 <1488000000>;
@ -71,7 +71,7 @@
opp-microvolt-speed2 = <1000000 1000000 1200000>; opp-microvolt-speed2 = <1000000 1000000 1200000>;
}; };
opp@1608000000 { opp-1608000000 {
clock-latency-ns = <244144>; /* 8 32k periods */ clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1608000000>; opp-hz = /bits/ 64 <1608000000>;
@ -80,7 +80,7 @@
opp-microvolt-speed2 = <1030000 1030000 1200000>; opp-microvolt-speed2 = <1030000 1030000 1200000>;
}; };
opp@1704000000 { opp-1704000000 {
clock-latency-ns = <244144>; /* 8 32k periods */ clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1704000000>; opp-hz = /bits/ 64 <1704000000>;
@ -89,7 +89,7 @@
opp-microvolt-speed2 = <1060000 1060000 1200000>; opp-microvolt-speed2 = <1060000 1060000 1200000>;
}; };
opp@1800000000 { opp-1800000000 {
clock-latency-ns = <244144>; /* 8 32k periods */ clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1800000000>; opp-hz = /bits/ 64 <1800000000>;

4
arch/arm/dts/sun50i-h6-orangepi-3.dts
View File

@ -43,13 +43,13 @@
leds { leds {
compatible = "gpio-leds"; compatible = "gpio-leds";
power { led-0 {
label = "orangepi:red:power"; label = "orangepi:red:power";
gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
default-state = "on"; default-state = "on";
}; };
status { led-1 {
label = "orangepi:green:status"; label = "orangepi:green:status";
gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */ gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
}; };

4
arch/arm/dts/sun50i-h6-orangepi.dtsi
View File

@ -42,13 +42,13 @@
leds { leds {
compatible = "gpio-leds"; compatible = "gpio-leds";
power { led-0 {
label = "orangepi:red:power"; label = "orangepi:red:power";
gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
default-state = "on"; default-state = "on";
}; };
status { led-1 {
label = "orangepi:green:status"; label = "orangepi:green:status";
gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */ gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
}; };

7
arch/arm/dts/sun50i-h6-pine-h64.dts
View File

@ -44,17 +44,17 @@
leds { leds {
compatible = "gpio-leds"; compatible = "gpio-leds";
heartbeat { led-0 {
label = "pine-h64:green:heartbeat"; label = "pine-h64:green:heartbeat";
gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
}; };
link { led-1 {
label = "pine-h64:white:link"; label = "pine-h64:white:link";
gpios = <&r_pio 0 3 GPIO_ACTIVE_HIGH>; /* PL3 */ gpios = <&r_pio 0 3 GPIO_ACTIVE_HIGH>; /* PL3 */
}; };
status { led-2 {
label = "pine-h64:blue:status"; label = "pine-h64:blue:status";
gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */ gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
}; };
@ -142,6 +142,7 @@
vqmmc-supply = <&reg_bldo2>; vqmmc-supply = <&reg_bldo2>;
non-removable; non-removable;
cap-mmc-hw-reset; cap-mmc-hw-reset;
mmc-hs200-1_8v;
bus-width = <8>; bus-width = <8>;
status = "okay"; status = "okay";
}; };

26
arch/arm/dts/sun50i-h6.dtsi
View File

@ -436,6 +436,7 @@
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>; pinctrl-0 = <&mmc0_pins>;
max-frequency = <150000000>;
status = "disabled"; status = "disabled";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
@ -452,6 +453,7 @@
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>; pinctrl-0 = <&mmc1_pins>;
max-frequency = <150000000>;
status = "disabled"; status = "disabled";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
@ -468,6 +470,7 @@
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>; pinctrl-0 = <&mmc2_pins>;
max-frequency = <150000000>;
status = "disabled"; status = "disabled";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
@ -680,6 +683,8 @@
<&ccu CLK_USB_OHCI0>; <&ccu CLK_USB_OHCI0>;
resets = <&ccu RST_BUS_OHCI0>, resets = <&ccu RST_BUS_OHCI0>,
<&ccu RST_BUS_EHCI0>; <&ccu RST_BUS_EHCI0>;
phys = <&usb2phy 0>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -690,6 +695,8 @@
clocks = <&ccu CLK_BUS_OHCI0>, clocks = <&ccu CLK_BUS_OHCI0>,
<&ccu CLK_USB_OHCI0>; <&ccu CLK_USB_OHCI0>;
resets = <&ccu RST_BUS_OHCI0>; resets = <&ccu RST_BUS_OHCI0>;
phys = <&usb2phy 0>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
@ -949,6 +956,11 @@
pins = "PL9"; pins = "PL9";
function = "s_cir_rx"; function = "s_cir_rx";
}; };
r_rsb_pins: r-rsb-pins {
pins = "PL0", "PL1";
function = "s_rsb";
};
}; };
r_ir: ir@7040000 { r_ir: ir@7040000 {
@ -979,6 +991,20 @@
#size-cells = <0>; #size-cells = <0>;
}; };
r_rsb: rsb@7083000 {
compatible = "allwinner,sun8i-a23-rsb";
reg = <0x07083000 0x400>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&r_ccu CLK_R_APB2_RSB>;
clock-frequency = <3000000>;
resets = <&r_ccu RST_R_APB2_RSB>;
pinctrl-names = "default";
pinctrl-0 = <&r_rsb_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
ths: thermal-sensor@5070400 { ths: thermal-sensor@5070400 {
compatible = "allwinner,sun50i-h6-ths"; compatible = "allwinner,sun50i-h6-ths";
reg = <0x05070400 0x100>; reg = <0x05070400 0x100>;