ARM: tegra: board: set CFG_SYS_NS16550_COM1 according to TEGRA_ENABLE_UART

Link CFG_SYS_NS16550_COM1 value to chosen CONFIG_TEGRA_ENABLE_UART Tegra
wide. Remove all CFG_SYS_NS16550_COM1 from device headers.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
This commit is contained in:
Svyatoslav Ryhel 2025-03-31 09:33:17 +03:00
parent e9245a360a
commit 11bf63c230
33 changed files with 5 additions and 99 deletions

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@ -236,18 +236,23 @@ void board_init_uart_f(void)
int uart_ids = 0; /* bit mask of which UART ids to enable */
#ifdef CONFIG_TEGRA_ENABLE_UARTA
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
uart_ids |= UARTA;
#endif
#ifdef CONFIG_TEGRA_ENABLE_UARTB
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTB_BASE
uart_ids |= UARTB;
#endif
#ifdef CONFIG_TEGRA_ENABLE_UARTC
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTC_BASE
uart_ids |= UARTC;
#endif
#ifdef CONFIG_TEGRA_ENABLE_UARTD
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
uart_ids |= UARTD;
#endif
#ifdef CONFIG_TEGRA_ENABLE_UARTE
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTE_BASE
uart_ids |= UARTE;
#endif
setup_uarts(uart_ids);

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@ -12,9 +12,6 @@
#include "tegra124-common.h"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#define FDT_MODULE "apalis-v1.2"
#define FDT_MODULE_V1_0 "apalis"

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@ -20,7 +20,6 @@
* Apalis UART3: NVIDIA UARTB
* Apalis UART4: NVIDIA UARTC
*/
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#include "tegra-common-post.h"

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@ -13,9 +13,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "NVIDIA Beaver"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#include "tegra-common-post.h"
#endif /* __CONFIG_H */

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@ -13,9 +13,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "NVIDIA Cardhu"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#include "tegra-common-post.h"
#endif /* __CONFIG_H */

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@ -18,9 +18,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "CEI tk1-som"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
#include "tegra-common-post.h"
#endif /* __CONFIG_H */

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@ -9,10 +9,6 @@
#define __CONFIG_H
#include "tegra20-common.h"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#include "tegra-common-post.h"
#endif /* __CONFIG_H */

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@ -21,7 +21,6 @@
* Colibri UART-B: NVIDIA UARTD
* Colibri UART-C: NVIDIA UARTB
*/
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#include "tegra-common-post.h"

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@ -13,9 +13,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "NVIDIA Dalmore"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* Environment in eMMC, at the end of 2nd "boot sector" */
#include "tegra-common-post.h"

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@ -15,9 +15,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "HTC One X"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#include "tegra-common-post.h"
#endif /* __CONFIG_H */

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@ -11,9 +11,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "ASUS Google Nexus 7 (2012)"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#include "tegra-common-post.h"
#endif /* __CONFIG_H */

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@ -13,15 +13,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "NVIDIA Harmony"
/* Board-specific serial config */
/* UARTD: keyboard satellite board UART, default */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
#ifdef CONFIG_TEGRA_ENABLE_UARTA
/* UARTA: debug board UART */
#define CFG_SYS_NS16550_COM2 NV_PA_APB_UARTA_BASE
#endif
/* NAND support */
/* Environment in NAND (which is 512M), aligned to start of last sector */

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@ -11,9 +11,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "Lenovo Ideapad Yoga 11"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#include "tegra-common-post.h"
#endif /* __CONFIG_H */

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@ -14,9 +14,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "NVIDIA Jetson TK1"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
#include "tegra-common-post.h"
#endif /* __CONFIG_H */

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@ -14,9 +14,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "Avionic Design Medcom-Wide"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* NAND support */
/* Environment in NAND, aligned to start of last sector */

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@ -13,9 +13,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "Xiaomi Mocha"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
#ifdef CONFIG_TEGRA_SUPPORT_NON_SECURE
#define CFG_PRAM 0x38400 /* 225 MB */
#endif

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@ -13,9 +13,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "Motorola Mot"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTB_BASE
/* Tegra common post configuration overwrites text env in the board */
#define BOARD_EXTRA_ENV_SETTINGS \
"stdin=serial,tegra-kbc,button-kbd,cpcap-pwrbutton\0"

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@ -14,9 +14,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "Google/NVIDIA Nyan-big"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#include "tegra-common-post.h"
#endif /* __CONFIG_H */

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@ -15,9 +15,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "Ouya Game Console"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
#include "tegra-common-post.h"
#endif /* __CONFIG_H */

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@ -15,9 +15,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "Compal Paz00"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
/* Environment in eMMC, at the end of 2nd "boot sector" */
#include "tegra-common-post.h"

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@ -15,9 +15,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "Acer Iconia Tab A500"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
#include "tegra-common-post.h"
#endif /* __CONFIG_H */

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@ -14,9 +14,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "Avionic Design Plutux"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* NAND support */
/* Environment in NAND, aligned to start of last sector */

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@ -15,9 +15,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "Wexler QC750"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
#include "tegra-common-post.h"
#endif /* __CONFIG_H */

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@ -14,9 +14,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "NVIDIA Seaboard"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* Environment in eMMC, at the end of 2nd "boot sector" */
/* NAND support */

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@ -13,9 +13,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "Microsoft Surface RT"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#include "tegra-common-post.h"
#endif /* __CONFIG_H */

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@ -12,9 +12,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "Avionic Design Tamonten™ NG Evaluation Carrier"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
#include "tegra-common-post.h"
#endif /* __CONFIG_H */

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@ -14,9 +14,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "Avionic Design Tamonten Evaluation Carrier"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* NAND support */
/* Environment in NAND, aligned to start of last sector */

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@ -15,9 +15,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "ASUS Transformer"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
#include "tegra-common-post.h"
#endif /* __CONFIG_H */

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@ -15,9 +15,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "ASUS Transformer"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#include "tegra-common-post.h"
#endif /* __CONFIG_H */

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@ -13,9 +13,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "Compulab Trimslice"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
/* SPI */
/* Environment in SPI */

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@ -14,9 +14,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "NVIDIA Venice2"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
/* Environment in eMMC, at the end of 2nd "boot sector" */
#include "tegra-common-post.h"

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@ -13,9 +13,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "NVIDIA Ventana"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
/* Environment in eMMC, at the end of 2nd "boot sector" */
#include "tegra-common-post.h"

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@ -15,9 +15,6 @@
/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "LG X3 Board"
/* Board-specific serial config */
#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
#include "tegra-common-post.h"
#endif /* __CONFIG_H */