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arm: socfpga: misc: Move bridge command to misc common

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Move bridge command to misc common driver, in preparation to used by
other platforms.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
This commit is contained in:
Ley Foon Tan 2018-05-24 00:17:23 +08:00 committed by Marek Vasut
parent 8b71e46cea
commit 10f9e4b1c8
3 changed files with 37 additions and 23 deletions
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2
arch/arm/mach-socfpga/include/mach/misc.h
View File

@ -27,4 +27,6 @@ unsigned int shared_uart_com_port(const void *blob);
unsigned int uart_com_port(const void *blob); unsigned int uart_com_port(const void *blob);
#endif #endif
void do_bridge_reset(int enable);
#endif /* _MISC_H_ */ #endif /* _MISC_H_ */

32
arch/arm/mach-socfpga/misc.c
View File

@ -204,3 +204,35 @@ int socfpga_eth_reset_common(void (*resetfn)(const u8 of_reset_id,
return 0; return 0;
} }
#endif #endif
#ifndef CONFIG_SPL_BUILD
static int do_bridge(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
if (argc != 2)
return CMD_RET_USAGE;
argv++;
switch (*argv[0]) {
case 'e': /* Enable */
do_bridge_reset(1);
break;
case 'd': /* Disable */
do_bridge_reset(0);
break;
default:
return CMD_RET_USAGE;
}
return 0;
}
U_BOOT_CMD(
bridge, 2, 1, do_bridge,
"SoCFPGA HPS FPGA bridge control",
"enable - Enable HPS-to-FPGA, FPGA-to-HPS, LWHPS-to-FPGA bridges\n"
"bridge disable - Enable HPS-to-FPGA, FPGA-to-HPS, LWHPS-to-FPGA bridges\n"
""
);
#endif

26
arch/arm/mach-socfpga/misc_gen5.c
View File

@ -259,40 +259,20 @@ static void socfpga_sdram_apply_static_cfg(void)
: : "r"(val), "r"(&sdr_ctrl->static_cfg) : "memory", "cc"); : : "r"(val), "r"(&sdr_ctrl->static_cfg) : "memory", "cc");
} }
static int do_bridge(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) void do_bridge_reset(int enable)
{ {
if (argc != 2) if (enable) {
return CMD_RET_USAGE;
argv++;
switch (*argv[0]) {
case 'e': /* Enable */
writel(iswgrp_handoff[2], &sysmgr_regs->fpgaintfgrp_module); writel(iswgrp_handoff[2], &sysmgr_regs->fpgaintfgrp_module);
socfpga_sdram_apply_static_cfg(); socfpga_sdram_apply_static_cfg();
writel(iswgrp_handoff[3], &sdr_ctrl->fpgaport_rst); writel(iswgrp_handoff[3], &sdr_ctrl->fpgaport_rst);
writel(iswgrp_handoff[0], &reset_manager_base->brg_mod_reset); writel(iswgrp_handoff[0], &reset_manager_base->brg_mod_reset);
writel(iswgrp_handoff[1], &nic301_regs->remap); writel(iswgrp_handoff[1], &nic301_regs->remap);
break; } else {
case 'd': /* Disable */
writel(0, &sysmgr_regs->fpgaintfgrp_module); writel(0, &sysmgr_regs->fpgaintfgrp_module);
writel(0, &sdr_ctrl->fpgaport_rst); writel(0, &sdr_ctrl->fpgaport_rst);
socfpga_sdram_apply_static_cfg(); socfpga_sdram_apply_static_cfg();
writel(0, &reset_manager_base->brg_mod_reset); writel(0, &reset_manager_base->brg_mod_reset);
writel(1, &nic301_regs->remap); writel(1, &nic301_regs->remap);
break;
default:
return CMD_RET_USAGE;
} }
return 0;
} }
U_BOOT_CMD(
bridge, 2, 1, do_bridge,
"SoCFPGA HPS FPGA bridge control",
"enable - Enable HPS-to-FPGA, FPGA-to-HPS, LWHPS-to-FPGA bridges\n"
"bridge disable - Enable HPS-to-FPGA, FPGA-to-HPS, LWHPS-to-FPGA bridges\n"
""
);
#endif #endif